VLSI-SoC C

44 papers

YearTitle / Authors
202533rd IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2025, Puerto Varas, Chile, October 12-15, 2025
2025A Case Study on the Migration of a High-Level PI Controller to ASIC-Compatible HDL Representation.
Francisca Donoso, Nelson Salvador, Jorge Marin, Christian A. Rojas, Gonzalo Carvajal
2025A Low-Power 4-bit Tracking-Type Analog-to-Digital Converter in SKY130 Process.
Esteban Astudillo, Eduardo Holguín, Esteban Garzón, Luis-Miguel Procel
2025A Novel CMOS Time Register.
Johnatan Felipe Silva Garcia, Dalton Martini Colombo, Kamal El-Sankary, Mahsa Zareie
2025Accelerating Machine Learning using RISC-V Vector Extension in a Manycore Platform.
Willian Analdo Nunes, Antônio Vinicius Corrêa Dos Santos, César A. M. Marcon, Fernando Gehm Moraes
2025Application and Detection of Hardware Trojans Applied to Valid Data States of NCL Combinational Circuits.
João Pedro Pereira Magalhães, Tales Cleber Pimenta, Diogo Leonardo Ferreira Silva
2025Automated Generation of Microfluidic Netlists using Large Language Models.
Jasper Davidson, Skylar Stockham, Allen Boston, Ashton Snelgrove, Valerio Tenace, Pierre-Emmanuel Gaillardon
2025CMOS Time Register With High Dynamic Range.
Johnatan Felipe Silva Garcia, Dalton Martini Colombo, Kamal El-Sankary, Mahsa Zareie
2025Conjunctive Merge Instruction to Accelerate Sparse Matrix - Dense Vector Multiplication.
Manuel Osterno, César A. M. Marcon, Jarbas Silveira, Fernando Gehm Moraes, Jardel Silveira
2025Correlation Between Process Variability and Radiation Hardness in Digital Circuits.
Elias Ramos, Augusto Weber, Wilian Padilha, Renan Carlos Gomes de Farias, João Baptista dos Santos Martins, Ricardo Reis
2025Cross-Layer Approximate Hardware Design of Interpolation Filters for Fractional Motion Estimation in Versatile Video Coding.
Rafael da Silva, Ricardo A. L. Reis, Mateus Grellert
2025Cultivating Security: Debug Authentication for Ensuring the Security of SoC's Root of Trust.
Arash Vafaei, Sujan Kumar Saha, Mark Tehranipoor, Farimah Farahmandi
2025Delay Mismatch Optimization in Routing Dominated Multi-Path Systems: A Case Study on an IR-UWB Edge-Combiner Transmitter Front End.
Kyla Marie Juruena, Maria Ena R. Rosales, Trisha Renee G. Capulong, Louis P. Alarcón
2025Design of a 32nm Ultra-Low Power 6T SRAM Cell Analyzing Emerging Technologies such as FinFET, TFET, and CNFET for energy-efficient applications.
Jesús González Huarancca, Carlos Silva Cárdenas
2025Deus Ex LLMs: AI vs Humans in Post-Quantum Cryptographic Hardware Code Generation.
Ethan Cornett, Rahul Magesh, Sharath Pendyala, Elif Bilge Kavun, Aydin Aysu
2025EmFIA: A Novel Emulation-based Fault Injection Vulnerability Assessment Framework at RTL Level.
Tanvir Rahman, Shuvagata Saha, Sujan Kumar Saha, Farimah Farahmandi, Mark Tehranipoor
2025Energy-Efficient Computation of TensorFloat32 Numbers on an FP32 Multiplier.
Per Larsson-Edefors
2025Exploring Enhancements to 1T1C FeMFET Bitcells with a Versatile DTCO Methodology.
Rosario Pronsat, Antoine Cauquil, Pascal Vivet, Jean Coignus, Damien Deleruyelle, Cédric Marchand, Lioua Labrak, Ian O'Connor
2025Exploring MRAM for On-Chip Texture Storage in Rendering Applications.
Nicolás Villegas, Stefano Romanini, Moritz Scherer, Warren Hunt, Syed Shakib Sarwar, Barbara De Salvo, Chiao Liu, Francesco Conti, Davide Rossi, Luca Benini, Jorge Gomez
2025Fault Modeling and Testing of Spin-Orbit Torque-Based Multipillar Memory Cell.
Arshid Nisar, Lorena Anghel, Gregory di Pendina
2025From Secure Storage to Compute-in-Memory: A Versatile Memory System using 1T-nC FeRAM.
Rakesh Acharya, Rudra Biswas, Jiahui Duan, Prapti Panigrahi, Kai Ni, Vijaykrishnan Narayanan
2025Hybrid Lightweight Soft Error Mitigation Techniques for Edge Devices.
Jonas Gava, Ricardo Reis, Luciano Ost
2025Implementation of a 16:1 Multiplexer and 1:16 Demultiplexer on a Single Chip Using Sky130 PDK and Open-Source EDA Tools for Silicluster.
Uriel Jaramillo-Toral, Susana Ortega-Cisneros, Emilio Isaac Baungarten-Leon, Erick Jaramillo-Toral, Héctor Emmanuel Muñoz Zapata
2025Inter-chip Clock Network Synthesis on Passive Interposer of 2.5D Chiplet Considering Transmission Line Effect.
Tai Yan, Yiyu Wang, Zhan Li, Ning Xu, Yuanqing Cheng
2025LiC: Low-Cost Cache Replacement Algorithm for All Cache Levels.
Varun Venkitaraman, Tejeshwar Bhagatsing Thorawade, Mitul Tandon, Keerthisagar Kokkiligadda, Virendra Singh, Janak Patel
2025Lightweight Congruence Profiling for Early Design Exploration of Heterogeneous FPGAs.
Allen Boston, Biruk B. Seyoum, Luca P. Carloni, Pierre-Emmanuel Gaillardon
2025ML4FPGA: An LLM Framework for Electronic Design Automation and Verification on FPGA.
Uchechukwu Leo Udeji, Martin Margala
2025Marker-Based Recognition for Autonomous Micro-Drone Flight: An FPGA-Optimized Feasibility Study.
Diego Marcelo Ramirez Jove, Keisuke Sugiura, Yoshiki Yamaguchi
2025Mission Profile-Driven Transistor Aging Modeling and Simulation Flow.
Firas Ramadan, Maayan Ella, Freddy Gabbay
2025Noise and Quantization Parameterization of Photonic Convolution Accelerator.
Mateus Vidaletti Costa, Mauricio Gomes de Queiroz, Raphael Cardoso, Ian O'Connor, Arnan Mitchell
2025Non-Volatile Ferroelectric-AND (FeAND) Memory Cell Design.
Basile Darne, Miqueas Filsinger, Alberto Bosio, Damien Deleruyelle, Ian O'Connor, Bertrand Vilquin, Cédric Marchand
2025On the Possibility of Relying Solely on FeMFET Variability for PUF Implementations.
Miqueas Filsinger, Antoine Cauquil, Damien Deleruyelle, David Navarro, Ian O'Connor, Cédric Marchand
2025Open-Source 4 K CMOS Calibration: Integrating IceMOS and Sky130 PDK.
Mauricio Montanares, V. H. Arzate Palma, Kevin G. McCarthy, Gerardo Molina Salgado
2025Open-Source Approach to IC Development: Validation Against Measurements of Selected Devices from the IHP-Open-PDK.
Krzysztof Herman, Dietmar Warning
2025PVT-Robust Analog Control Stage for Buck DC-DC Converters in Open-Source SKY130.
Giordano De Moraes Rossa, Henrique Beque, Iuri Tinti, Jorge Marín, Juan Pablo Martínez Brito
2025Scalability analysis of multi-bank near-memory computing in low-power SoCs.
Luigi Giuffrida, Pasquale Davide Schiavone, Michele Caon, Guido Masera, Maurizio Martina, David Atienza
2025Swift Synthesis of Approximate Hardware Accelerators Using Generative Adversarial Networks.
Muhammad Awais, Hassan Ghasemzadeh Mohammadi, Marco Platzner
2025TLGLock: A New Approach in Logic Locking Using Key-Driven Charge Recycling in Threshold Logic Gates.
Abdullah Sahruri, Martin Margala
2025TSPC-Based Low-Power High-Resolution CMOS Phase Frequency Detector.
Dhandeep Challagundla, Venkata Krishna Vamsi Sundarapu, Ignatius Bezzam, Riadul Islam
2025Toward Multi-Person Breath Rate Estimation via mmWave Radar.
Cristian Turetta, Christian Farina, Chiara Bozzini, Morteza Varasteh, Graziano Pravadelli
2025Towards Full Integration of a Three-Level Flying Capacitor Converter Control in a Mixed-Signal ASIC.
Nelson Salvador, Francisca Donoso, Jorge Marin, Victor Grimblatt, Christian A. Rojas
2025Transistor Placement for Automatic Cell Layout Generation on Advanced Nodes: A Review.
Vitor H. Fuerstenau, Ricardo Reis
2025Trojan Attacks on Graph Convolution Neural Networks for Circuit Analysis.
Rupesh Raj Karn, Ozgur Sinanoglu
2025Work in Progress: Exploring Ferroelectric Oscillators for Solving NP-Hard Problems Using Mallick's Coupling Mechanism.
Joaquin Welch, Jorge Gomez, Jaime Cisternas