| 2016 | 2016 IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia, September 26-28, 2016 |
| 2016 | A 1.62 µW 8-channel ultra-high input impedance EEG amplifier for dry and non-contact biopotential recording applications. Mahshid Nasserian, Ali Peiravi, Farshad Moradi |
| 2016 | A Hybrid Power Estimation Technique to improve IP power models quality. Alejandro Nocua, Arnaud Virazel, Alberto Bosio, Patrick Girard, Cyril Chevalier |
| 2016 | A VLSI architecture for real-time gradient guided image filtering. Lei Wu, Ching-Chuen Jong |
| 2016 | A compact, ultra-low power AES-CCM IP core for wireless body area networks. Van-Phuc Hoang, Thi-Thanh-Dung Phan, Van-Lan Dao, Cong-Kha Pham |
| 2016 | A low-power analog front-end neural acquisition design for seizure detection. Mohammad Tohidi, Jens Kargaard Madsen, Martijn J. R. Heck, Farshad Moradi |
| 2016 | A novel soft error tolerant FPGA architecture. Motoki Amagasaki, Yuji Nakamura, Takuya Teraoka, Masahiro Iida, Toshinori Sueyoshi |
| 2016 | A passive equalizer and its design methodology for global interconnects in VLSIs. Moritoshi Yasunaga, Naoki Yokoshima, Ikuo Yoshihara |
| 2016 | An FPGA-based testing platform for the validation of automotive powertrain ECU. Boyang Du, Luca Sterpone |
| 2016 | An adaptive energy-efficient task scheduling under execution time variation based on statistical analysis. Takashi Nakada, Tomoki Hatanaka, Hiroshi Nakamura, Hiroshi Ueki, Masanori Hayashikoshi, Toru Shimizu |
| 2016 | An efficient multi channel, 425µW QPSK transmitter with tuning for process variation in the Medical Implantable Communications Service (MICS) band of 402-405MHz. Abhiram Reddy Gundla, Tom Chen |
| 2016 | Automatic protocol configuration in single-channel low-power dynamic signaling for IoT devices. Shahzad Muzaffar, Numan Saeed, Ibrahim M. Elfadel |
| 2016 | Automatically comparing analog behavior using Earth Mover's Distance. Alexander W. Rath, Sebastian Simon, Volkan Esen, Wolfgang Ecker |
| 2016 | Co-optimization of fault tolerance, wirelength and temperature mitigation in TSV-based 3D ICs. Yi Zhao, S. Saqib Khursheed, Bashir M. Al-Hashimi, Zhiwen Zhao |
| 2016 | Comparative analysis of redundancy schemes for soft-error detection in low-cost space applications. Charlotte Frenkel, Jean-Didier Legat, David Bol |
| 2016 | Conclusively verifying clock-domain crossings in very large hardware designs. Guillaume Plassan, Hans-Jörg Peter, Katell Morin-Allory, Fahim Rahim, Shaker Sarwary, Dominique Borrione |
| 2016 | Design of a multi-style and multi-frequency FPGA. Jotham Vaddaboina Manoranjan, Solomon Surya Tej Mano Sajjan, Vivek B. Gujari, Kenneth S. Stevens |
| 2016 | Design of nonvolatile processors and applications. Fang Su, Zhibo Wang, Jinyang Li, Meng-Fan Chang, Yongpan Liu |
| 2016 | Dynamic clock synchronization scheme between voltage domains in multi-core architecture. Jaehyun Kim, Kiyoung Choi, Sang-Heon Lee, Soojung Ryu |
| 2016 | Efficient handling of the fault space in functional safety analysis utilizing formal methods. Alessandro Bernardini, Wolfgang Ecker, Ulf Schlichtmann |
| 2016 | Enabling Internet-of-Things: Opportunities brought by emerging devices, circuits, and architectures. Xueqing Li, Kaisheng Ma, Sumitha George, John Sampson, Vijaykrishnan Narayanan |
| 2016 | Enabling in-memory computation of binary BLAS using ReRAM crossbar arrays. Debjyoti Bhattacharjee, Farhad Merchant, Anupam Chattopadhyay |
| 2016 | Fast dynamic fault injection for virtual microcontroller platforms. Peer Adelt, Bastian Koppelmann, Wolfgang Müller, Markus Becker, Bernd Kleinjohann, Christoph Scheytt |
| 2016 | Faster-than-at-speed execution of functional programs: An experimental analysis. Paolo Bernardi, Alberto Bosio, Giorgio Di Natale, Andrea Guerriero, Federico Venini |
| 2016 | Foreword. Jaan Raik, Ian O'Connor, Thomas Hollstein, Krishnendu Chakrabarty |
| 2016 | Frequency domain characterization of batteries for the design of energy storage subsystems. Yukai Chen, Enrico Macii, Massimo Poncino |
| 2016 | Hybrid TFET-MOSFET circuits: An approach to design reliable ultra-low power circuits in the presence of process variation. Maede Hemmat, Mehdi Kamal, Ali Afzali-Kusha, Massoud Pedram |
| 2016 | Integrated Soft Error Resilience and Self-Test. Erol Koser, Sebastian Krosche, Walter Stechele |
| 2016 | Introducing Model-of-Things (MoT) and Model-of-Design (MoD) for simpler and more efficient hardware generators. Wolfgang Ecker, Johannes Schreiner |
| 2016 | Logic design with unipolar memristors. Elad Amrani, Avishay Drori, Shahar Kvatinsky |
| 2016 | Low-latency approximate matrix inversion for high-throughput linear pre-coders in massive MIMO. Syed Mohsin Abbas, Chi-Ying Tsui |
| 2016 | Multi-function logic synthesis of silicon and beyond-silicon ultra-low power pass-gates circuits. Valerio Tenace, Andrea Calimera, Enrico Macii, Massimo Poncino |
| 2016 | Online digital compensation Method for AMR sensors. Andreina Zambrano, Hans G. Kerkhoff |
| 2016 | Opportunistic circuit-switching for energy efficient on-chip networks. Yuan He, Masaaki Kondo |
| 2016 | Optimistic clock adjustment for preventing Better-than-worst-case violations. Seyedeh Hanieh Hashemi, Reza Namazian, Zainalabedin Navabi |
| 2016 | Power and area efficient clock stretching and critical path reshaping for error resilience. Mini Jayakrishnan, Alan Chang, Tae-Hyoung Kim |
| 2016 | Power and energy reduction of racetrack-based caches by exploiting shared shift operations. Seyed Saber Nabavi Larimi, Mehdi Kamal, Ali Afzali-Kusha, Hamid Mahmoodi |
| 2016 | Power-aware test optimization for core-based 3D-SOCs under TSV-constraints. Sabyasachee Banerjee, Subhashis Majumder, Bhargab B. Bhattacharya |
| 2016 | Power-efficient and slew-aware three dimensional gated clock tree synthesis. Minghao Lin, Heming Sun, Shinji Kimura |
| 2016 | Redesigning software and systems for non-volatile processors on self-powered devices. Mengying Zhao, Keni Qiu, Yuan Xie, Jingtong Hu, Chun Jason Xue |
| 2016 | Restricting writes for energy-efficient hybrid cache in multi-core architectures. Sukarn Agarwal, Hemangee K. Kapoor |
| 2016 | SoC oriented real-time high-quality stereo vision system. Yanzhe Li, Kai Huang, Luc Claesen |
| 2016 | Speeding up safety verification by fault abstraction and simulation to transaction level. Bogdan-Andrei Tabacaru, Moomen Chaari, Wolfgang Ecker, Thomas Kruse, Cristiano Novello |
| 2016 | Static energy reduction by performance linked dynamic cache resizing. Shounak Chakraborty, Hemangee K. Kapoor |
| 2016 | Stimuli generation through invariant mining for black-box verification. Luca Piccolboni, Graziano Pravadelli |
| 2016 | Synthesis on switching lattices of Dimension-reducible Boolean functions. Anna Bernasconi, Valentina Ciriani, Luca Frontini, Gabriella Trucco |
| 2016 | The multi-channel small signal readout system for THz spectroscopy and imaging applications. Dariusz Obrebski, Cezary Kolacinski, Michal Zbiec, Przemyslaw Zagrajek |
| 2016 | Ultra-Fine Grain Vdd-Hopping for energy-efficient Multi-Processor SoCs. Valentino Peluso, Andrea Calimera, Enrico Macii, Massimo Alioto |
| 2016 | WCET overapproximation for software in the context of a Cyber-Physical System. Niklas Krafczyk, Heinz Riener, Görschwin Fey |
| 2016 | XbarGen: A memristor based boolean logic synthesis tool. Marcello Traiola, Mario Barbareschi, Antonino Mazzeo, Alberto Bosio |