VLSI-SoC C

65 papers

YearTitle / Authors
201510Mbps human body communication SoC for BAN.
Hyungil Park, Ingi Lim, Sungweon Kang, Whan-Woo Kim
20152015 IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2015, Daejeon, South Korea, October 5-7, 2015
2015A cluster-based reliability- and thermal-aware 3D floorplanning using redundant STSVs.
Ying-Jung Chen, Shanq-Jang Ruan
2015A fully on-chip 25MHz PVT-compensation CMOS Relaxation Oscillator.
Hamed Abbasizadeh, Behnam Samadpoor Rikan, Kang-Yoon Lee
2015A generic clock controller for low power systems: Experimentation on an AXI bus.
Chadi Al Khatib, Claire Aupetit, Cyril Chevalier, Chouki Aktouf, Gilles Sicard, Laurent Fesquet
2015A high efficiency rectifier for inductively power transfer application.
Qiong Wei Low, Liter Siek, Mi Zhou
2015A hybrid embedded compression codec engine for ultra HD video application.
Seongmo Park, Kyungjin Byun, Nak-Woong Eum
2015A new sizing approach for lifetime improvement of nanoscale digital circuits due to BTI aging.
Andres F. Gomez, Víctor H. Champac
2015A thermal estimation model for 3D IC using liquid cooled microchannels and thermal TSVs.
Surajit Kumar Roy, Supriyo Mandal, Chandan Giri, Hafizur Rahaman
2015A time interleaved DAC sharing SAR Pipeline ADC for ultra-low power camera front ends.
Anvesha Amaravati, Manan Chugh, Arijit Raychowdhury
2015A time-window based approach for dynamic assertions mining on control signals.
Alessandro Danese, Francesca Filini, Graziano Pravadelli
2015An Incremental Timing-Driven flow using quadratic formulation for detailed placement.
Guilherme Flach, Jucemar Monteiro, Mateus Fogaça, Julia Casarin Puget, Paulo F. Butzen, Marcelo O. Johann, Ricardo Augusto da Luz Reis
2015An equation-based battery cycle life model for various battery chemistries.
Alberto Bocca, Alessandro Sassone, Donghwa Shin, Alberto Macii, Enrico Macii, Massimo Poncino
2015An equilibrium partitioning method for multicast traffic in 3D NoC architecture.
Lin Wei, Lei Zhou
2015An integrated SoC for science data processing in next-generation space flight instruments avionics.
Xabier Iturbe, Didier Keymeulen, Emre Ozer, Patrick Yiu, Daniel Berisford, Kevin P. Hand, Robert Carlson
2015An optimal operating point by using error monitoring circuits with an error-resilient technique.
Jaemin Lee, Seungwon Kim, Youngmin Kim, Seokhyeong Kang
2015An overview on memristor crossabr based neuromorphic circuit and architecture.
Zheng Li, Chenchen Liu, Yandan Wang, Bonan Yan, Chaofei Yang, Jianlei Yang, Hai Li
2015Analysis and testing on delays with two time frames.
Masahiro Fujita
2015Architecture exploration of 3D FPGA to minimize internal layer connection.
Motoki Amagasaki, Yuto Takeuchi, Qian Zhao, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi
2015Circuit performance optimization for local intra-die process variations using a gate selection metric.
Víctor H. Champac, Alejandra Nicte-ha Reyes, Andres F. Gomez
2015Compact interconnect approach for networks of neural cliques using 3D technology.
Bartosz Boguslawski, Hossam Sarhan, Frédéric Heitzmann, Fabrice Seguin, Sébastien Thuries, Olivier Billoint, Fabien Clermidy
2015Contactless transmission of intellectual property data to protect FPGA designs.
Lilian Bossuet, Viktor Fischer, Pierre Bayon
2015Cost reduction of system-level tests with stressed structural tests and SVM.
Jing-Jia Liou, Meng-Ta Hsieh, Jun-Fei Cherng, Harry H. Chen
2015Design and analysis of search algorithms for lower power consumption and faster convergence of DAC input of SAR-ADC in 65nm CMOS.
Ananthanarayanan Parthasarathy
2015Design of asynchronous RISC CPU register-file Write-Back queue.
Matthew M. Kim, Karl M. Fant, Paul Beckett
2015Design optimization of polyphase digital down converters for extremely high frequency wireless communications.
Gain Kim, Raffaele Capoccia, Yusuf Leblebici
2015Design space exploration of row buffer architecture for phase change memory with LPDDR2-NVM interface.
Jaehyun Park, Donghwa Shin, Hyung Gyu Lee
2015Digital CMOS neuromorphic processor design featuring unsupervised online learning.
Jae-sun Seo, Mingoo Seok
2015Dual-mode double precision / two-parallel single precision floating point multiplier architecture.
Manish Kumar Jaiswal, Hayden Kwok-Hay So
2015Dynamic error tracking and supply voltage adjustment for low power.
Pierre Nicolas-Nicolaz, Kiyoung Choi
2015Dynamic migratory selection strategy for adaptive routing in mesh NoCs.
John Jose, Joe Augustine, Sijin Sebastian
2015Efficient signature-based sub-circuit matching.
Amir Masoud Gharehbaghi, Masahiro Fujita
2015Embedded low power analog CMOS Fuzzy Logic Controller chip for industrial applications.
Manikandan Pandiyan, Geetha Mani
2015Energy-efficient exclusive last-level hybrid caches consisting of SRAM and STT-RAM.
Namhyung Kim, Junwhan Ahn, Woong Seo, Kiyoung Choi
2015Exploiting scalable CGRA mapping of LU for energy efficiency using the Layers architecture.
Zoltán Endre Rákossy, Dominik Stengele, Gerd Ascheid, Rainer Leupers, Anupam Chattopadhyay
2015Fast global interconnnect driven 3D floorplanning.
Artur Quiring, Markus Olbrich, Erich Barke
2015Filtering dirty data in DRAM to reduce PRAM writes.
Hyunsun Park, Chanha Kim, Sungjoo Yoo, Chanik Park
2015Flare reduction in EUV Lithography by perturbation of wire segments.
Sudipta Paul, Pritha Banerjee, Susmita Sur-Kolay
2015Hardware architecture and optimization of sliding window based pedestrian detection on FPGA for high resolution images by varying local features.
Asim Khan, Muhammad Umar Karim Khan, Muhammad Bilal, Chong-Min Kyung
2015Hardware implementation of real-time multiple frame super-resolution.
Kerem Seyid, Sebastien Blanc, Yusuf Leblebici
2015Hardware/software partitioning of embedded System-on-Chip applications.
Jia Wei Tang, Yuan Wen Hau, Muhammad N. Marsono
2015High-efficiency voltage regulation stage in energy harvesting systems.
S. E. Kim, T. W. Kang, S. W. Kang, K. H. Park, M. A. Chung
2015Integrating wearable low power CMOS ECG acquisition SoC with decision making system for WSBN applications.
Manikandan Pandiyan, Geetha Mani, Jovitha Jerome, Natarajan S.
2015JAIP-MP: A four-core Java application processor.
Chun-Jen Tsai, Tsung-Han Wu, Hung-Cheng Su
2015Locality-aware vertex scheduling for GPU-based graph computation.
Hyunsun Park, Junwhan Ahn, Eunhyeok Park, Sungjoo Yoo
2015Message from the general chairs.
Naehyuck Chang, Kiyoung Choi
2015Message from the technical program chairs.
Youngsoo Shin, Chi-Ying Tsui
2015Modular performance analysis of Multicore SoC-based small cell LTE base station.
Manikantan Srinivasan, C. Siva Ram Murthy, Anusuya Balasubramanian
2015Non-volatile memories in FPGAs: Exploiting logic similarity to accelerate reconfiguration and increase programming cycles.
Yuan Xue, Patrick Cronin, Chengmo Yang, Jingtong Hu
2015On the estimation of assertion interestingness.
Tara Ghasempouri, Graziano Pravadelli
2015Physical design and mask optimization for directed self-assembly lithography (DSAL).
Seongbo Shim, Youngsoo Shin
2015Physical-based modeling and fast simulation of wireline links.
Jun Guo, Peng Liu, Weidong Wang
2015Power-management high-level synthesis.
Dominik Macko, Katarína Jelemenská, Pavel Cicák
2015Prefetch-based dynamic row buffer management for LPDDR2-NVM devices.
Jaehyun Park, Donghwa Shin, Hyung Gyu Lee
2015Qualifying non-volatile register files for embedded systems through compiler-directed write minimization and balancing.
Chengmo Yang, Maria Ruiz Varela
2015Reversible circuit rewriting with simulated annealing.
Nabila Abdessaied, Mathias Soeken, Gerhard W. Dueck, Rolf Drechsler
2015Scalable algorithm for structural fault collapsing in digital circuits.
Raimund Ubar, Lembit Jurimagi, Elmet Orasson, Jaan Raik
2015Slack-aware timing margin redistribution technique utilizing error avoidance flip-flops and time borrowing.
Mini Jayakrishnan, Alan Chang, José Pineda de Gyvez, Tae-Hyoung Kim
2015Tailoring instruction-set extensions for an ultra-low power tightly-coupled cluster of OpenRISC cores.
Michael Gautschi, Andreas Traber, Antonio Pullini, Luca Benini, Michele Scandale, Alessandro Di Federico, Michele Beretta, Giovanni Agosta
2015Timing and robustness analysis of Pulsed-Index protocols for single-channel IoT communications.
Shahzad Muzaffar, Ibrahim M. Elfadel
2015Timing attack on NEMS relay based design of AES.
Samah Mohamed Saeed, Bodhisatwa Mazumdar, Sk Subidh Ali, Ozgur Sinanoglu
2015Trace Buffer Attack: Security versus observability study in post-silicon debug.
Yuanwen Huang, Anupam Chattopadhyay, Prabhat Mishra
2015Trace signal selection methods for post silicon debugging.
Shridhar Choudhary, Amir Masoud Gharehbaghi, Takeshi Matsumoto, Masahiro Fujita
2015Traffic-aware buffer reconfiguration in on-chip networks.
Ramin Bashizade, Hamid Sarbazi-Azad
2015Virtual prototype based on Aldebarn CPU core.
Jae-Jin Lee, Chan Kim, Kyungjin Byun, Nak-Woong Eum