VLSI-SoC C

45 papers

YearTitle / Authors
201422nd International Conference on Very Large Scale Integration, VLSI-SoC, Playa del Carmen, Mexico, October 6-8, 2014
Lorena Garcia
2014A common architecture for co-simulation of SystemC models in QEMU and OVP virtual platforms.
Filippo Cucchetto, Alessandro Lonardi, Graziano Pravadelli
2014A low power 720p motion estimation processor with 3D stacked memory.
Shuping Zhang, Jinjia Zhou, Dajiang Zhou, Satoshi Goto
2014A novel non-minimal turn model for highly adaptive routing in 2D NoCs.
Manoj Kumar, Vijay Laxmi, Manoj Singh Gaur, Masoud Daneshtalab, Mark Zwolinski
2014A quantum algorithm processor architecture based on register reordering.
Masaki Nakanishi, Miki Matsuyama, Yumi Yokoo
2014A tool for the automatic TLM-to-RTL conversion of embedded systems requirements for a seamless verification flow.
Zeineb Bel Hadj Amor, Laurence Pierre, Dominique Borrione
2014AES design space exploration new line for scan attack resiliency.
Sk Subidh Ali, Ozgur Sinanoglu, Ramesh Karri
2014Advances on the state of the art in QDI design.
Matheus T. Moreira, Ney Laert Vilar Calazans
2014Automated functional coverage directed for complex digital systems.
Alfonso Martínez-Cruz, Ricardo Barrón Fernández, Herón Molina-Lozano
2014Backplane/FDA correlation-FDA replacing commercial backplanes for SoC ethernet electrical validation.
Jesus-Andres Mendoza-Bonilla, Alejandro Cortez-Ibarra, Edgar-Andrei Vega-Ochoa, Francisco Rangel-Patino, Brandon Gore
2014Circuit to reduce Gate Induced Drain Leakage in CMOS output buffers.
Hari Anand Ravi, Mayank Goel, Prasad Bhilawadi
2014Complementary logic interface for high performan optical computing with OLUT.
Zhen Li, Sébastien Le Beux, Ian O'Connor, Christelle Monat, Xavier Letartre
2014Crossbar replication vs. sharing for virtual channel flow control in asynchronous NoCs: A comparative study.
Gabriele Miorandi, Alberto Ghiribaldi, Steven M. Nowick, Davide Bertozzi
2014Decimal engine for energy-efficient multicore processors.
Alberto Nannarelli
2014Deconvolution algorithm dependencies of estimation errors of RTN effects on subnano-scaled SRAM margin variation.
Hiroyuki Yamauchi, Worawit Somha
2014Detailed placement accounting for technology constraints.
Andrew A. Kennings, Nima Karimpour Darav, Laleh Behjat
2014Dynamic programming-based lifetime aware adaptive routing algorithm for Network-on-Chip.
Liang Wang, Xiaohang Wang, Terrence S. T. Mak
2014Electromagnetic analysis and fault injection onto secure circuits.
Paolo Maistri, Régis Leveugle, Lilian Bossuet, Alain Aubert, Viktor Fischer, Bruno Robisson, Nicolas Moro, Philippe Maurine, Jean-Max Dutertre, Mathieu Lisart
2014Electromagnetic analysis, deciphering and reverse engineering of integrated circuits (E-MATA HARI).
Laurent Chusseau, Rachid Omarouayache, Jérémy Raoult, Sylvie Jarrix, Philippe Maurine, Karim Tobich, Alexandre Boyer, Bertrand Vrignon, John Shepherd, Thanh-Ha Le, Maël Berthier, Lionel Rivière, Bruno Robisson, Anne-Lise Ribotta
2014Energy-efficient partitioning of hybrid caches in multi-core architecture.
Dongwoo Lee, Kiyoung Choi
2014Evaluation of digital ternary stimuli for dynamic test of ΣΔ ADCs.
Matthieu Dubois, Haralampos-G. D. Stratigopoulos, Salvador Mir, Manuel J. Barragán
2014Fast accurate evaluation of register lifetime and criticality in a pipelined microprocessor.
K. Chibani, Mohamed Ben Jrad, Michele Portolan, Régis Leveugle
2014Framework for simulation of the Verilog/SPICE mixed model: Interoperation of Verilog and SPICE simulators using HLA/RTI for model reusability.
Moon Gi Seok, Daejin Park, Geun Rae Cho, Tag Gon Kim
2014Implementation of power efficient multicore FFT datapaths by reordering the twiddle factors.
Sidinei Ghissoni, Eduardo A. C. da Costa, Angelo Goncalves da Luz
2014Improved read and write margins using a novel 8T-SRAM cell.
Farshad Moradi, Jens Kargaard Madsen
2014Inference of channel types in micro-architectural models of on-chip communication networks.
Bernard van Gastel, Freek Verbeek, Julien Schmaltz
2014Laser-induced fault effects in security-dedicated circuits.
Régis Leveugle, Paolo Maistri, Pierre Vanhauwaert, Feng Lu, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre, Athanasios Papadimitriou, David Hély, Vincent Beroulle, Guillaume Hubert, Stephan De Castro, Jean-Max Dutertre, Alexandre Sarafianos, Noemie Boher, Mathieu Lisart, Joel Damiens, Philippe Candelier, Clément Tavernier
2014Logic synthesis and verification on fixed topology.
Masahiro Fujita, Alan Mishchenko
2014Low-power high-speed current mode logic using Tunnel-FETs.
Wei-Yu Tsai, Huichu Liu, Xueqing Li, Vijaykrishnan Narayanan
2014Modeling, analysis and exploration of layers: A 3D computing architecture.
Zoltán Endre Rákossy
2014Multi-terminal PCB escape routing for digital microfluidic biochips using negotiated congestion.
Jeffrey McDaniel, Daniel T. Grissom, Philip Brisk
2014Optimized active and power-down mode refresh control in 3D-DRAMs.
Matthias Jung, Christian Weis, Norbert Wehn, MohammadSadegh Sadri, Luca Benini
2014Power dissipation effects on 28nm FPGA-based System on Chips neutron sensitivity.
Giovanni Bruni, Paolo Rech, Lucas A. Tambara, Gabriel L. Nazar, Fernanda Gusmão de Lima Kastensmidt, Ricardo Reis, Alessandro Paccagnella
2014Realizing a security aware triple modular redundancy scheme for robust integrated circuits.
Gunti Nagendra Babu, Aman Khatri, Karthikeyan Lingasubramanian
2014Reconfigurable forward homography estimation system for real-time applications.
Vladan Popovic, Yusuf Leblebici
2014Reducing test time for 3D-ICs by improved utilization of test elevators.
Sreenivaas S. Muthyala, Nur A. Touba
2014Scalable and energy-efficient reconfigurable accelerator for column-wise givens rotation.
Zoltán Endre Rákossy, Farhad Merchant, Axel Acosta-Aponte, S. K. Nandy, Anupam Chattopadhyay
2014Self similarity and interval arithmetic based leakage optimization in RTL datapaths.
Shilpa Pendyala, Srinivas Katkoori
2014Silicon photonics design rule checking: Application of a programmable modeling engine for non-Manhattan geometry verification.
Ruping Cao, John Ferguson, Fabien Gays, Youssef Drissi, Alexandre Arriordaz, Ian O'Connor
2014Simulated annealing-based placement for microfluidic large scale integration (mLSI) chips.
Jeffrey McDaniel, Brendon Parker, Philip Brisk
2014Soft error effects analysis and mitigation in VLIW safety-critical applications.
Davide Sabena, Matteo Sonza Reorda, Luca Sterpone
2014Study of on-chip vias of resonant rotary traveling wave oscillators.
Javier Osorio Figueroa, Mónico Linares Aranda
2014Through silicon via placement and mapping strategy for 3D mesh based Network-on-Chip.
Kanchan Manna, Santanu Chattopadhyay, Indranil Sengupta
2014Towards energy effective LDPC decoding by exploiting channel noise variability.
Thomas Marconi, Christian Spagnol, Emanuel M. Popovici, Sorin Cotofana
2014VLSI design of a parallel MCMC-based MIMO detector with multiplier-free Gibbs samplers.
Dominik Auras, Uwe Deidersen, Rainer Leupers, Gerd Ascheid