VLSI-SoC C

83 papers

YearTitle / Authors
201321st IEEE/IFIP International Conference on VLSI and System-on-Chip, VLSI-SoC 2013, Istanbul, Turkey, October 7-9, 2013
Martin Margala, Ricardo Augusto da Luz Reis, Alex Orailoglu, Luigi Carro, Luís Miguel Silveira, H. Fatih Ugurdag
20137.72 ppm/°C, ultralow power, high PSRR CMOS bandgap reference voltage.
Assia Hamouda, Rüdiger Arnold, Otto Manck, Nour-Eddine Bouguechal
2013A 0.7-V 400-nW fourth-order active-passive ΔΣ modulator with one active stage.
Ali Fazli Yeknami, Atila Alvandpour
2013A 65-nm CMOS area optimized de-synchronization flow for sub-VT designs.
Christoph Thomas Muller, Steffen Malkowsky, Oskar Andersson, Babak Mohammadi, Jens Sparsø, Joachim Neves Rodrigues
2013A basic-block power annotation approach for fast and accurate embedded software power estimation.
Chien-Min Lee, Chi-Kang Chen, Ren-Song Tsay
2013A center-aligned digital pulse-width modulator for envelope modulation of polar transmitters.
Chien-Hung Kuo, Cin-De Jhang
2013A debugging method for gate level circuit designs by introducing programmability.
Kosuke Oshima, Takeshi Matsumoto, Masahiro Fujita
2013A direct measurement scheme of amalgamated aging effects with novel on-chip sensor.
Nicoleta Cucu Laurenciu, Yao Wang, Sorin Dan Cotofana
2013A framework for Compiler Level statistical analysis over customized VLIW architecture.
Amir Hossein Ashouri, Vittorio Zaccaria, Sotirios Xydis, Gianluca Palermo, Cristina Silvano
2013A framework to accelerate sequential programs on homogeneous multicores.
Christopher W. Fletcher, Rachael Harding, Omer Khan, Srinivas Devadas
2013A high performance and low energy hardware for intra prediction with Template Matching.
Yusuf Adibelli, Ilker Hamzaoglu
2013A new compact analog VLSI model for Spike Timing Dependent Plasticity.
Mostafa Rahimi Azghadi, Said F. Al-Sarawi, Nicolangelo Iannella, Derek Abbott
2013A power-efficient hierarchical network-on-chip topology for stacked 3D ICs.
Debora Matos, Cezar Reinbrecht, Tiago Motta, Altamiro Amadeu Susin
2013A real-time 720p feature extraction core based on Semantic Kernels Binarized.
Michael Schaffner, Pascal Hager, Lukas Cavigelli, Pierre Greisen, Frank K. Gürkaynak, Hubert Kaeslin
2013Accelerating software radio: Iris on the Zynq SoC.
Jonathan van de Belt, Paul D. Sutton, Linda Doyle
2013Adapting the columns of storage components for lower static energy dissipation.
Mehmet Burak Aykenar, Muhammet Ozgur, Osman Seckin Simsek, Oguz Ergin
2013An accurate power estimation model for low-power hierarchical-architecture SRAMs.
Yuan Ren, Tobias G. Noll
2013An area-efficient minimum-time FFT schedule using single-ported memory.
Stephen Richardson, Ofer Shacham, Dejan Markovic, Mark Horowitz
2013An energy efficient time-sharing pyramid pipeline for multi-resolution computer vision.
Qiuling Zhu, Navjot Garg, Yun-Ta Tsai, Kari Pulli
2013An inverter-based neural amplifier for neural spike detection.
Sungho Kim, Urs Frey
2013Analog layer extensions for analog/mixed-signal assertion languages.
Dogan Ulus, Alper Sen, I. Faik Baskaya
2013Analog-to-digital converters power dissipation limits of CBSC-based pipelined.
Majid Zamani, Clemens Eder, Andreas Demosthenous
2013Analysis of Ring Oscillator structures to develop a design methodology for RO-PUF circuits.
Giray Kömürcü, Ali Emre Pusane, Günhan Dündar
2013Architectural exploration of a fine-grained 3D cache for high performance in a manycore context.
Eric Guthmuller, Ivan Miro Panades, Alain Greiner
2013Architecture and implementation of real-time 3D stereo vision on a Xilinx FPGA.
Sotiris Thomas, Kyprianos Papadimitriou, Apostolos Dollas
2013Automatic addition of reset in asynchronous sequential control circuits.
Vikas S. Vij, Kenneth S. Stevens
2013Automatic mapping of OpenCV based systems on new heterogeneous SoCs.
Francisco-Jose Sanchis-Cases, Antonio Martínez-Álvarez, Sergio Cuenca-Asensi
2013Automatic netlist scrambling methodology in ASIC design flow to hinder the reverse engineering.
Sharareh Zamanzadeh, Ali Jahanian
2013Blind-LMS based digital background calibration for a 14-Bit 200-MS/s pipelined ADC.
Yajuan He, Bo Chen, Qiang Li
2013Characterization of mode transition timing overhead for net energy savings in low-noise MTCMOS circuits.
Hailong Jiao, Volkan Kursun
2013Compressed look-up-table based real-time rectification hardware.
Abdulkadir Akin, Ipek Baz, Luis Manuel Gaemperle, Alexandre Schmid, Yusuf Leblebici
2013Data re-allocation enabled cache locking for embedded systems.
Keni Qiu, Mengying Zhao, Chenchen Fu, Chun Jason Xue
2013Decentralized self-balancing systems.
Soumya Banerjee, Kai Da Zhao, Wenjing Rao, Milos Zefran
2013Design considerations for low gain amplifier in the MDAC of digitally calibrated pipelined ADCs.
Hussein Adel, Marie-Minerve Louërat, Marc Sabut
2013Dynamic cache pooling for improving energy efficiency in 3D stacked multicore processors.
Jie Meng, Tiansheng Zhang, Ayse K. Coskun
2013Effects of the positive feedback loop in self biased bandgap reference circuits.
Kemal Ozanoglu, Selçuk Talay
2013Embedded tutorials: Embedded tutorial 1: Cell-aware test-from gates to transistors.
Janusz Rajski, Miodrag Potkonjak, Adit D. Singh, Abhijit Chatterjee, Zain Navabi, Matthew R. Guthaus, Sezer Gören
2013Energy impact in the design space exploration of loop buffer schemes in embedded systems.
Antonio Artés, José Luis Ayala, Robert Fasthuber, Praveen Raghavan, Francky Catthoor
2013Examining Thread Vulnerability analysis using fault-injection.
Isil Öz, Haluk Rahmi Topcuoglu, Mahmut T. Kandemir, Oguz Tosun
2013FOF: Functionally Observable Fault and its ATPG techniques.
Masahiro Fujita, Takeshi Matsumoto, Satoshi Jo
2013FPGA vs DSP: A throughput and power efficiency comparison for Hierarchical Enumerative Coding.
Yuhui Bai, Syed Zahid Ahmed, Imen Mhedhbi, Khalil Hachicha, Cedric Champion, Patrick Garda, Bertrand Granado
2013Fine grain multi-VT co-integration methodology in UTBB FD-SOI technology.
Bertrand Pelloux-Prayer, Alexandre Valentian, Bastien Giraud, Yvain Thonnart, Jean-Philippe Noel, Philippe Flatresse, Edith Beigné
2013Fine grain word length optimization for dynamic precision scaling in DSP systems.
Seogoo Lee, Andreas Gerstlauer
2013Fully electronically programmable complex filter for multistandard applications.
Hussain A. Alzaher, Noman Tasadduq
2013GR-PA: A cost pre-allocation model for global routing.
Leandro Nunes, Tiago Reimann, Ricardo Reis
2013Gate sizing in the presence of gate switching activity and input vector control.
Nathaniel A. Conos, Saro Meguerdichian, Miodrag Potkonjak
2013Gate-controlled doping in carbon-based FETs.
Joachim Knoch, Thomas Grap, Marcel Müller
2013Generating fast logic circuits for m-select n-port Round Robin Arbitration.
H. Fatih Ugurdag, Fatih Temizkan, Sezer Gören
2013Graph based fault model definition for bus testing.
Elmira Karimi, Mohammad Hashem Haghbayan, Adele Maleki, Mahmoud Tabandeh
2013Heterogeneous tasking on SMP/FPGA SoCs: The case of OmpSs and the Zynq.
Antonio Filgueras, Eduard Gil, Carlos Álvarez, Daniel Jiménez-González, Xavier Martorell, Jan Langer, Juanjo Noguera
2013High-speed Binary Signed-Digit RNS adder with posibit and negabit encoding.
Somayeh Timarchi, Maryam Saremi, Mahmood Fazlali, Georgi Gaydadjiev
2013IP-core protection for a non-volatile Self-reconfiguring SoC environment.
Wael Adi, Shaza Zeitouni, X. Huang, Marc Fyrbiak, Christian Kison, Marc Jeske, Z. Alnahhas
2013Implementation of Neuro-Fuzzy System based image edge detection.
Manel Elloumi, Mohamed Krid, Dorra Sellami Masmoudi
2013Implementation of core coalition on FPGAs.
Kaushik Triyambaka Mysur, Mihai Pricopi, Thomas Marconi, Tulika Mitra
2013Improved read voltage margins with alternative topologies for memristor-based crossbar memories.
Ioannis Vourkas, Dimitrios Stathis, Georgios Ch. Sirakoulis
2013Keynote 1 - VLSI 2.0: R&D Post Moore.
Sani R. Nassif, Yale N. Patt, Magdy S. Abadir
2013Low cost FPGA design and implementation of a stereo matching system for 3D-TV applications.
Aydin Aysu, Murat Sayinta, Cevahir Cigla
2013Minimization of EP-SOPs via Boolean relations.
Anna Bernasconi, Valentina Ciriani, Gabriella Trucco, Tiziano Villa
2013Multi-band tunable low noise amplifiers operating at 850MHz and 1900MHz standards.
Farshad Eshghabadi, Fatemeh Banitorfian, Norlaili Mohd Noh, Mohd Tafir Mustaffa, Asrulnizam Bin Abd Manaf, Othman Sidek
2013New scan-based attack using only the test mode.
Sk Subidh Ali, Ozgur Sinanoglu, Samah Mohamed Saeed, Ramesh Karri
2013New techniques for selecting test frequencies for linear analog circuits.
Mohand Bentobache, Ahcène Bounceur, Reinhardt Euler, Yann Kieffer, Salvador Mir
2013On the accuracy of Monte Carlo yield estimators.
Alp Arslan Bayrakci
2013On the design of modulo 2
Kostas Tsoumanis, Constantinos Efstathiou, Nikolaos Moschopoulos, Kiamal Z. Pekmestzi
2013On the development of diagnostic test programs for VLIW processors.
Davide Sabena, Matteo Sonza Reorda, Luca Sterpone
2013Online periodic test mechanism for homogeneous many-core processors.
Arezoo Kamran, Zainalabedin Navabi
2013PFT - A low overhead predictability enhancement technique for non-preemptive NoCs.
Bharath Sudev, Leandro Soares Indrusiak
2013PVT variation detection and compensation methods for high-speed systems.
Vazgen Melikyan, Abraham Balabanyan, Armen Durgaryan, Harutyun Stepanyan, Karen Sloyan, Hovik Musayelyan, Gayane Markosyan
2013Performance-driven SRAM macro design with parameterized cell considering layout-dependent effects.
Yu Zhang, Gong Chen, Qing Dong, Mingyu Li, Shigetoshi Nakatake
2013Power-aware SoC test optimization through dynamic voltage and frequency scaling.
Vijay Sheshadri, Vishwani D. Agrawal, Prathima Agrawal
2013Processors as SoC building blocks.
Yankin Tanurhan, Pieter van der Wolf
2013Reconfigurable photonic switching: Towards all-optical FPGAs.
Sébastien Le Beux, Zhen Li, Christelle Monat, Xavier Letartre, Ian O'Connor
2013Single-stage amplifiers with gain enhancement and improved energy-efficiency employing voltage-combiners.
Ricardo Povoa, Nuno Lourenço, Nuno Horta, Rui Santos-Tavares, João Goes
2013Software-programmable digital pre-distortion on the Zynq SoC.
Baris Özgül, Jan Langer, Juanjo Noguera, Kees A. Vissers
2013Spin-electronics based logic fabrics.
Weisheng Zhao, Jacques-Olivier Klein, Zhaohao Wang, Yue Zhang, Nesrine Ben Romdhane, Damien Querlioz, Dafine Ravelosona, Claude Chappert
2013Staggered latch bus: A reliable offset switched architecture for long on-chip interconnect.
Melvin Eze, Ozcan Ozturk, Vijaykrishnan Narayanan
2013Static energy minimization of 3D stacked L2 cache with selective cache compression.
Jongbum Park, Jongpil Jung, Kang Yi, Chong-Min Kyung
2013Step response analysis of third order OpAmps With slew-rate.
Mohsen Hassanpourghadi, Mohammad Sharifkhani
2013SyntHorus-2: Automatic prototyping from PSL.
Katell Morin-Allory, Fatemeh Negin Javaheri, Dominique Borrione
2013Tagged probabilistic simulation based error probability estimation for better-than-worst case circuit design.
Amr M. S. Tosson, Siddharth Garg, Mohab H. Anis
2013Thermal-aware test scheduling for NOC-based 3D integrated circuits.
Dong Xiang, Gang Liu, Krishnendu Chakrabarty, Hideo Fujiwara
2013Three-dimensional stacking FPGA architecture using face-to-face integration.
Tetsuro Hamada, Qian Zhao, Motoki Amagasaki, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi
2013Towards the least complex time-multiplexed constant multiplication.
Levent Aksoy, Paulo F. Flores, José Monteiro
2013Variation-aware and adaptive-latency accesses for reliable low voltage caches.
Po-Hao Wang, Wei-Chung Cheng, Yung-Hui Yu, Tang-Chieh Kao, Chi-Lun Tsai, Pei-Yao Chang, Tay-Jyi Lin, Jinn-Shyan Wang, Tien-Fu Chen