VLSI-SoC C

83 papers

YearTitle / Authors
20111024-point pipeline FFT processor with pointer FIFOs based on FPGA.
Guanwen Zhong, Hongbin Zheng, ZhenHua Jin, Dihu Chen, Zhiyong Pang
20113-D integration and the limits of silicon computation.
Dinesh Pamunuwa, Matthew Grange, Roshan Weerasekera, Axel Jantsch
20113D NoC using through silicon Via: An asynchronous implementation.
Pascal Vivet, Denis Dutoit, Yvain Thonnart, Fabien Clermidy
20113D-IC floorplanning: Applying meta-optimization to improve performance.
Felipe Frantz, Lioua Labrak, Ian O'Connor
2011A 230mV 8-bit sub-threshold microprocessor for wireless sensor network.
Wei Jin, Sheng Lu, Weifeng He, Zhigang Mao
2011A battery-free energy harvesting system with the switch capacitor sampler (SCS) technique for high power factor in smart meter applications.
Tzu-Chi Huang, Yao-Yi Yang, Yu-Huei Lee, Ming-Jhe Du, Shih-Hsien Cheng, Ke-Horng Chen
2011A clock-less transceiver for global interconnect.
Jianfei Jiang, Xu Wang, Wei-Guang Sheng, Wei-Feng He, Zhi-Gang Mao
2011A fault-tolerant NoC using combined link sharing and partial fault link utilization scheme.
Ying Fei Teh, Zhiliang Qian, Chi-Ying Tsui
2011A fault-tolerant network-on-chip design using dynamic reconfiguration of partial-faulty routing resources.
Zhiliang Qian, Ying Fei Teh, Chi-Ying Tsui
2011A full-mode FME VLSI architecture based on 8×8/4×4 adaptive Hadamard Transform for QFHD H.264/AVC encoder.
Jialiang Liu, Xinhua Chen, Yibo Fan, Xiaoyang Zeng
2011A general statistical estimation for application mapping in Network-on-Chip.
Naifeng Jing, Weifeng He, Zhigang Mao
2011A high efficiency synchronous buck converter with adaptive dead time control for dynamic voltage scaling applications.
Shaowei Zhen, Bo Zhang, Ping Luo, Kang Yang, Xiaohui Zhu, Jiangkun Li
2011A high performance band-pass DAC architecture and design targeting a low voltage silicon process.
Brendan Mullane, Vincent O'Brien
2011A hybrid algorithm for the optimization of area and delay in linear DSP transforms.
Levent Aksoy, Eduardo Costa, Paulo F. Flores, José Monteiro
2011A low cost CMOS polarimetric ophthalmoscope scheme for cerebral malaria diagnostics.
Xiaojin Zhao, Amine Bermak, Farid Boussaïd
2011A low-loss rectifier unit for inductive-powering of biomedical implants.
Qingyun Ma, Mohammad Rafiqul Haider, Yehia Massoud
2011A low-power ultra-fast capacitor-less LDO with advanced dynamic push-pull techniques.
Xin Ming, Ze-kun Zhou, Bo Zhang
2011A more efficient arrangement of the sparse LU factorization for the large-scale circuit analysis.
Josef Dobes, David Cerný, Abhimanyu Yadav
2011A novel low-leakage 8T differential SRAM cell.
Khawar Sarfraz
2011A subthreshold digital maximum power point tracker for micropower piezoelectric energy harvesting applications.
Joseph Sankman, Dongsheng Ma
2011A voltage mode power converter with the function of digitally duty cycle tuning.
Xiaohui Zhu, Ping Luo, Shaowei Zhen, Kang Yang, Jiangkun Li, Zekun Zhou
2011Adaptive priority toggle asynchronous tree arbiter for AER-based image sensor.
Myat Thu Linn Aung, Anh-Tuan Do, Shoushun Chen, Kiat Seng Yeo
2011Agent-based on-chip network using efficient selection method.
Masoumeh Ebrahimi, Masoud Daneshtalab, Pasi Liljeberg, Juha Plosila, Hannu Tenhunen
2011An easily testable routing architecture of FPGA.
Masahiro Iida, Kazuki Inoue, Motoki Amagasaki, Toshinori Sueyoshi
2011An optimized TTA-like vertex shader datapath for embedded 3D graphics processing unit.
Jizeng Wei, Yisong Chang, Wei Guo, Jizhou Sun
2011Architecture and design of a programmable 3D-integrated cellular processor array for image processing.
Alexey Lopich, Piotr Dudek
2011Area-efficient 3-input decimal adders using simplified carry and sum vectors.
Tso-Bing Juang, Hsin-Hao Peng, Chao-Tsung Kuo
2011C-Routing: An adaptive hierarchical NoC routing methodology.
Manas Kumar Puthal, Virendra Singh, Manoj Singh Gaur, Vijay Laxmi
2011Clockless asynchronous delta modulator based ADC for smart dust applications.
Venkata Narasimha Manyam, Dhurv Chhetri, J. Jacob Wikner
2011Combinational logic synthesis for material implication.
Anupam Chattopadhyay, Zoltan Endre Rakosi
2011Communication centric on-chip power grid models for networks-on-chip.
Nizar Dahir, Terrence S. T. Mak, Alex Yakovlev
2011Communication service for hardware tasks executed on dynamic and partial reconfigurable resources.
Surya Narayanan, Ludovic Devaux, Daniel Chillet, Sébastien Pillement, Ioannis Sourdis
2011Communication-aware middleware-based design-space exploration for Networked Embedded Systems.
Franco Fummi, Davide Quaglia, Francesco Stefanni
2011Comparative ODE benchmarking of unidirectional and bidirectional DP networks for 3D-IC.
Kai-Pui Lam, Terrence S. T. Mak, Chi-Sang Poon
2011Context-aware compiled simulation of out-of-order processor behavior based on atomic traces.
Roman Plyaskin, Andreas Herkersdorf
2011Cycle avoidance in 2D/3D bidirectional graphs using shortest-path dynamic programming network.
Kai-Pui Lam, Terrence S. T. Mak, Chi-Sang Poon
2011Design and analysis of on-chip charge pumps for micro-power energy harvesting applications.
Wing-Hung Ki, Yan Lu, Feng Su, Chi-Ying Tsui
2011Designs for improving the performance of an electro-thermal in-plane actuator.
Alex Man Ho Kwan, Sichao Song, Xing Lu, Lei Lu, Ying-Khai Teh, Ying Fei Teh, Eddie Wing Cheung Chong, Yan Gao, William Hau, Fan Zeng, Man Wong, Chunmei Huang, Akira Taniyama, Yoshihide Makino, So Nishino, Toshiyuki Tsuchiya, Osamu Tabata
2011Early planning for RT-level delay insertion during clock skew-aware register binding.
Keisuke Inoue, Mineo Kaneko
2011Embedded MRAM for high-speed computing.
Weisheng Zhao, Yue Zhang, Yahya Lakys, Jacques-Olivier Klein, Daniel Etiemble, D. Revelosona, Claude Chappert, Lionel Torres, Luis Vitorio Cargnini, Raphael Martins Brum, Yoann Guillemenet, Gilles Sassatelli
2011Exploiting maximum throughput in 3D multicore architectures with stacked NUCA cache.
Asim Khan, Kyungsu Kang, Chong-Min Kyung
2011FPGA implementation of high sampling rate in-car non-stationary noise cancellation based on adaptive Wiener filter.
Hong-Yuan Jheng, Yen-Hsiang Chen, Shanq-Jang Ruan, Ziming Qi
2011Fabrication of a flexible neural interface device with CMOS-based smart electrodes.
Toshihiko Noda, Takuya Kitao, Takasuke Ito, Kiyotaka Sasagawa, Takashi Tokuda, Yasuo Terasawa, Hiroyuki Tashiro, Hiroyuki Kanda, Takashi Fujikado, Jun Ohta
2011Fault tolerant design for low power hierarchical search motion estimation algorithms.
Charvi Dhoot, Vincent John Mooney, Shubhajit Roy Chowdhury, Lap-Pui Chau
2011Frequency-domain transient analysis of multitime partial differential equation systems.
Haotian Liu, Fengrui Shi, Yuanzhe Wang, Ngai Wong
2011Generating high tail accuracy Gaussian Random Numbers in hardware using central limit theorem.
Jamshaid Sarwar Malik, Jameel Nawaz Malik, Ahmed Hemani, Nasirud Din Gohar
2011High-throughput pipelined realization of adaptive FIR filter based on distributed arithmetic.
Pramod Kumar Meher, Sang Yoon Park
2011IEEE/IFIP 19th International Conference on VLSI and System-on-Chip, VLSI-SoC 2011, Kowloon, Hong Kong, China, October 3-5, 2011
2011Improvements to satisfiability-based boolean function bi-decomposition.
Huan Chen, João Marques-Silva
2011Interface model based cyber-physical energy system design for smart grid.
Janet Meiling Wang Roveda, Susan Lysecky, Young-Jun Son, Hyungtaek Chang, Anita Annamalai, Xiao Qin
2011Layout guidelines for 3D architectures including Optical Ring Network-on-Chip (ORNoC).
Sébastien Le Beux, Jelena Trajkovic, Ian O'Connor, Gabriela Nicolescu
2011Low latency and energy efficient multicasting schemes for 3D NoC-based SoCs.
Xiaohang Wang, Maurizio Palesi, Mei Yang, Yingtao Jiang, Michael C. Huang, Peng Liu
2011MCM-based implementation of block FIR filters for high-speed and low-power applications.
Pramod Kumar Meher, Yu Pan
2011MUX-MCM based quantization VLSI architecture for H.264/AVC high profile encoder.
Jiang Ying, Xinhua Chen, Yibo Fan, Xiaoyang Zeng
2011Micro CMOS image sensor for multi-area imaging.
Kiyotaka Sasagawa, Hiroyuki Masuda, Ayato Tagawa, Takuma Kobayashi, Toshihiko Noda, Takashi Tokuda, Jun Ohta
2011Minimizing redundancy-based motion estimation design for high-definition.
Jeong Hoon Kim, In Jung Lyu, Hyun June Lyu, Jun Rim Choi
2011Multimodal proton and fluorescence image sensor for bio applications.
Hirokazu Nakazawa, Makoto Ishida, Kazuaki Sawada
2011Multirate hybrid continuous-time/discrete-time cascade 2-2 ΣΔ modulator for wideband telecom.
J. Gerardo García-Sánchez, José M. de la Rosa
2011Network-on-Chip multicasting with low latency path setup.
Wenmin Hu, Zhonghai Lu, Axel Jantsch, Hengzhu Liu, Botao Zhang, Dongpei Liu
2011New 12-bit source-follower track-and-hold circuit suitable for high-speed applications.
Marcel Veloso Campos, André Luís Fortunato, Carlos Alberto dos Reis Filho
2011New SEC-DED-DAEC codes for multiple bit upsets mitigation in memory.
Ming Zhu, Liyi Xiao, Hong Wei Luo
2011On the functional test of Branch Prediction Units based on Branch History Table.
Ernesto Sánchez, Matteo Sonza Reorda, Alberto Paolo Tonda
2011On-chip structure and addressing scheme design for 2-D block data processing in a 64-core array system.
Jing Xie, Huimin Xing, Zhigang Mao
2011Performance evaluation of air-gap-based coaxial RF TSV for 3D NoC.
Le Yu, Haigang Yang, Jia Zhang, Wei Wang
2011Positive realization of reduced RLCM nets.
Jorge Fernandez Villena, L. Miguel Silveira
2011Post-silicon failing-test generation through evolutionary computation.
Ernesto Sánchez, Giovanni Squillero, Alberto Paolo Tonda
2011Prospects of 3D inductors on through silicon vias processes for 3D ICs.
Yiorgos I. Bontzios, Michael G. Dimopoulos, Alkis A. Hatzopoulos
2011Robust design of sub-threshold flip-flop cells for wireless sensor network.
Wei Jin, Sheng Lu, Weifeng He, Zhigang Mao
2011Run-time self-tuning banked loop buffer architecture for power optimization of dynamic workload applications.
Antonio Artés, José Luis Ayala, Ashoka Visweswara Sathanur, Jos Huisken, Francky Catthoor
2011SNM-aware power reduction and reliability improvement in 45nm SRAMs.
Seokjoong Kim, Matthew R. Guthaus
2011STT-RAM based energy-efficiency hybrid cache for CMPs.
Jianhua Li, Chun Jason Xue, Yinlong Xu
2011Self-dependent equivalent circuit modeling of electrostatic comb transducers for integrated MEMS.
Toshiyuki Tsuchiya, Hiroyuki Tokusaki, Yoshikazu Hirai, Koji Sugano, Osamu Tabata
2011Self-test method and recovery mechanism for high frequency TSV array.
Jia Zhang, Le Yu, Haigang Yang, Y. L. Xie, F. B. Zhou, Wei Wang
2011State space optimization within the DEVS model of computation for timing efficiency.
H. Gregor Molter, André Seffrin, Sorin A. Huss
2011System-level infrastructure for boot-time testing and configuration of networks-on-chip with programmable routing logic.
Alberto Ghiribaldi, Daniele Ludovici, Michele Favalli, Davide Bertozzi
2011SystemC AMS behavioral modeling of a CMOS video sensor.
Fabio Cenni, Serge Scotti, Emmanuel Simeu
2011ThruChip interface (TCI) for 3D networks on chip.
Tadahiro Kuroda
2011Topology synthesis of analog circuits with yield optimization and evaluation using pareto fronts.
Oliver Mitea, Markus Meissner, Lars Hedrich
2011Towards future VLSI interconnects using aligned carbon nanotubes.
Yang Chai, Minghui Sun, Zhiyong Xiao, Yuan Li, Min Zhang, Philip C. H. Chan
2011Two-levels of adaptive buffer for virtual channel router in NoCs.
Caroline Concatto, Anelise Kologeski, Luigi Carro, Fernanda Lima Kastensmidt, Gianluca Palermo, Cristina Silvano
2011Uniform carbon nanotube diameter and nanoarray pitch for VLSI of 16nm P-channel MOSFETs.
Yanan Sun, Volkan Kursun
2011Wide-band piezoresistive aero-acoustic microphone.
Zhijian Zhou, Man Wong, Libor Rufer
2011Worst case analysis for evaluating VLSI circuit performance bounds using an optimization method.
Siwat Saibua, Liuxi Qian, Dian Zhou