VLSI-SoC C

75 papers

YearTitle / Authors
201018th IEEE/IFIP VLSI-SoC 2010, IEEE/IFIP WG 10.5 International Conference on Very Large Scale Integration of System-on-Chip, Madrid, Spain, 27-29 September 2010
20104×4-bit array two phase clocked adiabatic static CMOS logic multiplier with new XOR.
Nazrul Anuar, Yasuhiro Takahashi, Toshikazu Sekine
2010A 1-V CMOS ultralow-power receiver front end for the IEEE 802.15.4 standard using tuned passive mixer output pole.
Aaron V. T. Do, Chirn Chye Boon, Manh Anh Do, Kiat Seng Yeo, Alper Cabuk
2010A 1.8-V 3.6-mW 2.4-GHz fully integrated CMOS frequency synthesizer for IEEE 802.15.4.
Manthena Vamshi Krishna, Juan Xie, Manh Anh Do, Chirn Chye Boon, Kiat Seng Yeo, Aaron V. T. Do
2010A 1mm
Christian Benkeser, Andreas Bubenhofer, Qiuting Huang
2010A 36-mW continuous-time sigma-delta modulator with 74db dynamic range and 10-MHz bandwidth.
Kuo-Che Hong, Herming Chiueh
2010A < 1 pJ sub-VT cardiac event detector in 65 nm LL-HVT CMOS.
Joachim Neves Rodrigues, Omer Can Akgun, Viktor Öwall
2010A binary adaptable window SoC architecture for a stereo vision based depth field processor.
Andy Motten, Luc Claesen
2010A broad strategy to detect crosstalk faults in network-on-chip interconnects.
Mariza Botelho, Fernanda Lima Kastensmidt, Marcelo Lubaszewski, Érika F. Cota, Luigi Carro
2010A decimal squarer with efficient partial product generation.
Kuan Jen Lin, Yu Chan Chiu, Tzu-Hao Lin
2010A design workflow for dynamically reconfigurable multi-FPGA systems.
Alessandro Panella, Marco D. Santambrogio, Francesco Redaelli, Fabio Cancare, Donatella Sciuto
2010A fault-aware, reconfigurable and adaptive routing algorithm for NoC applications.
Mojtaba Valinataj, Siamak Mohammadi
2010A high-speed high-resolution low-phase noise oscillator using self-timed rings.
Oussama Elissati, Eslam Yahya, Sébastien Rieubon, Laurent Fesquet
2010A highly linear wide dynamic range detector for cell recording with microelectrode arrays.
Jing Guo, Bing Liu, George Jie Yuan
2010A low-power, high-speed DCT architecture for image compression: Principle and implementation.
Maher Jridi, Ayman Alfalou
2010A new software tool for static analysis of SET sensitiveness in Flash-based FPGAs.
Niccolò Battezzati, Luca Sterpone, Massimo Violante, Filomena Decuzzi
2010A novel reconfigurable scratchpad memory for audio applications on cost-effective SoC.
Ji Kong, Peilin Liu
2010A reconfigurable MPSoC-based QAM modulation architecture.
Christos Ttofis, Agathoklis Papadopoulos, Theocharis Theocharides, Maria K. Michael, Demosthenes Doumenis
2010A single inductor DIDO DC-DC converter for solar energy harvesting applications using band-band control.
Hui Shao, Chi-Ying Tsui, Wing-Hung Ki
2010Adaptive logical control of RF LNA performances for efficient energy consumption.
Rafik Khereddine, Louay Abdallah, Emmanuel Simeu, Salvador Mir, Fabio Cenni
2010An 100MHz to 1.6GHz DLL-based clock generator using a feedback-switching detector.
Ding-Guo Lin, Bing-Hsun Lu, Herming Chiueh
2010An adaptive bilateral motion estimation algorithm and its hardware architecture.
Abdulkadir Akin, Mert Cetin, Burak Erbagci, Ozgur Karakaya, Ilker Hamzaoglu
2010An automatic framework for dynamic data structures optimization in C.
Christos Baloukas, Lazaros Papadopoulos, Robert Pyka, Dimitrios Soudris, Peter Marwedel
2010An improved RNS generator 2
Héctor Pettenghi, Ricardo Chaves, Leonel Sousa, Maria J. Avedillo
2010An optimized lookup-table for the evaluation of sigmoid function for artificial neural networks.
Pramod Kumar Meher
2010Architectural synthesis of DSP circuits under simultaneous error and time constraints.
Gabriel Caffarena, Carlos Carreras
2010Area- and throughput-optimized VLSI architecture of sphere decoding.
Markus Wenk, Lukas Bruderer, Andreas Burg, Christoph Studer
2010Characterization of chip-to-chip wireless interconnections based on capacitive coupling.
Roberto Cardu, Eleonora Franchi, Roberto Guerrieri, Mauro Scandiuzzo, Salvatore Cani, Luca Perugini, Simone Spolzino, Roberto Canegallo
2010Control electronics integration toward endoscopic capsule robot performing legged locomotion and illumination.
Oscar Alonso, Lluis Freixas, Joan Canals, Ekawahyu Susilo, Ángel Dieguez
2010Design and feasibility of multi-Gb/s quasi-serial vertical interconnects based on TSVs for 3D ICs.
Fengda Sun, Alessandro Cevrero, Panagiotis Athanasopoulos, Yusuf Leblebici
2010Design and implementation of MPSoC single chip with butterfly network.
Khawla Hamwi, Omar Hammami
2010Design of low-complexity and high-speed digital Finite Impulse Response filters.
Diego Jaccottet, Eduardo Costa, Levent Aksoy, Paulo F. Flores, José Monteiro
2010Enabling fast Network-on-Chip topology selection: an FPGA-based runtime reconfigurable prototyper.
Paolo Meloni, Simone Secchi, Luigi Raffo
2010Energy aware multimodal embedded video surveillance.
Michele Magno, Alessandro Lanza, Davide Brunelli, Luigi Di Stefano, Luca Benini
2010Enhancing post-silicon processor debug with Incremental Cache state Dumping.
Preeti Ranjan Panda, Anant Vishnoi, M. Balakrishnan
2010Fast fixed-point optimization of DSP algorithms.
Gabriel Caffarena, Carlos Carreras, Juan A. López, Angel Fernandez Herrero
2010Fast forward and inverse transforms for the H.264/AVC standard using hierarchical adder compressors.
João S. Altermann, Eduardo A. C. da Costa, Sergio Bampi
2010Fast legalization for standard cell placement with simultaneous wirelength and displacement minimization.
Tsung-Yi Ho, Sheng-Hung Liu
2010Fine-grained adaptive CMP cache sharing through access history exploitation.
Chengmo Yang, Chun Jason Xue, Alex Orailoglu
2010Fine-grained post placement voltage assignment considering level shifter overhead.
Zohreh Karimi, Majid Sarrafzadeh
2010Fully adaptive multicore architectures through statically-directed dynamic execution reconfigurations.
Chengmo Yang, Alex Orailoglu
2010Hardware integrated quantization solution for improvement of computational H.264 encoder module.
Ronaldo Husemann, Mariano Majolo, Victor Guimarães, Altamiro Amadeu Susin, Valter Roesler, José Valdeni de Lima
2010High-level timing analysis of concurrent applications on MPSoC platforms using memory-aware trace-driven simulations.
Roman Plyaskin, Alejandro Masrur, Martin Geier, Samarjit Chakraborty, Andreas Herkersdorf
2010Latency-aware Utility-based NUCA Cache Partitioning in 3D-stacked multi-processor systems.
Jongpil Jung, Seonpil Kim, Chong-Min Kyung
2010Logic synthesis and testability of D-reducible functions.
Anna Bernasconi, Valentina Ciriani
2010Low complexity montgomery multiplication architecture for elliptic curve cryptography over GF(p
Somsubhra Talapatra, Hafizur Rahaman
2010Model checking on TLM-2.0 IPs through automatic TLM-to-RTL synthesis.
Nicola Bombieri, Franco Fummi, Valerio Guarnieri
2010Network interface to synchronize multiple packets on NoC-based Systems-on-Chip.
Debora Matos, Miklecio Costa, Luigi Carro, Altamiro Amadeu Susin
2010Novel input coding technique for high-precision LUT-based multiplication for DSP applications.
Pramod Kumar Meher
2010Novel ultra low-voltage and high speed domino CMOS logic.
Yngvar Berg
2010On the synthesis of attack tolerant cryptographic hardware.
Jimson Mathew, Savita Banerjee, Hafizur Rahaman, Dhiraj K. Pradhan, Saraju P. Mohanty, Abusaleh M. Jabir
2010Optimal scheduling to minimize non-volatile memory access time with hardware cache.
Wei-Che Tseng, Chun Jason Xue, Qingfeng Zhuge, Jingtong Hu, Edwin Hsing-Mean Sha
2010Order is power: Selective Packet Interleaving for energy efficient Networks-on-Chip.
Amit Berman, Ran Ginosar, Idit Keidar
2010Output probability density functions of logic circuits: Modeling and fault-tolerance evaluation.
Milos Stanisavljevic, Alexandre Schmid, Yusuf Leblebici
2010Power-aware FPGA routing fabrics and design tools.
Shoichi Nishida, Jyunya Eto, Motoki Amagasaki, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi
2010Power-aware partitioning of data converters.
Alberto Bonanno, Alberto Bocca, Alberto Macii, Enrico Macii
2010Reactivation noise suppression with threshold voltage tuning in sequential MTCMOS circuits.
Hailong Jiao, Volkan Kursun
2010Reduction of process variation effect on FPGAs using multiple configurations.
Delasa Aghamirzaie, Seyyed Ahmad Razavi, Morteza Saheb Zamani, Mahdi Nabiyouni
2010SESAM extension for fast MPSoC architectural exploration and dynamic streaming applications.
Nicolas Ventroux, Tanguy Sassolas, Raphaël David, Guillaume Blanc, Alexandre Guerre, Charly Bechara
2010Smart camera SoC system for interactive real-time real-brush based digital painting systems.
Luc Claesen, Peter Vandoren, Tom Van Laerhoven, Andy Motten, Domien Nowicki, Tom De Weyer, Frank Van Reeth, Eddy Flerackers
2010SoCGuard: A runtime verification solution for the functional correctness of SoCs.
Rawan Abdel-Khalek, Valeria Bertacco
2010Spatial EM jamming: A countermeasure against EM Analysis?
François Poucheret, Lyonel Barthe, Pascal Benoit, Lionel Torres, Philippe Maurine, Michel Robert
2010Static ultra-low-voltage high-speed CMOS logic and latches.
Yngvar Berg
2010Supporting circuitry for a fully integrated micro electro mechanical (MEMS) oscillator in 45 nm CMOS technology.
Mohamed Abdelsalam, M. Wahba, M. Abdelmoneum, David Duarte, Yehia Ismail
2010Synchronous duty cycle correction circuit.
Sergey Sofer, Valery Neiman, Eyal Melamed-Cohen
2010Synchronous elasticization: Considerations for correct implementation and MiniMIPS case study.
Eliyah Kilada, Shomit Das, Kenneth S. Stevens
2010TM-FAR: Turn-Model based Fully Adaptive Routing for Networks on Chip.
Wen-Chung Tsai, Kuo-Chih Chu, Sao-Jie Chen, Yu Hen Hu
2010Temperature- and bus traffic- aware data placement in 3D-stacked cache.
Seunghan Lee, Kyungsu Kang, Chong-Min Kyung
2010Timing and interface communication analysis of H.264/AVC encoder using SystemC model.
Bruno Zatt, Cláudio Machado Diniz, Luciano Volcan Agostini, Sergio Bampi
2010Towards reverse engineering the brain: Modeling abstractions and simulation frameworks.
Jayram Moorkanikara Nageswaran, Micah Richert, Nikil D. Dutt, Jeffrey L. Krichmar
2010Towards sustainable exascale computing.
Roberto Gioiosa
2010Trends and techniques for energy efficient architectures.
Víctor Jiménez, Roberto Gioiosa, Eren Kursun, Francisco J. Cazorla, Chen-Yong Cher, Alper Buyuktosunoglu, Pradip Bose, Mateo Valero
2010Ultra low voltage and high speed CMOS flip-flop using floating-gates.
Yngvar Berg
2010Unifying stream based and reconfigurable computing to design application accelerators.
Bruno Francisco, Frederico Pratas, Leonel Sousa
2010VCTA: A Via-Configurable Transistor Array regular fabric.
Marc Pons, Francesc Moll, Antonio Rubio, Jaume Abella, Xavier Vera, Antonio González