SCOPES C

28 papers

YearTitle / Authors
2003A Case Study on a Component-Based System and Its Configuration.
Hiroo Ishikawa, Tatsuo Nakajima
2003A Code Selection Method for SIMD Processors with PACK Instructions.
Hiroaki Tanaka, Shinsuke Kobayashi, Yoshinori Takeuchi, Keishi Sakanushi, Masaharu Imai
2003A Framework for the Design and Validation of Efficient Fail-Safe Fault-Tolerant Programs.
Arshad Jhumka, Neeraj Suri, Martin Hiller
2003An Unfolding-Based Loop Optimization Technique.
Litong Song, Krishna M. Kavi, Ron Cytron
2003Cache Behavior Modeling of Codes with Data-Dependent Conditionals.
Diego Andrade, Basilio B. Fraguela, Ramon Doallo
2003Case Studies on Automatic Extraction of Target-Specific Architectural Parameters in Complex Code Generation.
Yunheung Paek, Minwook Ahn, Soonho Lee
2003Code Generation for Packet Header Intrusion Analysis on the IXP1200 Network Processor.
Ioannis Charitakis, Dionisios N. Pnevmatikatos, Evangelos P. Markatos, Kostas G. Anagnostakis
2003Code Generation for a Dual Instruction Set Processor Based on Selective Code Transformation.
Sheayun Lee, Jaejin Lee, Sang Lyul Min, Jason Hiser, Jack W. Davidson
2003Code Instruction Selection Based on SSA-Graphs.
Erik Eckstein, Oliver König, Bernhard Scholz
2003Composable Code Generation for Model-Based Development.
Kirk Schloegel, David Oglesby, Eric Engstrom, Devesh Bhatt
2003Control Flow Analysis for Recursion Removal.
Stefaan Himpe, Francky Catthoor, Geert Deconinck
2003Efficient Variable Allocation to Dual Memory Banks of DSPs.
Viera Sipková
2003Extraction of Efficient Instruction Schedulers from Cycle-True Processor Models.
Oliver Wahlen, Manuel Hohenauer, Gunnar Braun, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Xiaoning Nie
2003FICO: A Fast Instruction Cache Optimizer.
Marco Garatti
2003Fine-Grain Register Allocation Based on a Global Spill Costs Analysis.
Dae-Hwan Kim, Hyuk-Jae Lee
2003Improving Offset Assignment through Simultaneous Variable Coalescing.
Desiree Ottoni, Guilherme Ottoni, Guido Araujo, Rainer Leupers
2003Limited Address Range Architecture for Reducing Code Size in Embedded Processors.
Qin Zhao, Bart Mesman, Henk Corporaal
2003Partitioning for DSP Software Synthesis.
Ming-Yung Ko, Shuvra S. Bhattacharyya
2003Performance Analysis for Identification of (Sub-)Task-Level Parallelism in Java.
Richard Stahl, Robert Pasko, Luc Rijnders, Diederik Verkest, Serge Vernalde, Rudy Lauwereins, Francky Catthoor
2003Predicated Instructions for Code Compaction.
Warren Cheung, William S. Evans, Jeremy Moses
2003Reconstructing Control Flow from Predicated Assembly Code.
Björn Decker, Daniel Kästner
2003Retargetable Graph-Coloring Register Allocation for Irregular Architectures.
Johan Runeson, Sven-Olof Nyström
2003Software and Compilers for Embedded Systems, 7th International Workshop, SCOPES 2003, Vienna, Austria, September 24-26, 2003, Proceedings
Andreas Krall
2003Tailoring Software Pipelining for Effective Exploitation of Zero Overhead Loop Buffer.
Gang-Ryung Uh
2003The Transmeta Crusoe: VLIW Embedded in CISC.
James C. Dehnert
2003Towards Superinstructions for Java Interpreters.
Kevin Casey, David Gregg, M. Anton Ertl, Andrew Nisbet
2003Transformation of Meta-Information by Abstract Co-interpretation.
Raimund Kirner, Peter P. Puschner
2003Unified Instruction Reordering and Algebraic Transformations for Minimum Cost Offset Assignment.
V. V. N. S. Sarvani, R. Govindarajan