RSP C

21 papers

YearTitle / Authors
2013A flexible framework for modeling and simulation of multipurpose wireless networks.
Vinicius Bohrer, Ramon Fernandes, César A. M. Marcon, Thais Webber, Leticia B. Poehls, Ricardo M. Czekster, Fabiano Hessel
2013A framework for instruction encoding designs on embedded processors.
Ricardo Santos, Renan A. Marks, Renato Santos
2013An implementation of a distributed fault-tolerant mechanism for 2D mesh NoCs.
César A. M. Marcon, Alexandre M. Amory, Felipe T. Bortolon, Thais Webber, Thomas Volpato, Jader Munareto
2013BaBaNoC: An asynchronous network-on-chip described in Balsa.
Matheus T. Moreira, Felipe G. Magalhaes, Matheus Gibiluka, Fabiano Hessel, Ney Laert Vilar Calazans
2013Customizable RTOS to support communication infrastructures and to improve design space exploration in MPSoCs.
Alexandra Aguiar, Sergio Johann Filho, Felipe Gohring de Magalhaes, Fabiano Hessel
2013Embedded system verification through constraint-based scheduling.
Olfat El-Mahi, Gilles Pesant, Gabriela Nicolescu, Giovanni Beltrame
2013Emulation-based design evaluation of reader/smart card systems.
Norbert Druml, Manuel Menghin, Daniel Kroisleitner, Christian Steger, Reinhold Weiss, Holger Bock, Josef Haid
2013Enforcing software engineering tools interoperability: An example with AADL subsets.
Vincent Gaudel, Frank Singhoff, Alain Plantec, Jérôme Hugues, Pierre Dissaux, Jérôme Legrand
2013FPGA-based HPC application design for non-experts.
David Uliana, Krzysztof Kepa, Peter Athanas
2013FlexOE: A congestion-aware routing algorithm for NoCs.
Otávio Alcântara de Lima Júnior, Virginie Fresse, Frédéric Rousseau
2013MAMPSx: A design framework for rapid synthesis of predictable heterogeneous MPSoCs.
Shakith Fernando, Firew Siyoum, Yifan He, Akash Kumar, Henk Corporaal
2013Performance modeling for designing NoC-based multiprocessors.
Takashi Nakada, Shinobu Miwa, Keisuke Y. Yano, Hiroshi Nakamura
2013Proceedings of the 24th IEEE International Symposium on Rapid System Prototyping, RSP 2013, Montreal, QC, Canada, October 3-4, 2013
2013Quota setting router architecture for quality of service in GALS NoC.
Kazem Cheshmi, Mohammadreza Soltaniyeh, Siamak Mohammadi, Jelena Trajkovic
2013Rapid design and prototyping of a reconfigurable decoder architecture for QC-LDPC codes.
Purushotham Murugappa, Vianney Lapotre, Amer Baghdadi, Michel Jézéquel
2013Rapid safety evaluation of hardware architectural designs compliant with ISO 26262.
Nico Adler, Stefan Otten, Markus Mohrhard, Klaus D. Müller-Glaser
2013Routing algorithm for multi-FPGA based systems using multi-point physical tracks.
Qingshan Tang, Matthieu Tuna, Habib Mehrez
2013SMASH: A heuristic methodology for designing partially reconfigurable MPSoCs.
Riccardo Cattaneo, Christian Pilato, Gianluca Durelli, Marco Domenico Santambrogio, Donatella Sciuto
2013Seamless integration of HW/SW components in a HLS-based SoC design environment.
Tiago Rogério Mück, Antônio Augusto Fröhlich
2013Visual exploration of changing FPGA architectures in the VTR project.
Konstantin Nasartschuk, Rainer Herpers, Kenneth B. Kent
2013YAPPA: A compiler-based parallelization framework for irregular applications on MPSoCs.
Silvia Lovergine, Antonino Tumeo, Oreste Villa, Fabrizio Ferrandi