MICRO A*

75 papers

YearTitle / Authors
201851st Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 2018, Fukuoka, Japan, October 20-24, 2018
2018A Network-Centric Hardware/Algorithm Co-Design to Accelerate Distributed Training of Deep Neural Networks.
Youjie Li, Jongse Park, Mohammad Alian, Yifan Yuan, Zheng Qu, Peitian Pan, Ren Wang, Alexander G. Schwing, Hadi Esmaeilzadeh, Nam Sung Kim
2018ASPEN: A Scalable In-SRAM Architecture for Pushdown Automata.
Kevin Angstadt, Arun Subramaniyan, Elaheh Sadredini, Reza Rahimi, Kevin Skadron, Westley Weimer, Reetuparna Das
2018Adaptive Scheduling for Systems with Asymmetric Memory Hierarchies.
Po-An Tsai, Changping Chen, Daniel Sánchez
2018Amber*: Enabling Precise Full-System Simulation with Detailed Modeling of All SSD Resources.
Donghyun Gouk, Miryeong Kwon, Jie Zhang, Sungjoon Koh, Wonil Choi, Nam Sung Kim, Mahmut T. Kandemir, Myoungsoo Jung
2018An Architectural Framework for Accelerating Dynamic Parallel Algorithms on Reconfigurable Hardware.
Tao Chen, Shreesha Srinath, Christopher Batten, G. Edward Suh
2018Application-Transparent Near-Memory Processing Architecture with Memory Channel Network.
Mohammad Alian, Seungwon Min, Hadi Asgharimoghaddam, Ashutosh Dhar, Dong Kai Wang, Thomas Roewer, Adam J. McPadden, Oliver O'Halloran, Deming Chen, Jinjun Xiong, Daehoon Kim, Wen-mei W. Hwu, Nam Sung Kim
2018Architectural Support for Efficient Large-Scale Automata Processing.
Hongyuan Liu, Mohamed Assem Ibrahim, Onur Kayiran, Sreepathi Pai, Adwait Jog
2018Architectural Support for Probabilistic Branches.
Almutaz Adileh, David J. Lilja, Lieven Eeckhout
2018Attaché: Towards Ideal Memory Compression by Mitigating Metadata Bandwidth Overheads.
Seokin Hong, Prashant Jayaprakash Nair, Bülent Abali, Alper Buyuktosunoglu, Kyu-Hyoun Kim, Michael B. Healy
2018Beyond the Memory Wall: A Case for Memory-Centric HPC System for Deep Learning.
Youngeun Kwon, Minsoo Rhu
2018CABLE: A CAche-Based Link Encoder for Bandwidth-Starved Manycores.
Tri Minh Nguyen, Adi Fuchs, David Wentzlaff
2018CEASER: Mitigating Conflict-Based Cache Attacks via Encrypted-Address and Remapping.
Moinuddin K. Qureshi
2018CHAMELEON: A Dynamically Reconfigurable Heterogeneous Memory System.
Jagadish B. Kotra, Haibo Zhang, Alaa R. Alameldeen, Chris Wilkerson, Mahmut T. Kandemir
2018CSE: Parallel Finite State Machines with Convergence Set Enumeration.
Youwei Zhuo, Jinglei Cheng, Qinyi Luo, Jidong Zhai, Yanzhi Wang, Zhongzhi Luan, Xuehai Qian
2018Cambricon-S: Addressing Irregularity in Sparse Neural Networks through A Cooperative Software/Hardware Approach.
Xuda Zhou, Zidong Du, Qi Guo, Shaoli Liu, Chengsi Liu, Chao Wang, Xuehai Zhou, Ling Li, Tianshi Chen, Yunji Chen
2018CheckMate: Automated Synthesis of Hardware Exploits and Security Litmus Tests.
Caroline Trippel, Daniel Lustig, Margaret Martonosi
2018Combining HW/SW Mechanisms to Improve NUMA Performance of Multi-GPU Systems.
Vinson Young, Aamer Jaleel, Evgeny Bolotin, Eiman Ebrahimi, David W. Nellans, Oreste Villa
2018Composable Building Blocks to Open up Processor Design.
Sizhuo Zhang, Andrew Wright, Thomas Bourgeat, Arvind
2018Comprehensive Evaluation of Supply Voltage Underscaling in FPGA on-Chip Memories.
Behzad Salami, Osman S. Unsal, Adrián Cristal Kestelman
2018Compresso: Pragmatic Main Memory Compression.
Esha Choukse, Mattan Erez, Alaa R. Alameldeen
2018CounterMiner: Mining Big Performance Data from Hardware Counters.
Yirong Lv, Bin Sun, Qingyi Luo, Jing Wang, Zhibin Yu, Xuehai Qian
2018CritICs Critiquing Criticality in Mobile Apps.
Prasanna Venkatesh Rengasamy, Haibo Zhang, Shulin Zhao, Nachiappan Chidambaram Nachiappan, Anand Sivasubramaniam, Mahmut T. Kandemir, Chita R. Das
2018DAWG: A Defense Against Cache Timing Attacks in Speculative Execution Processors.
Vladimir Kiriansky, Ilia A. Lebedev, Saman P. Amarasinghe, Srinivas Devadas, Joel S. Emer
2018Diffy: a Déjà vu-Free Differential Deep Neural Network Accelerator.
Mostafa Mahmoud, Kevin Siu, Andreas Moshovos
2018Duplicon Cache: Mitigating Off-Chip Memory Bank and Bank Group Conflicts Via Data Duplication.
Ben Lin, Michael B. Healy, Rustam Miftakhutdinov, Philip G. Emma, Yale N. Patt
2018EMPROF: Memory Profiling Via EM-Emanation in IoT and Hand-Held Devices.
Moumita Dey, Alireza Nazari, Alenka G. Zajic, Milos Prvulovic
2018Efficient Hardware-Assisted Logging with Asynchronous and Direct-Update for Persistent Memory.
Jungi Jeong, Chang Hyun Park, Jaehyuk Huh, Seungryoul Maeng
2018End-to-End Automated Exploit Generation for Validating the Security of Processor Designs.
Rui Zhang, Calvin Deutschbein, Peng Huang, Cynthia Sturton
2018Error Correlation Prediction in Lockstep Processors for Safety-Critical Systems.
Emre Ozer, Balaji Venu, Xabier Iturbe, Shidhartha Das, Spyros Lyberis, John Biggs, Peter Harrod, John Penton
2018Exploiting Locality in Graph Analytics through Hardware-Accelerated Traversal Scheduling.
Anurag Mukkara, Nathan Beckmann, Maleen Abeydeera, Xiaosong Ma, Daniel Sánchez
2018Exploring and Optimizing Chipkill-Correct for Persistent Memory Based on High-Density NVRAMs.
Da Zhang, Vilas Sridharan, Xun Jian
2018Farewell My Shared LLC! A Case for Private Die-Stacked DRAM Caches for Servers.
Amna Shahab, Mingcan Zhu, Artemiy Margaritov, Boris Grot
2018Fault Site Pruning for Practical Reliability Analysis of GPGPU Applications.
Bin Nie, Lishan Yang, Adwait Jog, Evgenia Smirni
2018FineReg: Fine-Grained Register File Management for Augmenting GPU Throughput.
Yunho Oh, Myung Kuk Yoon, William J. Song, Won Woo Ro
2018GeneSys: Enabling Continuous Learning through Neural Network Evolution in Hardware.
Ananda Samajdar, Parth Mannan, Kartikay Garg, Tushar Krishna
2018Harmonizing Speculative and Non-Speculative Execution in Architectures for Ordered Parallelism.
Mark C. Jeffrey, Victor A. Ying, Suvinay Subramanian, Hyun Ryong Lee, Joel S. Emer, Daniel Sánchez
2018Improving the Performance and Endurance of Encrypted Non-Volatile Main Memory through Deduplicating Writes.
Pengfei Zuo, Yu Hua, Ming Zhao, Wen Zhou, Yuncheng Guo
2018In-Register Parameter Caching for Dynamic Neural Nets with Virtual Persistent Processor Specialization.
Farzad Khorasani, Hodjat Asghari Esfeden, Nael B. Abu-Ghazaleh, Vivek Sarkar
2018Inter-Thread Communication in Multithreaded, Reconfigurable Coarse-Grain Arrays.
Dani Voitsechov, Oron Port, Yoav Etsion
2018Invalid Data-Aware Coding to Enhance the Read Performance of High-Density Flash Memories.
Wonil Choi, Myoungsoo Jung, Mahmut T. Kandemir
2018InvisiSpec: Making Speculative Execution Invisible in the Cache Hierarchy.
Mengjia Yan, Jiho Choi, Dimitrios Skarlatos, Adam Morrison, Christopher W. Fletcher, Josep Torrellas
2018LerGAN: A Zero-Free, Low Data Movement and PIM-Based GAN Architecture.
Haiyu Mao, Mingcong Song, Tao Li, Yuting Dai, Jiwu Shu
2018Leveraging CPU Electromagnetic Emanations for Voltage Noise Characterization.
Zacharias Hadjilambrou, Shidhartha Das, Marco A. Antoniades, Yiannakis Sazeides
2018MAVBench: Micro Aerial Vehicle Benchmarking.
Behzad Boroujerdian, Hasan Genc, Srivatsan Krishnan, Wenzhi Cui, Aleksandra Faust, Vijay Janapa Reddi
2018MDACache: Caching for Multi-Dimensional-Access Memories.
Sumitha George, Minli Julie Liao, Huaipan Jiang, Jagadish B. Kotra, Mahmut T. Kandemir, Jack Sampson, Vijaykrishnan Narayanan
2018Magic-State Functional Units: Mapping and Scheduling Multi-Level Distillation Circuits for Fault-Tolerant Quantum Architectures.
Yongshan Ding, Adam Holmes, Ali Javadi-Abhari, Diana Franklin, Margaret Martonosi, Frederic T. Chong
2018Morph: Flexible Acceleration for 3D CNN-Based Video Understanding.
Kartik Hegde, Rohit Agrawal, Yulun Yao, Christopher W. Fletcher
2018Morphable Counters: Enabling Compact Integrity Trees For Low-Overhead Secure Memories.
Gururaj Saileshwar, Prashant J. Nair, Prakash Ramrakhyani, Wendy Elsasser, José A. Joao, Moinuddin K. Qureshi
2018Multi-dimensional Parallel Training of Winograd Layer on Memory-Centric Architecture.
Byungchul Hong, Yeonju Ro, John Kim
2018Neighborhood-Aware Address Translation for Irregular GPU Applications.
Seunghee Shin, Michael LeBeane, Yan Solihin, Arkaprava Basu
2018Osiris: A Low-Cost Mechanism to Enable Restoration of Secure Non-Volatile Memories.
Mao Ye, Clayton Hughes, Amro Awad
2018Performance Improvement by Prioritizing the Issue of the Instructions in Unconfident Branch Slices.
Hideki Ando
2018PermDNN: Efficient Compressed DNN Architecture with Permuted Diagonal Matrices.
Chunhua Deng, Siyu Liao, Yi Xie, Keshab K. Parhi, Xuehai Qian, Bo Yuan
2018Persistence Parallelism Optimization: A Holistic Approach from Memory Bus to RDMA Network.
Xing Hu, Matheus Ogleari, Jishen Zhao, Shuangchen Li, Abanti Basak, Yuan Xie
2018PiCL: A Software-Transparent, Persistent Cache Log for Nonvolatile Main Memory.
Tri Minh Nguyen, David Wentzlaff
2018PipeProof: Automated Memory Consistency Proofs for Microarchitectural Specifications.
Yatin A. Manerkar, Daniel Lustig, Margaret Martonosi, Aarti Gupta
2018Processing-in-Memory for Energy-Efficient Neural Network Training: A Heterogeneous Approach.
Jiawen Liu, Hengyu Zhao, Matheus A. Ogleari, Dong Li, Jishen Zhao
2018Reducing DRAM Latency via Charge-Level-Aware Look-Ahead Partial Restoration.
Yaohua Wang, Arash Tavakkol, Lois Orosa, Saugata Ghose, Nika Mansouri-Ghiasi, Minesh Patel, Jeremie S. Kim, Hasan Hassan, Mohammad Sadrosadati, Onur Mutlu
2018Rethinking the Memory Hierarchy for Modern Languages.
Po-An Tsai, Yee Ling Gan, Daniel Sánchez
2018RpStacks-MT: A High-Throughput Design Evaluation Methodology for Multi-Core Processors.
Hanhwi Jang, Jae-Eon Jo, Jaewon Lee, Jangwoo Kim
2018SCOPE: A Stochastic Computing Engine for DRAM-Based In-Situ Accelerator.
Shuangchen Li, Alvin Oliver Glova, Xing Hu, Peng Gu, Dimin Niu, Krishna T. Malladi, Hongzhong Zheng, Bob Brennan, Yuan Xie
2018SSDcheck: Timely and Accurate Prediction of Irregular Behaviors in Black-Box SSDs.
Joonsung Kim, Pyeongsu Park, Jaehyung Ahn, Jihun Kim, Jong Kim, Jangwoo Kim
2018STRAIGHT: Hazardless Processor Architecture Without Register Renaming.
Hidetsugu Irie, Toru Koizumi, Akifumi Fukuda, Seiya Akaki, Satoshi Nakae, Yutaro Bessho, Ryota Shioya, Takahiro Notsu, Katsuhiro Yoda, Teruo Ishihara, Shuichi Sakai
2018Sampler: PMU-Based Sampling to Detect Memory Errors Latent in Production Software.
Sam Silvestro, Hongyu Liu, Tong Zhang, Changhee Jung, Dongyoon Lee, Tongping Liu
2018Scalable Distributed Last-Level TLBs Using Low-Latency Interconnects.
Srikant Bharadwaj, Guilherme Cox, Tushar Krishna, Abhishek Bhattacharjee
2018Shadow Block: Accelerating ORAM Accesses with Data Duplication.
Xian Zhang, Guangyu Sun, Peichen Xie, Chao Zhang, Yannan Liu, Lingxiao Wei, Qiang Xu, Chun Jason Xue
2018SwapCodes: Error Codes for Hardware-Software Cooperative GPU Pipeline Error Detection.
Michael B. Sullivan, Siva Kumar Sastry Hari, Brian Zimmer, Timothy Tsai, Stephen W. Keckler
2018TAPAS: Generating Parallel Accelerators from Parallel Programs.
Steve Margerm, Amirali Sharifian, Apala Guha, Arrvindh Shriraman, Gilles Pokam
2018Taming the Killer Microsecond.
Shenghsun Cho, Amoghavarsha Suresh, Tapti Palit, Michael Ferdman, Nima Honarmand
2018The EH Model: Early Design Space Exploration of Intermittent Processor Architectures.
Joshua San Miguel, Karthik Ganesan, Mario Badr, Chunqiu Xia, Rose Li, Hsuan Hsiao, Natalie D. Enright Jerger
2018The Superfluous Load Queue.
Alberto Ros, Stefanos Kaxiras
2018Towards Memory Friendly Long-Short Term Memory Networks (LSTMs) on Mobile GPUs.
Xingyao Zhang, Chenhao Xie, Jing Wang, Weidong Zhang, Xin Fu
2018Voltage-Stacked GPUs: A Control Theory Driven Cross-Layer Solution for Practical Voltage Stacking in GPUs.
An Zou, Jingwen Leng, Xin He, Yazhou Zu, Christopher D. Gill, Vijay Janapa Reddi, Xuan Zhang
2018iDO: Compiler-Directed Failure Atomicity for Nonvolatile Memory.
Qingrui Liu, Joseph Izraelevitz, Se Kwon Lee, Michael L. Scott, Sam H. Noh, Changhee Jung