MICRO A*

43 papers

YearTitle / Authors
200639th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-39 2006), 9-13 December 2006, Orlando, Florida, USA
2006A Floorplan-Aware Dynamic Inductive Noise Controller for Reliable Processor Design.
Fayez Mohamood, Michael B. Healy, Sung Kyu Lim, Hsien-Hsin S. Lee
2006A Predictive Performance Model for Superscalar Processors.
P. J. Joseph, Kapil Vaswani, Matthew J. Thazhuthaveetil
2006ASR: Adaptive Selective Replication for CMP Caches.
Bradford M. Beckmann, Michael R. Marty, David A. Wood
2006Adaptive Caches: Effective Shaping of Cache Behavior to Workloads.
Ranjith Subramanian, Yannis Smaragdakis, Gabriel H. Loh
2006An Analysis of Efficient Multi-Core Global Power Management Policies: Maximizing Performance for a Given Power Budget.
Canturk Isci, Alper Buyuktosunoglu, Chen-Yong Cher, Pradip Bose, Margaret Martonosi
2006Architectural Support for Software Transactional Memory.
Bratin Saha, Ali-Reza Adl-Tabatabai, Quinn Jacobson
2006Authentication Control Point and Its Implications For Secure Processor Design.
Weidong Shi, Hsien-Hsin S. Lee
2006CAPSULE: Hardware-Assisted Parallel Execution of Component-Based Programs.
Pierre Palatin, Yves Lhuillier, Olivier Temam
2006Coherence Ordering for Ring-based Chip Multiprocessors.
Michael R. Marty, Mark D. Hill
2006DMDC: Delayed Memory Dependence Checking through Age-Based Filtering.
Fernando Castro, Luis Piñuel, Daniel Chaver, Manuel Prieto, Michael C. Huang, Francisco Tirado
2006Data-Dependency Graph Transformations for Superblock Scheduling.
Mark Heffernan, Kent D. Wilken, Ghassan Shobaki
2006Dataflow Predication.
Aaron Smith, Ramadass Nagarajan, Karthikeyan Sankaralingam, Robert G. McDonald, Doug Burger, Stephen W. Keckler, Kathryn S. McKinley
2006Die Stacking (3D) Microarchitecture.
Bryan Black, Murali Annavaram, Ned Brekelbaum, John DeVale, Lei Jiang, Gabriel H. Loh, Don McCaule, Patrick Morrow, Donald W. Nelson, Daniel Pantuso, Paul Reed, Jeff Rupley, Sadasivan Shankar, John Paul Shen, Clair Webb
2006Distributed Microarchitectural Protocols in the TRIPS Prototype Processor.
Karthikeyan Sankaralingam, Ramadass Nagarajan, Robert G. McDonald, Rajagopalan Desikan, Saurabh Drolia, M. S. Govindan, Paul Gratz, Divya Gulati, Heather Hanson, Changkyu Kim, Haiming Liu, Nitya Ranganathan, Simha Sethumadhavan, Sadia Sharif, Premkishore Shivakumar, Stephen W. Keckler, Doug Burger
2006Diverge-Merge Processor (DMP): Dynamic Predicated Execution of Complex Control-Flow Graphs Based on Frequently Executed Paths.
Hyesoon Kim, José A. Joao, Onur Mutlu, Yale N. Patt
2006Dynamic Standby Prediction for Leakage Tolerant Microprocessor Functional Units.
Ahmed Youssef, Mohab Anis, Mohamed I. Elmasry
2006Exploiting Fine-Grained Data Parallelism with Chip Multiprocessors and Fast Barriers.
Jack Sampson, Rubén González, Jean-Francois Collard, Norman P. Jouppi, Michael S. Schlansker, Brad Calder
2006Fair Queuing Memory Systems.
Kyle J. Nesbit, Nidhi Aggarwal, James Laudon, James E. Smith
2006Fairness and Throughput in Switch on Event Multithreading.
Ron Gabor, Shlomo Weiss, Avi Mendelson
2006Fire-and-Forget: Load/Store Scheduling with No Store Queue at All.
Samantika Subramaniam, Gabriel H. Loh
2006In-Network Cache Coherence.
Noel Eisley, Li-Shiuan Peh, Li Shang
2006LIFT: A Low-Overhead Practical Information Flow Tracking System for Detecting Security Attacks.
Feng Qin, Cheng Wang, Zhenmin Li, Ho-Seop Kim, Yuanyuan Zhou, Youfeng Wu
2006Leveraging Optical Technology in Future Bus-based Chip Multiprocessors.
Nevin Kirman, Meyrem Kirman, Rajeev K. Dokania, José F. Martínez, Alyssa B. Apsel, Matthew A. Watkins, David H. Albonesi
2006Live, Runtime Phase Monitoring and Prediction on Real Systems with Application to Dynamic Power Management.
Canturk Isci, Gilberto Contreras, Margaret Martonosi
2006Managing Distributed, Shared L2 Caches through OS-Level Page Allocation.
Sangyeun Cho, Lei Jin
2006Memory Prefetching Using Adaptive Stream Detection.
Ibrahim Hur, Calvin Lin
2006Memory Protection through Dynamic Access Control.
Kun Zhang, Tao Zhang, Santosh Pande
2006Merging Head and Tail Duplication for Convergent Hyperblock Formation.
Bertrand A. Maher, Aaron Smith, Doug Burger, Kathryn S. McKinley
2006Mitigating the Impact of Process Variations on Processor Register Files and Execution Units.
Xiaoyao Liang, David M. Brooks
2006Molecular Caches: A caching structure for dynamic creation of application-specific Heterogeneous cache regions.
Keshavan Varadarajan, S. K. Nandy, Vishal Sharda, Bharadwaj Amrutur, Ravi R. Iyer, Srihari Makineni, Donald Newell
2006NoSQ: Store-Load Communication without a Store Queue.
Tingting Sha, Milo M. K. Martin, Amir Roth
2006PathExpander: Architectural Support for Increasing the Path Coverage of Dynamic Bug Detection.
Shan Lu, Pin Zhou, Wei Liu, Yuanyuan Zhou, Josep Torrellas
2006Phoenix: Detecting and Recovering from Permanent Processor Design Bugs with Programmable Hardware.
Smruti R. Sarangi, Abhishek Tiwari, Josep Torrellas
2006Reunion: Complexity-Effective Multicore Redundancy.
Jared C. Smolens, Brian T. Gold, Babak Falsafi, James C. Hoe
2006Scalable Cache Miss Handling for High Memory-Level Parallelism.
James Tuck, Luis Ceze, Josep Torrellas
2006Serialization-Aware Mini-Graphs: Performance with Fewer Resources.
Anne Bracy, Amir Roth
2006Support for High-Frequency Streaming in CMPs.
Ram Rangan, Neil Vachharajani, Adam Stoler, Guilherme Ottoni, David I. August, George Z. N. Cai
2006Using Branch Correlation to Identify Infeasible Paths for Anomaly Detection.
Xiaotong Zhuang, Tao Zhang, Santosh Pande
2006Utility-Based Cache Partitioning: A Low-Overhead, High-Performance, Runtime Mechanism to Partition Shared Caches.
Moinuddin K. Qureshi, Yale N. Patt
2006ViChaR: A Dynamic Virtual Channel Regulator for Network-on-Chip Routers.
Chrysostomos Nicopoulos, Dongkook Park, Jongman Kim, Narayanan Vijaykrishnan, Mazin S. Yousif, Chita R. Das
2006Virtually Pipelined Network Memory.
Banit Agrawal, Timothy Sherwood
2006Yield-Aware Cache Architectures.
Serkan Ozdemir, Debjit Sinha, Gokhan Memik, Jonathan Adams, Hai Zhou