MICRO A*

34 papers

YearTitle / Authors
2005"Flea-flicker" Multipass Pipelining: An Alternative to the High-Power Out-of-Order Offense.
Ronald D. Barnes, Shane Ryoo, Wen-mei W. Hwu
200538th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-38 2005), 12-16 November 2005, Barcelona, Spain
2005A Criticality Analysis of Clustering in Superscalar Processors.
Pierre Salverda, Craig B. Zilles
2005A Dynamic Compilation Framework for Controlling Microprocessor Energy and Performance.
Qiang Wu, Margaret Martonosi, Douglas W. Clark, Vijay Janapa Reddi, Dan Connors, Youfeng Wu, Jin Lee, David M. Brooks
2005A Mechanism for Online Diagnosis of Hard Faults in Microprocessors.
Fred A. Bower, Daniel J. Sorin, Sule Ozev
2005A Quantum Logic Array Microarchitecture: Scalable Quantum Data Movement and Computation.
Tzvetan S. Metodi, Darshan D. Thaker, Andrew W. Cross
2005Address-Indexed Memory Disambiguation and Store-to-Load Forwarding.
Sam S. Stone, Kevin M. Woley, Matthew I. Frank
2005Address-Value Delta (AVD) Prediction: Increasing the Effectiveness of Runahead Execution by Exploiting Regular Memory Allocation Patterns.
Onur Mutlu, Hyesoon Kim, Yale N. Patt
2005Automatic Thread Extraction with Decoupled Software Pipelining.
Guilherme Ottoni, Ram Rangan, Adam Stoler, David I. August
2005Balancing Resource Utilization to Mitigate Power Density in Processor Pipelines.
Michael D. Powell, Ethan Schuchman, T. N. Vijaykumar
2005Cherry-MP: Correctly Integrating Checkpointed Early Resource Recycling in Chip Multiprocessors.
Meyrem Kirman, Nevin Kirman, José F. Martínez
2005Continuous Path and Edge Profiling.
Michael D. Bond, Kathryn S. McKinley
2005Cost Sensitive Modulo Scheduling in a Loop Accelerator Synthesis System.
Kevin Fan, Manjunath Kudlur, Hyunchul Park, Scott A. Mahlke
2005Dynamic Helper Threaded Prefetching on the Sun UltraSPARC CMP Processor.
Jiwei Lu, Abhinav Das, Wei-Chung Hsu, Khoa Nguyen, Santosh G. Abraham
2005Efficient Use of Invisible Registers in Thumb Code.
Arvind Krishnaswamy, Rajiv Gupta
2005Exploiting Vector Parallelism in Software Pipelined Loops.
Samuel Larsen, Rodric M. Rabbah, Saman P. Amarasinghe
2005How to Fake 1000 Registers.
David W. Oehmke, Nathan L. Binkert, Trevor N. Mudge, Steven K. Reinhardt
2005Improving Region Selection in Dynamic Optimization Systems.
David Hiniker, Kim M. Hazelwood, Michael D. Smith
2005Incremental Commit Groups for Non-Atomic Trace Processing.
Matt T. Yourst, Kanad Ghose
2005Message from the General Chairs.
2005Message from the Program Co-Chairs.
2005Pinot: Speculative Multi-threading Processor Architecture Exploiting Parallelism over a Wide Range of Granularities.
Taku Ohsawa, Masamichi Takagi, Shoji Kawahara, Satoshi Matsushita
2005ReSlice: Selective Re-Execution of Long-Retired Misspeculated Instructions Using Forward Slicing.
Smruti R. Sarangi, Wei Liu, Yuanyuan Zhou
2005Reducing Instruction Fetch Cost by Packing Instructions into RegisterWindows.
Stephen Hines, Gary S. Tyson, David B. Whalley
2005Scalable Store-Load Forwarding via Store Queue Index Prediction.
Tingting Sha, Milo M. K. Martin, Amir Roth
2005Shader Performance Analysis on a Modern GPU Architecture.
Victor Moya Del Barrio, Carlos González, Jordi Roca, Agustín Fernández, Roger Espasa
2005Store Memory-Level Parallelism Optimizations for Commercial Applications.
Yuan Chou, Lawrence Spracklen, Santosh G. Abraham
2005Stream Programming on General-Purpose Processors.
Jayanth Gummaraju, Mendel Rosenblum
2005The Cell Processor Architecture.
James A. Kahle
2005The Future Evolution of High-Performance Microprocessors.
Norman P. Jouppi
2005The TM3270 Media-Processor.
Jan-Willem van de Waerdt, Stamatis Vassiliadis, Sanjeev Das, Sebastian Mirolo, Chris Yen, Bill Zhong, Carlos Basto, Jean-Paul van Itegem, Dinesh Amirtharaj, Kulbhushan Kalra, Pedro Rodriguez, Hans Van Antwerpen
2005Thermal Management of On-Chip Caches Through Power Density Minimization.
Ja Chun Ku, Serkan Ozdemir, Gokhan Memik, Yehea I. Ismail
2005Wish Branches: Combining Conditional Branching and Predication for Adaptive Predicated Execution.
Hyesoon Kim, Onur Mutlu, Jared Stark, Yale N. Patt
2005uComplexity: Estimating Processor Design Effort.
Cyrus Bazeghi, Francisco J. Mesa-Martinez, Jose Renau