| 2001 | A code decompression architecture for VLIW processors. Yuan Xie, Wayne H. Wolf, Haris Lekatsas |
| 2001 | A design space evaluation of grid processor architectures. Ramadass Nagarajan, Karthikeyan Sankaralingam, Doug Burger, Stephen W. Keckler |
| 2001 | A high-speed dynamic instruction scheduling scheme for superscalar processors. Masahiro Goshima, Kengo Nishino, Toshiaki Kitamura, Yasuhiko Nakashima, Shinji Tomita, Shin-ichiro Mori |
| 2001 | Cool-cache for hot multimedia. Osman S. Unsal, Raksit Ashok, Israel Koren, C. Mani Krishna, Csaba Andras Moritz |
| 2001 | Correctly implementing value prediction in microprocessors that support multithreading or multiprocessing. Milo M. K. Martin, Daniel J. Sorin, Harold W. Cain, Mark D. Hill, Mikko H. Lipasti |
| 2001 | Direct addressed caches for reduced power consumption. Emmett Witchel, Samuel Larsen, C. Scott Ananian, Krste Asanovic |
| 2001 | Direct load: dependence-linked dataflow resolution of load address and cache coordinate. Byung-Kwon Chung, Jinsuo Zhang, Jih-Kwon Peir, Shih-Chang Lai, Konrad Lai |
| 2001 | Dual use of superscalar datapath for transient-fault detection and recovery. Joydeep Ray, James C. Hoe, Babak Falsafi |
| 2001 | Dynamic speculative precomputation. Jamison D. Collins, Dean M. Tullsen, Hong Wang, John Paul Shen |
| 2001 | Efficient static single assignment form for predication. Artour Stoutchinin, François de Ferrière |
| 2001 | Emerging applications for the connected home. Andrew Wolfe |
| 2001 | Enhancing loop buffering of media and telecommunications applications using low-overhead predication. John W. Sias, Hillery C. Hunter, Wen-mei W. Hwu |
| 2001 | Exploiting VLIW schedule slacks for dynamic and leakage energy reduction. Wei Zhang, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin, David Duarte, Yuh-Fang Tsai |
| 2001 | Fifty years of microarchitecture. Harvey G. Cragon, Ernest Cockrell Jr. |
| 2001 | Graph-partitioning based instruction scheduling for clustered processors. Alex Aletà, Josep M. Codina, F. Jesús Sánchez, Antonio González |
| 2001 | Handling long-latency loads in a simultaneous multithreading processor. Dean M. Tullsen, Jeffery A. Brown |
| 2001 | Mapping reference code to irregular DSPs within the retargetable, optimizing compiler COGEN(T). Gary William Grewal, Thomas Charles Wilson |
| 2001 | Modulo schedule buffers. Matthew C. Merten, Wen-mei W. Hwu |
| 2001 | Modulo scheduling with integrated register spilling for clustered VLIW architectures. Javier Zalamea, Josep Llosa, Eduard Ayguadé, Mateo Valero |
| 2001 | Performance characterization of a hardware mechanism for dynamic optimization. Brian Fahs, Satarupa Bose, Matthew M. Crum, Brian Slechta, Francesco Spadini, Tony Tung, Sanjay J. Patel, Steven S. Lumetta |
| 2001 | Proceedings of the 34th Annual International Symposium on Microarchitecture, Austin, Texas, USA, December 1-5, 2001 Yale N. Patt, Josh Fisher, Paolo Faraboschi, Kevin Skadron |
| 2001 | Reducing power requirements of instruction scheduling through dynamic allocation of multiple datapath resources. Dmitry Ponomarev, Gurhan Kucuk, Kanad Ghose |
| 2001 | Reducing power with dynamic critical path information. John S. Seng, Eric Tune, Dean M. Tullsen |
| 2001 | Reducing set-associative cache energy via way-prediction and selective direct-mapping. Michael D. Powell, Amit Agarwal, T. N. Vijaykumar, Babak Falsafi, Kaushik Roy |
| 2001 | Reducing the complexity of the register file in dynamic superscalar processors. Rajeev Balasubramonian, Sandhya Dwarkadas, David H. Albonesi |
| 2001 | Saving energy with architectural and frequency adaptations for multimedia applications. Christopher J. Hughes, Jayanth Srinivasan, Sarita V. Adve |
| 2001 | Select-free instruction scheduling logic. Mary D. Brown, Jared Stark, Yale N. Patt |
| 2001 | Skipper: a microarchitecture for exploiting control-flow independence. Chen-Yong Cher, T. N. Vijaykumar |
| 2001 | Speculative lock elision: enabling highly concurrent multithreaded execution. Ravi Rajwar, James R. Goodman |
| 2001 | The impact of if-conversion and branch prediction on program execution on the Intel Itanium processor. Youngsoo Choi, Allan D. Knies, Luke Gerke, Tin-Fook Ngai |
| 2001 | Using variable-MHz microprocessors to efficiently handle uncertainty in real-time systems. Eric Rotenberg |
| 2001 | ZR: a 3D API transparent technology for chunk rendering. Emile Hsieh, Vladimir Pentkovski, Thomas Piazza |