MICRO A*

28 papers

YearTitle / Authors
1993A VLIW architecture based on shifting register files.
H. Fatih Ugurdag, Christos A. Papachristou
1993A comparative performance evaluation of various state maintenance mechanisms.
Michael Butler, Yale N. Patt
1993A comparision of superscalar and decoupled access/execute architectures.
Matthew K. Farrens, Pius Ng, Phil Nico
1993A microarchitectural performance evaluation of a 3.2 Gbyte/s microprocessor bus.
Tim J. Stanley, Michael Upton, Patrick Sherhart, Trevor N. Mudge, Richard B. Brown
1993A study on the number of memory ports in multiple instruction issue machines.
Soo-Mook Moon, Kemal Ebcioglu
1993An analysis of dynamic scheduling techniques for symbolic applications.
Alessandra Costa, Alessandro De Gloria, Paolo Faraboschi, Mauro Olivieri
1993An evaluation of bottom-up and top-down thread generation techniques.
A. P. Wim Böhm, Walid A. Najjar, Bhanu Shankar, Lucas Roh
1993An extended classification of inter-instruction dependency and its application in automatic synthesis of pipelined processors.
Ing-Jer Huang, Alvin M. Despain
1993Branch history table indexing to prevent pipeline bubbles in wide-issue superscalar processors.
Tse-Yu Yeh, Yale N. Patt
1993Clocked and asynchronous instruction pipelines.
Mark A. Franklin, Tienyo Pan
1993Control flow prediction for dynamic ILP processors.
Dionisios N. Pnevmatikatos, Manoj Franklin, Gurindar S. Sohi
1993Dynamically scheduled VLIW processors.
B. Ramakrishna Rau
1993EXPLORER: a retargetable and visualization-based trace-driven simulator for superscalar processors.
Trung A. Diep, John Paul Shen, Mike Phillip
1993Efficient scheduling of fine grain parallelism in loops.
M. Rajagopalan, Vicki H. Allan
1993Employing finite automata for resource scheduling.
Thomas Müller
1993GPMB - software pipelining branch-intensive loops.
Zhizhong Tang, Gang Chen, Chihong Zhang, Yingwei Zhang, Bogong Su, Stanley Habib
1993Instruction scheduling for the Motorola 88110.
Mark Smotherman, Shuchi Chawla, Stan Cox, Brian A. Malloy
1993MIDEE: smoothing branch and instruction cache miss penalties on deep pipelines.
Nathalie Drach, André Seznec
1993Measuring limits of parallelism and characterizing its vulnerability to resource constraints.
Lawrence Rauchwerger, Pradeep K. Dubey, Ravi Nair
1993Predictability of load/store instruction latencies.
Santosh G. Abraham, Rabin A. Sugumar, Daniel Windheiser, B. Ramakrishna Rau, Rajiv Gupta
1993Proceedings of the 26th Annual International Symposium on Microarchitecture, Austin, Texas, USA, November 1993
Andrew Wolfe, William H. Mangione-Smith
1993Prophetic branches: a branch architecture for code compaction and efficient execution.
Apoorv Srivastava, Alvin M. Despain
1993Register renaming and dynamic speculation: an alternative approach.
Mayan Moudgill, Keshav Pingali, Stamatis Vassiliadis
1993Speculative execution exception recovery using write-back suppression.
Roger A. Bringmann, Scott A. Mahlke, Richard E. Hank, John C. Gyllenhaal, Wen-mei W. Hwu
1993Superblock formation using static program analysis.
Richard E. Hank, Scott A. Mahlke, Roger A. Bringmann, John C. Gyllenhaal, Wen-mei W. Hwu
1993Techniques for extracting instruction level parallelism on MIMD architectures.
Gary S. Tyson, Matthew K. Farrens
1993The 16-fold way: a microparallel taxonomy.
Barton Sano, Alvin M. Despain
1993Two-ported cache alternatives for superscalar processors.
Andrew Wolfe, Rodney Boleyn