| 2022 | 20th ACM-IEEE International Conference on Formal Methods and Models for System Design, MEMOCODE 2022, Shanghai, China, October 13-14, 2022 |
| 2022 | A Reinforcement-Learning Style Algorithm for Black Box Automata. Itay Cohen, Roi Fogler, Doron Peled |
| 2022 | A novel approach to Real-time contract based reasoning for Hybrid Systems. Surinder Sood, Avinash Malik, Partha S. Roop |
| 2022 | A small, but important, concurrency problem in Verilog's semantics? (Work in progress). Andreas Lööw |
| 2022 | Creating a Language for Writing Real-Time Applications for the Internet of Things. Robert Krook, John Hui, Bo Joel Svensson, Stephen A. Edwards, Koen Claessen |
| 2022 | Deriving Pipeline Models for Timing Analysis from High-Level HDL Processor Designs. Samira Ait Bensaid, Mihail Asavoae, Farhat Thabet, Mathieu Jan |
| 2022 | Lifecycle-Based View on Cyber-Physical System Models Using Extended Hidden Markov Models. Matthias Schaffeld, Rebecca Bernemann, Torben Weis, Barbara König, Viktor Matkovic |
| 2022 | Mechanization of a Large DSML: An Experiment with AADL and Coq. Jérôme Hugues, Lutz Wrage, John Hatcliff, Danielle Stewart |
| 2022 | ORIGAMI: Folding Data Structures to Reduce Timing Side-Channel Leakage. Eric Rothstein Morris, Jun Sun, Sudipta Chattopadhyay |
| 2022 | Reach-Avoid Verification for Time-varying Systems with Uncertain Disturbances. Ruiqi Hu, Kairong Liu, Zhikun She |
| 2022 | Real-Time Scheduling of Machine Learning Operations on Heterogeneous Neuromorphic SoC. Anup Das |
| 2022 | Robust hardware-software Co-simulation framework for design and validation of Hybrid Systems. Surinder Sood, Avinash Malik, Partha S. Roop |
| 2022 | Runtime Interchange of Enforcers for Adaptive Attacks: A Security Analysis Framework for Drones. Alex Baird, Hammond Pearce, Srinivas Pinisetty, Partha S. Roop |
| 2022 | Runtime Verification for Clinically Interpretable Arrhythmia Classification. Alex Baird, Srinivas Pinisetty, Nathan Allen, Nitish D. Patel, Partha S. Roop |
| 2022 | Towards Efficient Input Space Exploration for Falsification of Input Signal Class Augmented STL. Vinayak S. Prabhu, Meetkumar Savaliya |