| 2011 | 9th IEEE/ACM International Conference on Formal Methods and Models for Codesign, MEMOCODE 2011, Cambridge, UK, 11-13 July, 2011 Satnam Singh, Barbara Jobstmann, Michael Kishinevsky, Jens Brandt |
| 2011 | A case study of hardware software co-design in a consumer ASIC. Mark Shand |
| 2011 | A flexible formal verification framework for industrial scale validation. Anna Slobodová, Jared Davis, Sol Swords, Warren A. Hunt Jr. |
| 2011 | Automatic generation of assertions from system level design using data mining. Lingyi Liu, David Sheridan, Viraj Athavale, Shobha Vasudevan |
| 2011 | Controller synthesis for pipelined circuits using uninterpreted functions. Georg Hofferek, Roderick Bloem |
| 2011 | Distributing C# methods and threads over Ethernet-connected FPGAs using Kiwi. David J. Greaves, Satnam Singh |
| 2011 | EFSM-based model-driven approach to concolic testing of system-level design. Giuseppe Di Guglielmo, Masahiro Fujita, Franco Fummi, Graziano Pravadelli, Stefano Soffia |
| 2011 | Efficient deadlock detection for concurrent systems. Saddek Bensalem, Andreas Griesmayer, Axel Legay, Thanh-Hung Nguyen, Doron A. Peled |
| 2011 | Fast scalable FPGA-based Network-on-Chip simulation models. Michael Papamichael |
| 2011 | Formal modelling and transformations of processor instruction sets. Andrey Mokhov, Danil Sokolov, Maxim Rykunov, Alex Yakovlev |
| 2011 | Function interface models for hardware compilation. Dan R. Ghica |
| 2011 | GPU-based NoC simulator. Mahdy Zolghadr, Koosha Mirhosseini, Saeid Gorgin, Abbas Nayebi |
| 2011 | MEMOCODE 2011 Hardware/Software CoDesign Contest: NoC simulator. Derek Chiou |
| 2011 | Mining assumptions for synthesis. Wenchao Li, Lili Dworkin, Sanjit A. Seshia |
| 2011 | Modeling of time in discrete-event simulation of systems-on-chip. Giovanni Funchal, Matthieu Moy |
| 2011 | Modern constraint solving by propagation. Christopher Jefferson |
| 2011 | Parallel assertions for debugging parallel programs. Daniel Schwartz-Narbonne, Feng Liu, Tarun Pondicherry, David I. August, Sharad Malik |
| 2011 | Polychronous controller synthesis from MARTE CCSL timing specifications. Huafeng Yu, Jean-Pierre Talpin, Loïc Besnard, Thierry Gautier, Hervé Marchand, Paul Le Guernic |
| 2011 | Predictive analysis for detecting serializability violations through Trace Segmentation. Arnab Sinha, Sharad Malik, Chao Wang, Aarti Gupta |
| 2011 | Reachability analysis for incomplete networks of Markov decision processes. Ralf Wimmer, Ernst Moritz Hahn, Holger Hermanns, Bernd Becker |
| 2011 | Rigorous system level modeling and analysis of mixed HW/SW systems. Paraskevas Bourgos, Ananda Basu, Marius Bozga, Saddek Bensalem, Joseph Sifakis, Kai Huang |
| 2011 | SMT based false causal loop detection during code synthesis from Polychronous specifications. Bijoy Antony Jose, Abdoulaye Gamatié, Julien Ouy, Sandeep K. Shukla |
| 2011 | Transforming SystemC Transaction Level Models into UPPAAL timed automata. Paula Herber, Marcel Pockrandt, Sabine Glesner |
| 2011 | Verification of microarchitectural refinements in rule-based systems. Nirav Dave, Michael Katelman, Myron King, Arvind, José Meseguer |