| 2003 | 1st ACM & IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE 2003), 24-26 June 2003, Mont Saint-Michel, France, Proceedings |
| 2003 | A Generalised Approach to Supervisor Synthesis. Roberto Ziller, Klaus Schneider |
| 2003 | A Verification Methodology for Infinite-State Message Passing Systems. Christoph Sprenger, Krzysztof Worytkiewicz |
| 2003 | Analyzing Concurrency in Computational Networks. Sander Stuijk, Twan Basten |
| 2003 | Bluespec: A language for hardware design, simulation, synthesis and verification Invited Talk. Arvind |
| 2003 | Bridging CSP and C++ with Selective Formalism and Executable Specifications. William B. Gardner |
| 2003 | Combining ACL2 and a v-calculus Model-Checker to Verify System-Level Designs. Magali Contensin, Laurence Pierre |
| 2003 | Engineering Changes in Field Modifiable Architectures. Hiroshi Saito, Kenshu Seto, Yoshihisa Kojima, Satoshi Komatsu, Masahiro Fujita |
| 2003 | Exact Runtime Analysis Using Automata-Based Symbolic Simulation. Tobias Schüle, Klaus Schneider |
| 2003 | Executable Computational Logics: Combining Formal Methods and Programming Language Based System Design. José Meseguer |
| 2003 | Finding Good Counter-Examples to Aid Design Verification. Görschwin Fey, Rolf Drechsler |
| 2003 | Formal Verification of an Intel XScale Processor Model with Scoreboarding, Specialized Execution Pipelines, and Impress Data-Memory Exceptions. Sudarshan K. Srinivasan, Miroslav N. Velev |
| 2003 | From Algorithm and Architecture Specifications to Automatic Generation of Distributed Real-Time Executives: a Seamless Flow of Graphs Transformations. Thierry Grandpierre, Yves Sorel |
| 2003 | From Use Cases to System Implementation: Statechart Based Co-design. Luís Gomes, Anikó Costa |
| 2003 | Goal-Oriented Requirements Analysis for Process Control Systems Design. Islam A. M. El-Maddah, T. S. E. Maibaum |
| 2003 | Hierarchical and Incremental Verification for System Level Design: Challenges and Accomplishments. Grant Martin, Sandeep K. Shukla |
| 2003 | High Level Verification of Control Intensive Systems Using Predicate Abstraction. Edmund M. Clarke, Orna Grumberg, Muralidhar Talupur, Dong Wang |
| 2003 | How to Compute the Refinement Relation for Parameterized Systems. Françoise Bellegarde, Celina Charlet, Olga Kouchnarenko |
| 2003 | LOTOS Code Generation for Model Checking of STBus Based SoC: the STBus interconnect. Pierre Wodey, Geoffrey Camarroque, Fabrice Baray, Richard Hersemeule, Jean-Philippe Cousin |
| 2003 | Methods for exploiting SAT solvers in unbounded model checking. Kenneth L. McMillan |
| 2003 | MoDe: A Method for System-Level Architecture Evaluation. Jan Romberg, Oscar Slotosch, Gabor Hahn |
| 2003 | Modular Hierarchies of Models for Embedded Systems. Manfred Broy |
| 2003 | On the Use of a High-Level Fault Model to Check Properties Incompleteness. Franco Fummi, Graziano Pravadelli, Andrea Fedeli, Umberto Rossi, Franco Toto |
| 2003 | Optimizations for Faster Execution of Esterel Programs. Dumitru Potop-Butucaru, Robert de Simone |
| 2003 | Petri Net Based Interface Analysis for Fast IP-Core Integration. Julio A. de Oliveira Filho, Manoel Eusébio de Lima, Paulo Romero Martins Maciel |
| 2003 | Real-time Property Preservation in Approximations of Timed Systems. Jinfeng Huang, Jeroen Voeten, Marc Geilen |
| 2003 | Reliability Evaluation for Dependable Embedded System Specifications: An Approach Based on DSPN. Sérgio Murilo Maciel Fernandes, Paulo Romero Martins Maciel |
| 2003 | Robust System Design with Uncertain Information. Giovanni De Micheli |
| 2003 | Should the space of implementation possibilities be determined by the abilities of high-level synthesis and validation? Rajesh K. Gupta, Sandeep K. Shukla |
| 2003 | Translating Fusion/UML to Object-Z. Margot Bittner, Florian Kammüller |
| 2003 | Using SSDE for USB2.0 conformance co-verification. Thierry J.-F. Omnés, Gerard Postuma, Jos Verhaegh, Marleen Boonen, Nick Gatherer |
| 2003 | Verification of Control Properties in the Polyhedral Model. David Cachera, Katell Morin-Allory |
| 2003 | Verification of Transaction-Level SystemC models using RTL Testbenches. Rohit Jindal, Kshitiz Jain |