| 2016 | 2016 IEEE International Test Conference, ITC 2016, Fort Worth, TX, USA, November 15-17, 2016 |
| 2016 | A built-in self-repair scheme for DRAMs with spare rows, columns, and bits. Chih-Sheng Hou, Yong-Xiao Chen, Jin-Fu Li, Chih-Yen Lo, Ding-Ming Kwai, Yung-Fa Chou |
| 2016 | A novel diagnostic test generation methodology and its application in production failure isolation. M. Enamul Amyeen, Dongok Kim, Maheshwar Chandrasekar, Mohammad Noman, Srikanth Venkataraman, Anurag Jain, Neha Goel, Ramesh Sharma |
| 2016 | A reconfigurable built-in memory self-repair architecture for heterogeneous cores with embedded BIST datapath. V. R. Devanathan, Sumant Kale |
| 2016 | A suite of IEEE 1687 benchmark networks. Anton Tsertov, Artur Jutman, Sergei Devadze, Matteo Sonza Reorda, Erik Larsson, Farrokh Ghani Zadegan, Riccardo Cantoro, Mehrdad Montazeri, Rene Krenz-Baath |
| 2016 | A unified test and fault-tolerant multicast solution for network-on-chip designs. Dong Xiang, Krishnendu Chakrabarty, Hideo Fujiwara |
| 2016 | Accessing 1687 systems using arbitrary protocols. Michele Portolan |
| 2016 | Accurate anomaly detection using correlation-based time-series analysis in a core router system. Shi Jin, Zhaobo Zhang, Krishnendu Chakrabarty, Xinli Gu |
| 2016 | Active reliability monitor: Defect level extrinsic reliability monitoring on 22nm POWER8 and zSeries processors. Michael Johnson, Brian Noble, Mark Johnson, Jim Crafts, Cynthia Manya, John Deforge |
| 2016 | Advanced test methodology for complex SoCs. Pavan Kumar Datla Jagannadha, Mahmut Yilmaz, Milind Sonawane, Sailendra Chadalavada, Shantanu Sarangi, Bonita Bhaskaran, Ayub Abdollahian |
| 2016 | An accurate algorithm for computing mutation coverage in model checking. Huina Chao, Huawei Li, Tiancheng Wang, Xiaowei Li, Bo Liu |
| 2016 | An on-chip self-test architecture with test patterns recorded in scan chains. Kuen-Jong Lee, Pin-Hao Tang, Michael A. Kochte |
| 2016 | Analog fault coverage improvement using final-test dynamic part average testing. Wim Dobbelaere, Ronny Vanhooren, Willy De Man, Koen Matthijs, Anthony Coyette, Baris Esen, Georges G. E. Gielen |
| 2016 | Automated measurement of defect tolerance in mixed-signal ICs. Stephen Sunter, Alessandro Valerio, Riccardo Miglierina |
| 2016 | Automatic test signal generation for mixed-signal integrated circuits using circuit partitioning and interval analysis. Anthony Coyette, Baris Esen, Wim Dobbelaere, Ronny Vanhooren, Georges G. E. Gielen |
| 2016 | BIST-RM: BIST-assisted reliability management of SoCs using on-chip clock sweeping and machine learning. Mehdi Sadi, Gustavo K. Contreras, Dat Tran, Jifeng Chen, LeRoy Winemberg, Mark Tehranipoor |
| 2016 | Built-in self-test for micro-electrode-dot-array digital microfluidic biochips. Zipeng Li, Kelvin Yi-Tse Lai, Po-Hsien Yu, Krishnendu Chakrabarty, Tsung-Yi Ho, Chen-Yi Lee |
| 2016 | Cross-layer system reliability assessment framework for hardware faults. Alessandro Vallero, Alessandro Savino, Gianfranco Politano, Stefano Di Carlo, Athanasios Chatzidimitriou, Sotiris Tselonis, Manolis Kaliorakis, Dimitris Gizopoulos, Marc Riera, Ramon Canal, Antonio González, Maha Kooli, Alberto Bosio, Giorgio Di Natale |
| 2016 | DE-LOC: Design validation and debugging under limited observation and control, pre- and post-silicon for mixed-signal systems. Barry John Muldrey, Sabyasachi Deyati, Abhijit Chatterjee |
| 2016 | Defect tolerance for CNFET-based SRAMs. Tianjian Li, Li Jiang, Xiaoyao Liang, Qiang Xu, Krishnendu Chakrabarty |
| 2016 | Diagnostic resolution improvement through learning-guided physical failure analysis. Carlston Lim, Yang Xue, Xin Li, Ronald D. Blanton, M. Enamul Amyeen |
| 2016 | EMACS: Efficient MBIST architecture for test and characterization of STT-MRAM arrays. Insik Yoon, Ashwin Chintaluri, Arijit Raychowdhury |
| 2016 | Effective DC fault models and testing approach for open defects in analog circuits. Baris Esen, Anthony Coyette, Georges G. E. Gielen, Wim Dobbelaere, Ronny Vanhooren |
| 2016 | Efficient cross-layer concurrent error detection in nonlinear control systems using mapped predictive check states. Suvadeep Banerjee, Abhijit Chatterjee, Jacob A. Abraham |
| 2016 | Fault simulation for analog test coverage. Jyotsna Sequeira, Suriyaprakash Natarajan, Prashant Goteti, Nitin Chaudhary |
| 2016 | Handling wrong mapping: A new direction towards better diagnosis with low pin convolution compressors. Subhadip Kundu, Parthajit Bhattacharya, Rohit Kapur |
| 2016 | Harnessing process variations for optimizing wafer-level probe-test flow. Ali Ahmadi, Constantinos Xanthopoulos, Amit Nahar, Bob Orr, Michael Pas, Yiorgos Makris |
| 2016 | I-Q signal generation techniques for communication IC testing and ATE systems. Masahiro Murakami, Haruo Kobayashi, Shaiful Nizam Bin Mohyar, Osamu Kobayashi, Takahiro Miki, Junya Kojima |
| 2016 | Keynote address Thursday: Addressing semiconductor industry needs: Defining the future through creative, exciting research. Ken Hansen |
| 2016 | Keynote address Wednesday: Hardware inference accelerators for machine learning. Rob A. Rutenbar |
| 2016 | Known-good-die test methods for large, thin, high-power digital devices. Dave Armstrong, Gary Maier |
| 2016 | Logic characterization vehicle design reflection via layout rewiring. Phillip Fynan, Zeye Liu, Benjamin Niewenhuis, Soumya Mittal, Marcin Strajwas, R. D. (Shawn) Blanton |
| 2016 | Low cost ultra-pure sine wave generation with self calibration. Yuming Zhuang, Akhilesh Kesavan Unnithan, Arun Joseph, Siva Sudani, Benjamin Magstadt, Degang Chen |
| 2016 | Machine learning-based defense against process-aware attacks on Industrial Control Systems. Anastasis Keliris, Hossein Salehghaffari, Brian R. Cairl, Prashanth Krishnamurthy, Michail Maniatakos, Farshad Khorrami |
| 2016 | Memory repair for high fault rates. Panagiota Papavramidou |
| 2016 | Minimal area test points for deterministic patterns. Yingdi Liu, Elham K. Moghaddam, Nilanjan Mukherjee, Sudhakar M. Reddy, Janusz Rajski, Jerzy Tyszer |
| 2016 | Mixed-signal ATE technology and its impact on today's electronic system. Gordon W. Roberts |
| 2016 | Novel crosstalk evaluation method for high-density signal traces using clock waveform conversion technique. Takayuki Nakamura, Koji Asami |
| 2016 | Online slack-time binning for IO-registered die-to-die interconnects. Chih-Chieh Zheng, Shi-Yu Huang, Shyue-Kung Lu, Ting-Chi Wang, Kun-Han Tsai, Wu-Tung Cheng |
| 2016 | Output bit selection methodology for test response compaction. Wei-Cheng Lien, Kuen-Jong Lee |
| 2016 | Plenary keynote address Tuesday: The business of test: Test and semiconductor economics. Walden C. Rhines |
| 2016 | Power supply impedance emulation to eliminate overkills and underkills due to the impedance difference between ATE and customer board. Toru Nakura, Naoki Terao, Masahiro Ishida, Rimon Ikeno, Takashi Kusaka, Tetsuya Iizuka, Kunihiro Asada |
| 2016 | Putting wasted clock cycles to use: Enhancing fortuitous cell-aware fault detection with scan shift capture. Fanchen Zhang, Daphne Hwong, Yi Sun, Allison Garcia, Soha Alhelaly, Geoff Shofner, LeRoy Winemberg, Jennifer Dworak |
| 2016 | Pylon: Towards an integrated customizable volume diagnosis infrastructure. Yan Pan, Rao Desineni, Kannan Sekar, Atul Chittora, Sherwin Fernandes, Neerja Bawaskar, John M. Carulli |
| 2016 | RF test accuracy and capacity enhancement on ATE for silicon TV tuners. Y. Fan, A. Verma, Y. Su, L. Rose, J. Janney, V. Do, S. Kumar |
| 2016 | Recycled FPGA detection using exhaustive LUT path delay characterization. Md. Mahbub Alam, Mark Tehranipoor, Domenic Forte |
| 2016 | SERDES external loopback test using production parametric-test hardware. Shalini Arora, Aman Aflaki, Sounil Biswas, Masashi Shimanouchi |
| 2016 | Securing digital microfluidic biochips by randomizing checkpoints. Jack Tang, Ramesh Karri, Mohamed Ibrahim, Krishnendu Chakrabarty |
| 2016 | Statistical outlier screening as a test solution health monitor. David Shaw, Dirk Hoops, Kenneth M. Butler, Amit Nahar |
| 2016 | Supply-voltage optimization to account for process variations in high-volume manufacturing testing. Gurunath Kadam, Markus Rudack, Krishnendu Chakrabarty, Juergen Alt |
| 2016 | Test chip design for optimal cell-aware diagnosability. Soumya Mittal, Zeye Liu, Ben Niewenhuis, R. D. (Shawn) Blanton |
| 2016 | Test point insertion in hybrid test compression/LBIST architectures. Elham K. Moghaddam, Nilanjan Mukherjee, Janusz Rajski, Jerzy Tyszer, Justyna Zawada |
| 2016 | Test time efficient group delay filter characterization technique using a discrete chirped excitation signal. Peter Sarson |
| 2016 | Testing of interposer-based 2.5D integrated circuits. Ran Wang, Krishnendu Chakrabarty |
| 2016 | Transformation of multiple fault models to a unified model for ATPG efficiency enhancement. Cheng-Hung Wu, Kuen-Jong Lee |
| 2016 | Upper-bound computation for optimal retargeting in IEEE1687 networks. Farrokh Ghani Zadegan, Rene Krenz-Baath, Erik Larsson |
| 2016 | Using symbolic canceling to improve diagnosis from compacted response. Kamran Saleem, Nur A. Touba |
| 2016 | Variation and failure characterization through pattern classification of test data from multiple test stages. Chun-Kai Hsu, Peter Sarson, Gregor Schatzberger, Friedrich Peter Leisenberger, John M. Carulli Jr., Siddhartha Siddhartha, Kwang-Ting Cheng |
| 2016 | What we know after twelve years developing and deploying test data analytics solutions. Kenneth M. Butler, Amit Nahar, W. Robert Daasch |