ITC A

49 papers

YearTitle / Authors
20152015 IEEE International Test Conference, ITC 2015, Anaheim, CA, USA, October 6-8, 2015
2015A DLL-based test solution for through silicon via (TSV) in 3D-stacked ICs.
Rashid Rashidzadeh, Esrafil Jedari, Tareq Muhammad Supon, Vladimir Mashkovtsev
2015A case study: Leverage IEEE 1687 based method to automate modeling, verification, and test access for embedded instruments in a server processor.
Tassanee Payakapan, Senwen Kan, Ken Pham, Kathy Yang, Jean-Francois Cote, Martin Keim, Jennifer Dworak
2015A comparative study of one-shot statistical calibration methods for analog / RF ICs.
Yichuan Lu, Kiruba S. Subramani, He Huang, Nathan Kupp, Ke Huang, Yiorgos Makris
2015A deterministic BIST scheme based on EDT-compressed test patterns.
Grzegorz Mrugalski, Janusz Rajski, Lukasz Rybak, Jedrzej Solecki, Jerzy Tyszer
2015A general testing method for digital microfluidic biochips under physical constraints.
Trung Anh Dinh, Shigeru Yamashita, Tsung-Yi Ho, Krishnendu Chakrabarty
2015A new method for measuring alias-free aperture jitter in an ADC output.
Takahiro J. Yamaguchi, Katsuhiko Degawa, Masayuki Kawabata, Masahiro Ishida, Koichiro Uekusa, Mani Soma
2015A self-compensating built-in self-test solution for RF phased array mismatch.
Jae Woong Jeong, Jennifer Kitchen, Sule Ozev
2015A structured approach to post-silicon validation and debug using symbolic quick error detection.
David Lin, Eshan Singh, Clark W. Barrett, Subhasish Mitra
2015Access time minimization in IEEE 1687 networks.
Rene Krenz-Baath, Farrokh Ghani Zadegan, Erik Larsson
2015AdaTest: An efficient statistical test framework for test escape screening.
Fan Lin, Chun-Kai Hsu, Kwang-Ting Cheng
2015An ATE system for testing 2.4-GHz RF digital communication devices with QAM signal interfaces.
Masahiro Ishida, Kiyotaka Ichiyama
2015Automated testing of bare die-to-die stacks.
Erik Jan Marinissen, Bart De Wachter, Teng Wang, Jens Fiedler, Jorg Kiesewetter, Karsten Stoll
2015Brain-inspired computing.
Karim Arabi
2015Can we ensure reliability in the era of heterogeneous integration?
William R. Bottoms
2015Concurrent hardware Trojan detection in wireless cryptographic ICs.
Yu Liu, Georgios Volanis, Ke Huang, Yiorgos Makris
2015Contactless pre-bond TSV fault diagnosis using duty-cycle detectors and ring oscillators.
Sergej Deutsch, Krishnendu Chakrabarty
2015Cross-layer approaches for an aging-aware design of nanoscale microprocessors: Dissertation summary: IEEE TTTC E.J. McCluskey doctoral thesis award competition finalist.
Fabian Oboril, Mehdi Baradaran Tahoori
2015Design reflection for optimal test-chip implementation.
R. D. (Shawn) Blanton, Benjamin Niewenhuis, Zeye (Dexter) Liu
2015Developing a modern platform for test engineering - Introducing the origen semiconductor developer's kit.
Stephen McGinty, Daniel Hadad, Chris Nappi, Brian Caquelin
2015Efficient observation-point insertion for diagnosability enhancement in digital circuits.
Zipeng Li, Sandeep Kumar Goel, Frank Lee, Krishnendu Chakrabarty
2015Electrical package defect testing for volume production.
Xue Ming, Koelz Johann, Lee Chow York, Lee Kwan Wee, Shi Zhi Min
2015Embedded deterministic test points for compact cell-aware tests.
Cesar Acero, Derek Feltham, Friedrich Hapke, Elham K. Moghaddam, Nilanjan Mukherjee, Vidya Neerkundar, Marek Patyra, Janusz Rajski, Jerzy Tyszer, Justyna Zawada
2015Evaluation of low-cost mixed-signal test techniques for circuits with long simulation times.
Haralampos-G. D. Stratigopoulos, Manuel J. Barragán, Salvador Mir, Hervé Le Gall, Neha Bhargava, Ankur Bal
2015Extending residue-based fault tolerance to encrypted computation.
Nektarios Georgios Tsoutsos, Michail Maniatakos
2015FASTrust: Feature analysis for third-party IP trust verification.
Song Yao, Xiaoming Chen, Jie Zhang, Qiaoyi Liu, Jia Wang, Qiang Xu, Yu Wang, Huazhong Yang
2015Generalization of an outlier model into a "global" perspective.
Sebastian Siatkowski, Chia-Ling Chang, Li-C. Wang, Nikolas Sumikawa, LeRoy Winemberg, W. Robert Daasch
2015Hardware Trojans hidden in RTL don't cares - Automated insertion and prevention methodologies.
Nicole Fern, Shrikant Kulkarni, Kwang-Ting (Tim) Cheng
2015Hardware in loop testing of an insulin pump.
Sriram Karunagaran, Karuna P. Sahoo, Masahiro Fujita
2015How many probes is enough? A low cost method for probe card depopulation with low risk.
Kevin Tiernan, Snehamay Sinha, Lily Pang, Robert Williams, Ken Delling
2015Information-theoretic and statistical methods of failure log selection for improved diagnosis.
Sarmad Tanwir, Sarvesh Prabhu, Michael S. Hsiao, Loganathan Lingappan
2015Modeling the future of semiconductors (and test!).
Andrew B. Kahng
2015Monitoring the delay of long interconnects via distributed TDC.
Meng-Ting Tsai, Shi-Yu Huang, Kun-Han Tsai, Wu-Tung Cheng
2015On diagnosable and tunable 3D clock network design for lifetime reliability enhancement.
Li Jiang, Pu Pang, Naifeng Jing, Sung Kyu Lim, Xiaoyao Liang, Qiang Xu
2015On generating high quality tests based on cell functions.
Xijiang Lin, Sudhakar M. Reddy
2015Optimizing delay tests at the memory boundary.
Kelly A. Ockunzzi, Michael R. Ouellette, Kevin W. Gorman
2015PiRA: IC authentication utilizing intrinsic variations in pin resistance.
Abhishek Basak, Fengchao Zhang, Swarup Bhunia
2015Platform IO and system memory test using L3 cache based test (CBT) and parallel execution of CPGC Intel BIST engine.
Bruce Querbach, Tan Peter Yanyang, Lovelace Van, David Blankenbeckler, Rahul Khanna, Sudeep Puligundla, Patrick Chiang
2015Rapid prototyping and test before silicon of integrated pressure sensors.
Adrian I. Voinea, Stefan Kampfer
2015Secure design-for-debug for Systems-on-Chip.
Jerry Backer, David Hély, Ramesh Karri
2015Stepped parity: A low-cost multiple bit upset detection technique.
Mojtaba Ebrahimi, Mehdi Baradaran Tahoori
2015Stochastic timing error rate estimation under process and temporal variations.
Shoichi Iizuka, Yutaka Masuda, Masanori Hashimoto, Takao Onoye
2015Streaming fast access to ADCs and DACs for mixed-signal ATPG.
Stephen K. Sunter, Jean-Francois Cote, Jeff Rearick
2015Test and debug solutions for 3D-stacked integrated circuits.
Sergej Deutsch, Krishnendu Chakrabarty
2015Test-access-mechanism optimization for multi-Vdd SoCs.
Fotios Vartziotis, Xrysovalantis Kavousianos, Panagiotis Georgiou, Krishnendu Chakrabarty
2015Testing methods for quaternary content addressable memory using charge-sharing sensing scheme.
Hao-Yu Yang, Rei-Fu Huang, Chin-Lung Su, Kuan-Hong Lin, Hang-Kaung Shu, Chi-Wei Peng, Mango Chia-Tso Chao
2015Tolerance analysis of fixture fabrication, from drilling holes to pointing accuracy.
An-Jim Long, David Tsai, Kent Lien, Steve Hsu
2015Yield and reliability enhancement for 3D ICs: Dissertation summary: IEEE TTTC E.J. McCluskey doctoral thesis award competition finalist.
Li Jiang, Qiang Xu
2015eRNA: Refining of reconstructed digital waveform.
Hideo Okawara