ITC A

71 papers

YearTitle / Authors
2012"Managing process variance in analog designs".
Eugene R. Atwood
20122012 IEEE International Test Conference, ITC 2012, Anaheim, CA, USA, November 5-8, 2012
20128Gbps CMOS pin electronics hardware macro with simultaneous bi-directional capability.
Shoji Kojima, Yasuyuki Arai, Tasuku Fujibe, Tsuyoshi Ataka, Atsushi Ono, Ken-ichi Sawada, Daisuke Watanabe
2012A built-in self-test scheme for 3D RAMs.
Yun-Chao You, Che-Wei Chou, Jin-Fu Li, Chih-Yen Lo, Ding-Ming Kwai, Yung-Fa Chou, Cheng-Wen Wu
2012A design flow to maximize yield/area of physical devices via redundancy.
Mohammad Mirza-Aghatabar, Melvin A. Breuer, Sandeep K. Gupta
2012A digital method for phase noise measurement.
Allan Ecker, Kenneth Blakkan, Mani Soma
2012A dynamic programming solution for optimizing test delivery in multicore SOCs.
Mukesh Agrawal, Michael Richter, Krishnendu Chakrabarty
2012A fast and accurate per-cell dynamic IR-drop estimation method for at-speed scan test pattern validation.
Yuta Yamato, Tomokazu Yoneda, Kazumi Hatayama, Michiko Inoue
2012A frequency measurement BIST implementation targeting gigahertz application.
Matthieu Dubois, Emeric de Foucauld, Christopher Mounet, Serigne Dia, Cedric Mayor
2012A memory yield improvement scheme combining built-in self-repair and error correction codes.
Tze-Hsin Wu, Po-Yuan Chen, Mincent Lee, Bin-Yen Lin, Cheng-Wen Wu, Chen-Hung Tien, Hung-Chih Lin, Hao Chen, Ching-Nen Peng, Min-Jer Wang
2012A unified method for parametric fault characterization of post-bond TSVs.
Yu-Hsiang Lin, Shi-Yu Huang, Kun-Han Tsai, Wu-Tung Cheng, Stephen K. Sunter
2012Adaptive test selection for post-silicon timing validation: A data mining approach.
Ming Gao, Peter Lisherness, Kwang-Ting (Tim) Cheng
2012Algorithm for dramatically improved efficiency in ADC linearity test.
Zhongjun Yu, Degang Chen
2012An ATE architecture for implementing very high efficiency concurrent testing.
Takahiro Nakajima, Takeshi Yaguchi, Hajime Sugimura
2012An experiment of burn-in time reduction based on parametric test analysis.
Nik Sumikawa, Li-C. Wang, Magdy S. Abadir
2012Are industrial test problems real problems? I thought research has resolved them all!
Xinli Gu
2012Are the IC guys helping or hindering board test?
Zoe Conroy
2012Automated system level functional test program generation on ATE from EDA using Functional Test Abstraction.
Motoo Ueda, Shinichi Ishikawa, Masaru Goishi, Satoru Kitagawa, Hiroshi Araki, Shuichi Inage
2012BS 1149.1 extensions for an online interconnect fault detection and recovery.
Somayeh Sadeghi Kohan, Majid Namaki-Shoushtari, Fatemeh Javaheri, Zainalabedin Navabi
2012Board assisted-BIST: Long and short term solutions for testpoint erosion - Reaching into the DFx toolbox.
Zoe Conroy, James J. Grealish, Harrison Miles, Anthony J. Suto, Alfred L. Crouch, Skip Meyers
2012Calibration of a flexible high precision Power-On Reset during production test.
Gerald Hilber, Dominik Gruber, Michael Sams, Timm Ostermann
2012Capacitive sensing testability in complex memory devices.
Kenneth P. Parker
2012Cell-aware Production test results from a 32-nm notebook processor.
Friedrich Hapke, Michael Reese, Jason Rivers, A. Over, V. Ravikumar, Wilfried Redemund, Andreas Glowatz, Jürgen Schlöffel, Janusz Rajski
2012DART: Dependable VLSI test architecture and its implementation.
Yasuo Sato, Seiji Kajihara, Tomokazu Yoneda, Kazumi Hatayama, Michiko Inoue, Yukiya Miura, Satosni Untake, Takumi Hasegawa, Motoyuki Sato, Kotaro Shimamura
2012DC temperature measurements for power gain monitoring in RF power amplifiers.
Josep Altet, Diego Mateo, Didac Gómez, Xavier Perpiñà, Miquel Vellvehí, Xavier Jordà
2012Design validation of RTL circuits using evolutionary swarm intelligence.
Min Li, Kelson Gent, Michael S. Hsiao
2012DfT architecture and ATPG for Interconnect tests of JEDEC Wide-I/O memory-on-logic die stacks.
Sergej Deutsch, Brion L. Keller, Vivek Chickermane, Subhasish Mukherjee, Navdeep Sood, Sandeep Kumar Goel, Ji-Jan Chen, Ashok Mehta, Frank Lee, Erik Jan Marinissen
2012Driver sharing challenges for DDR4 high-volume testing with ATE.
Jose Moreira, Marc Moessinger, Koji Sasaki, Takayuki Nakamura
2012Event-driven framework for configurable runtime system observability for SOC designs.
Jong Chul Lee, Faycel Kouteib, Roman Lysecky
2012Experiences with non-intrusive sensors for RF built-in test.
Louay Abdallah, Haralampos-G. D. Stratigopoulos, Salvador Mir, Christophe Kelma
2012FALCON: Rapid statistical fault coverage estimation for complex designs.
Shahrzad Mirkhani, Jacob A. Abraham, Toai Vo, Hong Shin Jun, Bill Eklow
2012FPGA-based synthetic instrumentation for board test.
Igor Aleksejev, Artur Jutman, Sergei Devadze, Sergei Odintsov, Thomas Wenzel
2012Functional test content optimization for peak-power validation - An experimental study.
Vinayak Kamath, Wen Chen, Nik Sumikawa, Li-C. Wang
2012Functional test of small-delay faults using SAT and Craig interpolation.
Matthias Sauer, Stefan Kupferschmid, Alexander Czutro, Ilia Polian, Sudhakar M. Reddy, Bernd Becker
2012Higher than Nyquist test waveform synthesis and digital phase noise injection using time-interleaved mixed-mode data converters.
Xian Wang, Hyun Woo Choi, Thomas Moon, Nicholas Tzou, Abhijit Chatterjee
2012How are failure modes, defect types and test methods changing for 32nm/28nm technologies and beyond?
Phil Nigh
2012Hybrid selector for high-X scan compression.
Peter Wohl, John A. Waicukauski, Frederic Neuveux, Jonathon E. Colburn
2012Impact of Radial defect clustering on 3D stacked IC yield from wafer to wafer stacking.
Eshan Singh
2012Improved volume diagnosis throughput using dynamic design partitioning.
Xiaoxin Fan, Huaxing Tang, Yu Huang, Wu-Tung Cheng, Sudhakar M. Reddy, Brady Benware
2012Improving test compression by retaining non-pivot free variables in sequential linear decompressors.
Sreenivaas S. Muthyala, Nur A. Touba
2012In-system constrained-random stimuli generation for post-silicon validation.
Adam B. Kinsman, Ho Fai Ko, Nicola Nicolici
2012Integrated optimization of semiconductor manufacturing: A machine learning approach.
Nathan Kupp, Yiorgos Makris
2012Low cost high-speed test data acquisition: Accurate period estimation driven signal reconstruction using incoherent subsampling.
Thomas Moon, Hyun Woo Choi, Abhijit Chatterjee
2012Low power programmable PRPG with enhanced fault coverage gradient.
Jedrzej Solecki, Jerzy Tyszer, Grzegorz Mrugalski, Nilanjan Mukherjee, Janusz Rajski
2012Low power test application with selective compaction in VLSI designs.
Dariusz Czysz, Janusz Rajski, Jerzy Tyszer
2012Low-cost wideband periodic signal reconstruction using incoherent undersampling and back-end cost optimization.
Nicholas Tzou, Debesh Bhatta, Sen-Wen Hsiao, Hyun Woo Choi, Abhijit Chatterjee
2012Low-power SRAMs power mode control logic: Failure analysis and test solutions.
Leonardo Bonet Zordan, Alberto Bosio, Luigi Dilillo, Patrick Girard, Aida Todri, Arnaud Virazel, Nabil Badereddine
2012Making predictive analog/RF alternate test strategy independent of training set size.
Haithem Ayari, Florence Azaïs, Serge Bernard, Mariane Comte, Vincent Kerzerho, Olivier Potin, Michel Renovell
2012Methodology for fault grading high speed I/O interfaces used in complex Graphics Processing Unit.
Animesh Khare, P. Kishore, S. Reddy, K. Rajan, A. Sanghani
2012Modeling, verification and pattern generation for reconfigurable scan networks.
Rafal Baranowski, Michael A. Kochte, Hans-Joachim Wunderlich
2012Multi-gigahertz arbitrary timing generator and data pattern serializer/formatter.
David C. Keezer, Te-Hui Chen, Carl Edward Gray, Hyun Woo Choi, Sungyeol Kim, Seongkwan Lee, Hosun Yoo
2012On efficient silicon debug with flexible trace interconnection fabric.
Xiao Liu, Qiang Xu
2012On modeling faults in FinFET logic circuits.
Yuxi Liu, Qiang Xu
2012On pinpoint capture power management in at-speed scan test generation.
Xiaoqing Wen, Y. Nishida, Kohei Miyase, Seiji Kajihara, Patrick Girard, Mohammad Tehranipoor, Laung-Terng Wang
2012On-chip diagnosis for early-life and wear-out failures.
Matthew Beckler, R. D. (Shawn) Blanton
2012On-die instrumentation to solve challenges for 28nm, 28Gbps timing variability and stressing.
Weichi Ding, Mingde Pan, Wilson Wong, Daniel Chow, Mike Peng Li, Sergey Y. Shumarayev
2012Packet-based JTAG for remote testing.
Michele Portolan
2012Power integrity control of ATE for emulating power supply fluctuations on customer environment.
Masahiro Ishida, Toru Nakura, Toshiyuki Kikkawa, Takashi Kusaka, Satoshi Komatsu, Kunihiro Asada
2012RNA: Advanced phase tracking method for digital waveform reconstruction.
Takashi Ito, Hideo Okawara, Jinlei Liu
2012Radic: A standard-cell-based sensor for on-chip aging and flip-flop metastability measurements.
Xiaoxiao Wang, Dat Tran, Saji George, LeRoy Winemberg, Nisar Ahmed, Steve Palosh, Allan Dobin, Mohammad Tehranipoor
2012Real-time testing method for 16 Gbps 4-PAM signal interface.
Masahiro Ishida, Kiyotaka Ichiyama, Daisuke Watanabe, Masayuki Kawabata, Toshiyuki Okayasu
2012Root cause identification of an hard-to-find on-chip power supply coupling fail.
Franco Stellari, Thomas Cowell, Peilin Song, Michael Sorna, Zeynep Toprak Deniz, John F. Bulzacchelli, Nandita A. Mitra
2012Scan test of die logic in 3D ICs using TSV probing.
Brandon Noia, Shreepad Panth, Krishnendu Chakrabarty, Sung Kyu Lim
2012Screening customer returns with multivariate test analysis.
Nik Sumikawa, Jeff Tikkanen, Li-C. Wang, LeRoy Winemberg, Magdy S. Abadir
2012Spatial estimation of wafer measurement parameters using Gaussian process models.
Nathan Kupp, Ke Huang, John M. Carulli Jr., Yiorgos Makris
2012Systematic defect screening in controlled experiments using volume diagnosis.
B. Seshadri, P. Gupta, Y. T. Lin, Bruce Cory
2012Test/ATE vision 2020 - Entrepreneurship in test CEO panel.
Ken Lanier
2012Testing high-frequency and low-power designs: Do the standard rules and tools apply?
Scott Davidson
2012Testing strategies for a 9T sub-threshold SRAM.
Hao-Yu Yang, Chen-Wei Lin, Hung-Hsin Chen, Mango Chia-Tso Chao, Ming-Hsien Tu, Shyh-Jye Jou, Ching-Te Chuang
2012The DFT challenges and solutions for the ARM® Cortex™-A15 Microprocessor.
Teresa L. McLaurin, Frank Frederick, Rich Slobodnik
2012Vulnerability-based Interleaving for Multi-Bit Upset (MBU) protection in modern microprocessors.
Michail Maniatakos, Maria K. Michael, Yiorgos Makris