| 2007 | 2007 IEEE International Test Conference, ITC 2007, Santa Clara, California, USA, October 21-26, 2007 Jill Sibert, Janusz Rajski |
| 2007 | A bead probe CAD strategy for in-circuit test. Kenneth P. Parker, Don DeMille |
| 2007 | A comparative study of continuous sampling plans for functional board testing. Jukka Antila, Timo Karhu |
| 2007 | A complete test set to diagnose scan chain failures. Ruifeng Guo, Yu Huang, Wu-Tung Cheng |
| 2007 | A concurrent approach for testing address decoder faults in eFlash memories. Olivier Ginez, Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel, Jean Michel Daga |
| 2007 | A fully digital-compatible BIST strategy for ADC linearity testing. Hanqing Xing, Hanjun Jiang, Degang Chen, Randall L. Geiger |
| 2007 | A generic and reconfigurable test paradigm using Low-cost integrated Poly-Si TFTs. Jing Li, Swaroop Ghosh, Kaushik Roy |
| 2007 | A heuristic for thermal-safe SoC test scheduling. Zhiyuan He, Zebo Peng, Petru Eles |
| 2007 | A high accuracy high throughput jitter test solution on ATE for 3GBPS and 6gbps serial-ata. Yongquan Fan, Yi Cai, Zeljko Zilic |
| 2007 | A low cost test data compression technique for high n-detection fault coverage. Seongmoon Wang, Zhanglei Wang, Wenlong Wei, Srimat T. Chakradhar |
| 2007 | A matched expansion MEMS probe card with low CTE LTCC substrate. Seong-Hun Choe, Shuji Tanaka, Masayoshi Esashi |
| 2007 | A methodology for detecting performance faults in microprocessors via performance monitoring hardware. Miltiadis Hatzimihail, Mihalis Psarakis, Dimitris Gizopoulos, Antonis M. Paschalis |
| 2007 | A methodology for systematic built-in self-test of phase-locked loops targeting at parametric failures. Guo Yu, Peng Li |
| 2007 | A novel scheme to reduce power supply noise for high-quality at-speed scan testing. Xiaoqing Wen, Kohei Miyase, Seiji Kajihara, Tatsuya Suzuki, Yuta Yamato, Patrick Girard, Yuji Ohsumi, Laung-Terng Wang |
| 2007 | A practical approach to comprehensive system test & debug using boundary scan based test architecture. Tapan J. Chakraborty, Chen-Huan Chiang, Bradford G. Van Treuren |
| 2007 | A scanisland based design enabling prebond testability in die-stacked microprocessors. Dean L. Lewis, Hsien-Hsin S. Lee |
| 2007 | A selt-testing BOST for high-frequency PLLs, DLLs, and SerDes. Stephen K. Sunter, Aubin Roy |
| 2007 | A stereo audio Σ∑ ADC architecture with embedded SNDR self-test. Luís Rolíndez, Salvador Mir, Jean-Louis Carbonéro, Dimitri Goguet, Nabil Chouba |
| 2007 | A stochastic pattern generation and optimization framework for variation-tolerant, power-safe scan test. V. R. Devanathan, C. P. Ravikumar, V. Kamakoti |
| 2007 | A universal DC to logic performance correlation. Andrew Marshall |
| 2007 | ACCE: Automatic correction of control-flow errors. Ramtilak Vemu, Sankar Gurumurthy, Jacob A. Abraham |
| 2007 | Achieving high transition delay fault coverage with partial DTSFF scan chains. Gefu Xu, Adit D. Singh |
| 2007 | Achieving serendipitous N-detect mark-offs in Multi-Capture-Clock scan patterns. Gaurav Bhargava, Dale Meehl, James Sage |
| 2007 | Advancements in at-speed array BIST: multiple improvements. Kevin W. Gorman, Michael Roberge, Adrian Paparelli, Gary Pomichter, Stephen Sliva, William Corbin |
| 2007 | An FFT-based jitter separation method for high-frequency jitter testing with a 10x reduction in test time. Takahiro J. Yamaguchi, H. X. Hou, Koji Takayama, Dave Armstrong, Masahiro Ishida, Mani Soma |
| 2007 | An algorithm to evaluate wide-band quadrature mixers. Koji Asami |
| 2007 | An efficient SAT-based path delay fault ATPG with an unified sensitization model. Shun-Yen Lu, Ming-Ting Hsieh, Jing-Jia Liou |
| 2007 | Analyzing and addressing the impact of test fixture relays for multi-gigabit ATE I/O characterization applications. Jose Moreira, Heidi Barnes, Guenter Hoersch |
| 2007 | Analyzing the risk of timing modeling based on path delay tests. Pouria Bastani, Benjamin N. Lee, Li-C. Wang, Savithri Sundareswaran, Magdy S. Abadir |
| 2007 | Automated handling of programmable on-product clock generation (OPCG) circuitry for delay test vector generation. Anis Uzzaman, Bibo Li, Thomas J. Snethen, Brion L. Keller, Gary Grise |
| 2007 | Automotive IC's: less testing, more prevention. Davide Appello |
| 2007 | Backside E-Beam Probing on Nano scale devices. Rudolf Schlangen, Reiner Leihkauf, Uwe Kerst, Christian Boit, Rajesh Jain, Tahir Malik, Keneth R. Wilsher, Ted R. Lundquist, Bernd Krüger |
| 2007 | California scan architecture for high quality and low power testing. Kyoung Youn Cho, Subhasish Mitra, Edward J. McCluskey |
| 2007 | Car IC test changing but the same quality goal. Gary Wittie |
| 2007 | Case study of a low power MTCMOS based ARM926 SoC : Design, analysis and test challenges. Sachin Idgunji |
| 2007 | Characterization of NBTI induced temporal performance degradation in nano-scale SRAM array using IDDQ. Kunhyuk Kang, Muhammad Ashraful Alam, Kaushik Roy |
| 2007 | Circuit failure prediction to overcome scaled CMOS reliability challenges. Subhasish Mitra, Mridul Agarwal |
| 2007 | Co-development of test electronics and PCI Express interface for a multi-Gbps optical switching network. Carl Edward Gray, Odile Liboiron-Ladouceur, David C. Keezer, Keren Bergman |
| 2007 | Cost effective manufacturing test using mission mode tests. Parmod Aggarwal |
| 2007 | Critical roles of RF and microwave electromagnetic field solver simulators in multi-gigabit high-speed digital applications. Minh Quach, Mark Hinton, Regee Petaja |
| 2007 | Data jitter measurement using a delta-time-to-voltage converter method. Kiyotaka Ichiyama, Masahiro Ishida, Takahiro J. Yamaguchi, Mani Soma |
| 2007 | Delay defect diagnosis using segment network faults. Osei Poku, Ronald D. Blanton |
| 2007 | Delay fault simulation with bounded gate delay mode. Soumitra Bose, Hillary Grimes, Vishwani D. Agrawal |
| 2007 | Dependable clock distribution for crosstalk aware design. Yukiya Miura |
| 2007 | Design for test features of the ARM clock control macro. Frank Frederick, Teresa L. McLaurin |
| 2007 | Design for testability features of the SUN microsystems niagara2 CMP/CMT SPARC chip. Robert F. Molyneaux, Thomas A. Ziaja, Hong Kim, Shahryar Aryani, Sungbae Hwang, Alex Hsieh |
| 2007 | Design-for-reliability: A soft error case study. Ming Zhang |
| 2007 | Diagnose compound scan chain and system logic defects. Yu Huang, Wu-Tung Cheng, Ruifeng Guo, Will Hsu, Yuan-Shih Chen, Albert Mann |
| 2007 | Diagnosis for MRAM write disturbance fault. Chin-Lung Su, Chih-Wea Tsai, Cheng-Wen Wu, Ji-Jan Chen, Wen Ching Wu, Chien-Chung Hung, Ming-Jer Kao |
| 2007 | ERTG: A test generator for error-rate testing. Shideh Shahidi, Sandeep K. Gupta |
| 2007 | Efficient power droop aware delay fault testing. Bin Li, Lei Fang, Michael S. Hsiao |
| 2007 | Efficient simulation of parametric faults for multi-stage analog circuits. Fang Liu, Sule Ozev |
| 2007 | Embedded multi-detect ATPG and Its Effect on the Detection of Unmodeled Defects. Jeroen Geuzebroek, Erik Jan Marinissen, Ananta K. Majhi, Andreas Glowatz, Friedrich Hapke |
| 2007 | Enhanced testing of clock faults. Teresa L. McLaurin, Rich Slobodnik, Kun-Han Tsai, Ana Keim |
| 2007 | Enhancing signal controllability in functional test-benches through automatic constraint extraction. Onur Guzey, Li-C. Wang, Jayanta Bhadra |
| 2007 | Estimating stuck fault coverage in sequential logic using state traversal and entropy analysis. Soumitra Bose, Vishwani D. Agrawal |
| 2007 | Fast and effective fault simulation for path delay faults based on selected testable paths. Dong Xiang, Yang Zhao, Kaiwei Li, Hideo Fujiwara |
| 2007 | Faster defect localization in nanometer technology based on defective cell diagnosis. Manish Sharma, Wu-Tung Cheng, Ting-Pu Tai, Y. S. Cheng, Will Hsu, Chen Liu, Sudhakar M. Reddy, Albert Mann |
| 2007 | Finding power/ground defects on connectors - a new approach. Kenneth P. Parker, Stephen Hird |
| 2007 | Fully X-tolerant combinational scan compression. Peter Wohl, John A. Waicukauski, Sanjay Ramnath |
| 2007 | Functional testing of digital microfluidic biochips. Tao Xu, Krishnendu Chakrabarty |
| 2007 | Fundamentals of timing information for test: How simple can we get? Rohit Kapur, Jindrich Zejda, Thomas W. Williams |
| 2007 | GRAAL: a new fault tolerant design paradigm for mitigating the flaws of deep nanometric technologies. Michael Nicolaidis |
| 2007 | Gate delay ratio model for unified path delay analysis. Yukio Okuda |
| 2007 | High throughput non-contact SiP testing. Brian Moore, Chris Sellathamby, Philippe Cauvet, Hérvé Fleury, M. Paulson, Md. Mahbub Reja, Lin Fu, Brenda Bai, Edwin Walter Reid, Igor M. Filanovsky, Steven Slupsky |
| 2007 | How to ensure zero defects from the beginning with semiconductor test methods. Bernd Gessner |
| 2007 | IEEE P1581 can solve your board level memory cluster test problems. Heiko Ehrenberg |
| 2007 | IJTAG: The path to organized instrument connectivity. Alfred L. Crouch |
| 2007 | Impact of Quad Flat No Lead package (QFN) on automated X-ray inspection (AXI). Tee Chwee Liong, Andy Pascual |
| 2007 | Implementing bead probe technology for in-circuit test: A case study. Mike Farrell, Glen Leinbach |
| 2007 | Interconnect open defect diagnosis with minimal physical information. Chen Liu, Wei Zou, Sudhakar M. Reddy, Wu-Tung Cheng, Manish Sharma, Huaxing Tang |
| 2007 | JTAG system test in a MicroTCA world. Bradford G. Van Treuren, Adam W. Ley |
| 2007 | Low cost automatic mixed-signal board test using IEEE 1149.4. Srividya Sundar, Bruce C. Kim, Toby Byrd, Felipe Toledo, Sudhir Wokhlu, Erika Beskar, Raul Rousselin, David Cotton, Gary Kendall |
| 2007 | Low cost characterization of RF transceivers through IQ data analysis. Erkan Acar, Sule Ozev |
| 2007 | Management of common-mode currents in semiconductor ATE. William J. Bowhers |
| 2007 | Measurement ratio testing for improved quality and outlier detection. Jeffrey L. Roehr |
| 2007 | Mining-guided state justification with partitioned navigation tracks. Ankur Parikh, Weixin Wu, Michael S. Hsiao |
| 2007 | Modeling facet roughening errors in self-assembly by snake tile sets. Xiaojun Ma, Jing Huang, Fabrizio Lombardi |
| 2007 | Multi-GHz loopback testing using MEMs switches and SiGe logic. David C. Keezer, Dany Minier, Patrice Ducharme, Doris Viens, Greg Flynn, John McKillop |
| 2007 | New methods for receiver internal jitter measurement. Mike Peng Li, Jinhua Chen |
| 2007 | Novel compensation scheme for local clocks of high performance microprocessors. Cecilia Metra, Martin Omaña, T. M. Mak, Simon Tam |
| 2007 | On ATPG for multiple aggressor crosstalk faults in presence of gate delays. Kunal P. Ganeshpure, Sandip Kundu |
| 2007 | On the saturation of n-detection test sets with increased n. Irith Pomeranz, Sudhakar M. Reddy |
| 2007 | On using lossless compression of debug data in embedded logic analysis. Ehab Anis, Nicola Nicolici |
| 2007 | On-chip timing uncertainty measurements on IBM microprocessors. Robert L. Franch, Phillip J. Restle, James K. Norman, William V. Huott, Joshua Friedrich, R. Dixon, Steve Weitzel, K. van Goor, Gerard Salem |
| 2007 | PMScan : A power-managed scan for simultaneous reduction of dynamic and leakage power during scan test. V. R. Devanathan, C. P. Ravikumar, Rajat Mehrotra, V. Kamakoti |
| 2007 | Pattern-directed circuit virtual partitioning for test power reduction. Qiang Xu, Dianwei Hu, Dong Xiang |
| 2007 | Power dissipation, variations and nanoscale CMOS design: Test challenges and self-calibration/self-repair solutions. Swarup Bhunia, Kaushik Roy |
| 2007 | Power-aware test: Challenges and solutions. Srivaths Ravi |
| 2007 | Principles and results of some test cost reduction methods for ASICs. Peter C. Maxwell |
| 2007 | Programmable deterministic Built-In Self-Test. Abdul Wahid Hakmi, Hans-Joachim Wunderlich, Christian G. Zoellin, Andreas Glowatz, Friedrich Hapke, Jürgen Schlöffel, Laurent Souef |
| 2007 | Protocol requirements in an SJTAG/IJTAG environment. Gunnar Carlsson, Johan Holmqvist, Erik Larsson |
| 2007 | Rapid UHF RFID silicon debug and production testing. Udaya Shankar Natarajan, Hemalatha Shanmugasundaram, Prachi Deshpande, Chin Soon Wah |
| 2007 | Real-time signal processing - a new PLL test approach. Hideo Okawara |
| 2007 | Redefining and testing interconnect faults in Mesh NoCs. Érika F. Cota, Fernanda Lima Kastensmidt, Maico Cassel, Paulo Meirelles, Alexandre M. Amory, Marcelo Lubaszewski |
| 2007 | SPARTAN: a spectral and information theoretic approach to partial-scan. Omar I. Khan, Michael L. Bushnell, Suresh Kumar Devanathan, Vishwani D. Agrawal |
| 2007 | Separating temperature effects from ring-oscillator readings to measure true IR-drop on a chip. Zahi S. Abuhamdeh, Vincent D'Alassandro, Richard Pico, Dale Montrone, Alfred L. Crouch, Andrew Tracy |
| 2007 | SiP-test: Predicting delivery quality. Alex S. Biewenga, Frans G. M. de Jong |
| 2007 | Sigma-delta ADC characterization using noise transfer function pole-zero tracking. Hochul Kim, Kye-Shin Lee |
| 2007 | Silicon evaluation of longest path avoidance testing for small delay defects. Ritesh P. Turakhia, W. Robert Daasch, Mark Ward, John Van Slyke |
| 2007 | Statistical analysis and optimization of parametric delay test. Sean Hsi Yuan Wu, Benjamin N. Lee, Li-C. Wang, Magdy S. Abadir |
| 2007 | Statistical test: A new paradigm to improve test effectiveness & efficiency. Peter M. O'Neill |
| 2007 | Test cost reduction for the AMD™ Athlon processor using test partitioning. Anuja Sehgal, Jeff Fitzgerald, Jeff Rearick |
| 2007 | Test yield estimation for analog/RF circuits over multiple correlated measurements. Fang Liu, Erkan Acar, Sule Ozev |
| 2007 | Test-wrapper designs for the detection of signal-integrity faults on core-external interconnects of SoCs. Qiang Xu, Yubin Zhang, Krishnendu Chakrabarty |
| 2007 | Testing for systematic defects based on DFM guidelines. Dongok Kim, M. Enamul Amyeen, Srikanth Venkataraman, Irith Pomeranz, Swagato Basumallick, Berni Landau |
| 2007 | Testing of Vega2, a chip multi-processor with spare processors. Samy Makar, Tony Altinis, Niteen Patkar, Janet Wu |
| 2007 | The design-for-testability features of a general purpose microprocessor. Da Wang, Xiaoxin Fan, Xiang Fu, Hui Liu, Ke Wen, Rui Li, Huawei Li, Yu Hu, Xiaowei Li |
| 2007 | The new ATE: Protocol aware. Andrew C. Evans |
| 2007 | Using built-in sensors to cope with long duration transient faults in future technologies. Carlos Arthur Lang Lisbôa, Fernanda Lima Kastensmidt, Egas Henes Neto, Gilson I. Wirth, Luigi Carro |
| 2007 | Using timing flexibility of automatic test equipment to complement X-tolerant test compression techniques. Andreas Leininger, Martin Fischer, Michael Richter, Michael Gössel |
| 2007 | Verification and debugging of IDDQ test of low power chips. Michael Laisne, Triphuong Nguyen, Songlin Zuo, Xiangdong Pan, Hailong Cui, Cher Bai, A. Street, M. Parley, Neetu Agrawal, K. Sundararaman |
| 2007 | Where is car IC testing going? Steve Comen |
| 2007 | Which defects are most critical? optimizing test sets to minimize failures due to test escapes. Jennifer Dworak |
| 2007 | X-canceling MISR - An X-tolerant methodology for compacting output responses with unknowns using a MISR. Nur A. Touba |