ITC A

196 papers

YearTitle / Authors
2003A BIST Solution for The Test of I/O Speed.
Cheng Jia, Linda S. Milor
2003A Built-In Self-Repair Scheme for Semiconductor Memories with 2-D Redundancy.
Jin-Fu Li, Jen-Chieh Yeh, Rei-Fu Huang, Cheng-Wen Wu, Peir-Yuan Tsai, Archer Hsu, Eugene Chow
2003A Case Study of IR-Drop in Structured At-Speed Testing.
Jayashree Saxena, Kenneth M. Butler, Vinay B. Jayaram, Subhendu Kundu, N. V. Arvind, Pravin Sreeprakash, Manfred Hachinger
2003A Comprehensive Approach to Assessing and Analyzing 1149.1 Test Logic.
Kevin Melocco, Hina Arora, Paul Setlak, Gary Kunselman, Shazia Mardhani
2003A Generic Test Path and DUT Model for DataCom ATE.
Jie Sun, Mike Li
2003A High Precision IDDQ Measurement System With Improved Dynamic Load Regulation.
Nobuhiro Sato, Yoshihiro Hashimoto
2003A Hybrid Coding Strategy For Optimized Test Data Compression.
Armin Würtenberger, Christofer S. Tautermann, Sybille Hellebrand
2003A New Approach for Low Power Scan Testing.
Takaki Yoshida, Masafumi Watari
2003A New Maximal Diagnosis Algorithm for Bus-structured Systems.
YongJoon Kim, DongSub Song, YongSeung Shin, Sunghoon Chun, Sungho Kang
2003A New Methodology For ADC Test Flow Optimization.
Serge Bernard, Mariane Comte, Florence Azaïs, Yves Bertrand, Michel Renovell
2003A Production-Oriented Multiplexing System for Testing above 2.5 Gbps.
David C. Keezer, Dany Minier, Marie-Christine Caron
2003A Reconfigurable Power-Conscious Core Wrapper and its Application to SOC Test Scheduling.
Erik Larsson, Zebo Peng
2003A Scalable Scan-Path Test Point Insertion Technique to Enhance Delay Fault Coverage for Standard Scan Designs.
Seongmoon Wang, Srimat T. Chakradhar
2003ATE-Customer Perspectives & Requirements Panel.
Donald L. Wheater
2003ATPG Padding And ATE Vector Repeat Per Port For Reducing Test Data Volume.
Harald P. E. Vranken, Friedrich Hapke, Soenke Rogge, Domenico Chindamo, Erik H. Volkerink
2003Adapting JTAG for AC Interconnect Testing.
Lee Whetsel
2003Agent Based DBIST/DBISR And Its Web/Wireless Management.
Liviu Miclea, Szilárd Enyedi, Gavril Toderean, Alfredo Benso, Paolo Prinetto
2003An Efficient Algorithm for Finding the K Longest Testable Paths Through Each Gate in a Combinational Circuit.
Wangqi Qiu, D. M. H. Walker
2003An Efficient and Effective Methodology on the Multiple Fault Diagnosis.
Zhiyuan Wang, Kun-Han Tsai, Malgorzata Marek-Sadowska, Janusz Rajski
2003An extension to JTAG for at-speed debug on a system.
Leon van de Logt, Frank van der Heyden, Tom Waayers
2003An improved Test Control Architecture and Test Control Expansion for Core-Based System Chips.
Tom Waayers
2003Analog Circuit Test using Transfer Function Coe .cient Estimates.
Zhen Guo, Jacob Savir
2003Analyzing the Effectiveness of Multiple-Detect Test Sets.
R. D. (Shawn) Blanton, Kumar N. Dwarakanath, Anirudh B. Shah
2003Application and Analysis of RT-Level Software-Based Self-Testing for Embedded Processor Cores.
Nektarios Kranitis, George Xenoulis, Antonis M. Paschalis, Dimitris Gizopoulos, Yervant Zorian
2003Application and Demonstration of a Digital Test Core: Optoelectronic Test Bed and Wafer-level Prober.
John S. Davis, David C. Keezer, Odile Liboiron-Ladouceur, Keren Bergman
2003Application of Built in Self-Test for Interconnect Testing of FPGAs.
Dereck A. Fernandes, Ian G. Harris
2003Architecting Millisecond Test Solutions for Wireless Phone RFIC's.
John Ferrario, Randy Wolf, Steve Moss
2003Area and Time Co-Optimization for System-on-a-Chip based on Consecutive Testability.
Tomokazu Yoneda, Tetsuo Uchiyama, Hideo Fujiwara
2003Automatic Diagnostic Program Generation for Mixed Signal Load Board.
Kranthi K. Pinjala, Bruce C. Kim, Pramodchandran N. Variyam
2003Automatic Multitone Alternate Test Generation For RF Circuits Using Behavioral Models.
Achintya Halder, Soumendu Bhattacharya, Abhijit Chatterjee
2003BIST for Deep Submicron ASIC Memories with High Performance Application.
Theo J. Powell, Wu-Tung Cheng, Joseph Rayhawk, Omer Samman, Paul Policke, Sherry Lai
2003BIST for Xilinx 4000 and Spartan Series FPGAs: A Case Study.
Charles E. Stroud, Keshia N. Leach, Thomas A. Slaughter
2003Backplane Test Bus Applications For IEEE STD 1149.1.
Clayton Gibbs
2003Board Life-Cycle Testing For Effective NPI Management of Wireless Products.
Timo Piironen
2003Board Test Coverage: The Value of Prediction and How to Compare Numbers.
Wouter Rijckaert, Frans G. M. de Jong
2003Building An RF Source For Low Cost Testers Using An ADPLL Controlled By Texas Instruments Digital Signal Processor (DSP) TMS320C5402.
Iboun Taimiya Sylla
2003Burn-in Temperature Projections for Deep Sub-micron Technologies.
Oleg Semenov, Arman Vassighi, Manoj Sachdev, Ali Keshavarzi, Charles F. Hawkins
2003CHARDIN: An Off-Chip Transient Current Monitor with Digital Interface for Production Testing.
Bartomeu Alorda, Brad Bloechel, Ali Keshavarzi, Jaume Segura
2003CMOS Built-In Test Architecture for High-Speed Jitter Measurement.
Henry C. Lin, Karen Taylor, Alan Chong, Eddie Chan, Mani Soma, Hosam Haggag, Jeff Huard, Jim Braatz
2003Case Study - Using STIL as Test Pattern Language.
Daniel Fan, Steve Roehling, Rusty Carruth
2003Challenges in Low Cost Test Approach for ARM9TM Core Based Mixed-Signal SoC DragonBallTM-MX1.
George Bao
2003Circular BIST testing the digital logic within a high speed Serdes.
Graham Hetherington, Richard Simpson
2003Collection of High-Level Microprocessor Bugs from Formal Verification of Pipelined and Superscalar Designs.
Miroslav N. Velev
2003Concurrent Error Detection in Linear Analog Circuits Using State Estimation.
Haralampos-G. D. Stratigopoulos, Yiorgos Makris
2003Constructive Pattern Generation Heuristic for Meeting SSO Limits.
Kendrick Baker
2003Convolutional Compaction of Test Responses.
Janusz Rajski, Jerzy Tyszer, Chen Wang, Sudhakar M. Reddy
2003Cost Containment for High-Volume Test of Multi-GB/s Ports.
John C. Johnson
2003Cost-Effective Approach for Reducing Soft Error Failure Rate in Logic Circuits.
Kartik Mohanram, Nur A. Touba
2003Coverage-Directed Management and Optimization of Random Functional Verification.
Amir Hekmatpour, James Coulter
2003Critical Timing Analysis in Microprocessors Using Near-IR Laser Assisted Device Alteration (LADA).
Jeremy A. Rowlette, Travis M. Eiles
2003DFFT : Design For Functional Testability.
Haluk Konuk, Leon Xiao
2003DFM - A Fabless Perspective.
Jitendra Khare
2003DFM - An Industry Paradigm Shift.
Cliff Ma
2003DFM: The Real 90nm Hurdle.
Robert C. Aitken
2003Data Critically Estimation In Software Applications.
Alfredo Benso, Stefano Di Carlo, Giorgio Di Natale, Paolo Prinetto, Luca Tagliaferri
2003Data flow within an open architecture tester.
Maurizio Gavardoni
2003Debug and Diagnosis in the Age of System-on-a-Chip.
Robert F. Molyneaux
2003Defect Coverage of Boundary-Scan Tests: What does it mean when a Boundary-Scan test passes?
Kenneth P. Parker
2003Defect Tolerance at the End of the Roadmap.
Mahim Mishra, Seth Copen Goldstein
2003Deformations of IC Structure in Test and Yield Learning.
Wojciech Maly, Anne E. Gattiker, Thomas Zanon, Thomas J. Vogels, R. D. (Shawn) Blanton, Thomas M. Storey
2003Design Verification Problems: Test To The Rescue?
Prab Varma
2003Design and Implementation of IEEE 1149.6.
Ivan Duzevik
2003Design for Manufacturability - or the meaning of 'subtle'.
Stefan Eichenberger
2003Designed -in-diagnostics: A new optical method.
Keneth R. Wilsher
2003Detection of Resistive Shorts in Deep Sub-micron Technologies.
Bram Kruseman, Stefan van den Oetelaar
2003Deterministic BIST Based on a Reconfigurable Interconnection Network.
Lei Li, Krishnendu Chakrabarty
2003Diagnosis in Modern Design - Just the Tip of the Iceberg.
Fidel Muradali
2003Diagnosis in Modern Design to Volume - The Tip of the Iceberg.
William V. Huott
2003Diagnosis-Based Post-Silicon Timing Validation Using Statistical Tools and Methodologies.
Angela Krstic, Li-C. Wang, Kwang-Ting Cheng, T. M. Mak
2003Double-Tree Scan: A Novel Low-Power Scan-Path Architecture.
Bhargab B. Bhattacharya, Sharad C. Seth, Sheng Zhang
2003EEPROM Memory: Threshold Voltage Built In Self Diagnosis.
Jean-Michel Portal, Hassen Aziza, Didier Née
2003Effectiveness Improvement of ECR Tests.
Wanli Jiang, Eric Peterson, Bob Robotka
2003Effects of Deterministic Jitter in a Cable on Jitter Tolerance Measurements.
Takahiro J. Yamaguchi, Mani Soma, Masahiro Ishida, Makoto Kurosawa, Hirobumi Musha
2003Efficient Scan Chain Design for Power Minimization During Scan Testing Under Routing Constraint.
Yannick Bonhomme, Patrick Girard, Loïs Guiller, Christian Landrault, Serge Pravossoudovitch
2003Efficient Sequential ATPG Based on Partitioned Finite-State-Machine Traversal.
Qingwei Wu, Michael S. Hsiao
2003Efficient Sequential ATPG for Functional RTL Circuits.
Liang Zhang, Indradeep Ghosh, Michael S. Hsiao
2003Elimination of Traditional Functional Testing of Interface Timings at Intel.
Mike Tripp, T. M. Mak, Anne Meixner
2003Evolution of IEEE 1149.1 Addressable Shadow Protocol Devices.
Rakesh N. Joshi, Kenneth L. Williams, Lee Whetsel
2003Experiments in Detecting Delay Faults using Multiple Higher Frequency Clocks and Results from Neighboring Die.
Haihua Yan, Adit D. Singh
2003Exploiting Programmable BIST For The Diagnosis of Embedded Memory Cores.
Davide Appello, Paolo Bernardi, Alessandra Fudoli, Maurizio Rebaudengo, Matteo Sonza Reorda, Vincenzo Tancorre, Massimo Violante
2003Extraction Error Diagnosis and Correction in High-Performance Designs.
Yu-Shen Yang, Jiang Brandon Liu, Paul J. Thadikaran, Andreas G. Veneris
2003FPGA Interconnect Delay Fault Testing.
Erik Chmelar
2003Failure Mechanisms in MEMS.
Jeremy A. Walraven
2003Fault Collapsing via Functional Dominance.
Vishwani D. Agrawal, A. V. S. S. Prasad, Madhusudan V. Atre
2003Fault Injection for Verifying Testability at the VHDL Level.
S. R. Seward, Parag K. Lala
2003Fault Localization using Time Resolved Photon Emission and STIL Waveforms.
Romain Desplats, Felix Beaudoin, Philippe Perdu, Nagamani Nataraj, Ted R. Lundquist, Ketan Shah
2003Fault Pattern Oriented Defect Diagnosis for Memories.
Chih-Wea Wang, Kuo-Liang Cheng, Jih-Nung Lee, Yung-Fa Chou, Chih-Tsun Huang, Cheng-Wen Wu, Frank Huang, Hong-Tzer Yang
2003First IC Validation of IEEE Std. 1149.6.
Suzette Vandivier, Mark Wahl, Jeff Rearick
2003Future ATE for System on a Chip... Some Perspectives.
Tom Newsom
2003Future ATE: Perspectives & Requirements.
Lee Y. Song
2003Future ATE: Perspectives & Requirements.
Fidel Muradali
2003Future Challenges for MEMS Failure Analysis.
Jeremy A. Walraven
2003H-DFT: A Hybrid DFT Architecture For Low-Cost High Quality Structural Testing.
David M. Wu, Mike Lin, Subhasish Mitra, Kee Sup Kim, Anil Sabbavarapu, Talal Jaber, Pete Johnson, Dale March, Greg Parrish
2003High Quality ATPG for Delay Defects.
Puneet Gupta, Michael S. Hsiao
2003How (In)Adequate is One-time Testing.
Peter Ehlig
2003HyAC: A Hybrid Structural SAT Based ATPG for Crosstalk.
Xiaoliang Bai, Sujit Dey, Angela Krstic
2003Hybrid Multisite Testing at Manufacturing.
Hamidreza Hashempour, Fred J. Meyer, Fabrizio Lombardi, Farzin Karimi
2003Hysteresis of Intrinsic IDDQ Currents.
Yukio Okuda, Nobuyuki Furukawa
2003IBISTTM (Interconnect Built-in Self-Test) Architecture and Methodology for PCI Express: Intel?s Next-Generation Test and Validation Methodology for Performance IO.
Jay J. Nejedlo
2003IEEE 1149.6 - A Practical Perspective.
Bill Eklow, Carl Barnhart, Mike Ricchetti, Terry Borroz
2003IEEE P1581: To Live or Let die?
Frans G. M. de Jong, Leon van de Logt
2003Impact of Multiple-Detect Test Patterns on Product Quality.
Brady Benware, Chris Schuermyer, Sreenevasan Ranganathan, Robert Madge, Prabhu Krishnamurthy, Nagesh Tamarapalli, Kun-Han Tsai, Janusz Rajski
2003Impedance Profile of a Commercial Power Grid and Test System.
Dhruva Acharyya, Jim Plusquellic
2003Improving Wireless Product Testing via University and Industry Collaboration.
William R. Eisenstadt
2003Improving Wireless Product Testing: An Opportunity for University and Industry Collaboratio.
Jim Paviol
2003Industrial Experience with Adoption of EDT for Low-Cost Test without Concessions.
Frank Poehl, Matthias Beck, Ralf Arnold, Peter Muhmenthaler, Nagesh Tamarapalli, Mark Kassab, Nilanjan Mukherjee, Janusz Rajski
2003Infrastructure IP for Back-End Yield Improvement.
L. Forli, Jean-Michel Portal, Didier Née, Bertrand Borot
2003Instruction Based BIST for Board/System Level Test of External Memories and Internconnects.
Olivier Caty, Ismet Bayraktaroglu, Amitava Majumdar, Richard Lee, John Bell, Lisa Curhan
2003Introduction to Applications and Industries for Microelectromechanical Systems (MEMS).
Jeremy A. Walraven
2003Jitter Test in Production for High Speed Serial Links.
Yi Cai
2003Key Impediments to DFT-Focused Test and How to Overcome Them.
Kenneth E. Posse, Geir Eide
2003Latch Divergency In Microprocessor Failure Analysis.
Peter Dahlgren, Paul Dickinson, Ishwar Parulkar
2003Linearity Testing of Precision Analog-to-Digital Converters Using Stationary Nonlinear Inputs.
Le Jin, Kumar L. Parthasarathy, Turker Kuyel, Degang Chen, Randall L. Geiger
2003Low Contact-Force Fritting Probe Card Using Buckling Microcantilevers.
Kenichi Kataoka, Toshihiro Itoh, Tadatomo Suga
2003MEMS Design And Verification.
Tamal Mukherjee
2003MEMS Fabrication.
Gary K. Fedder
2003MEMS Manufacturing Testing: An Accelerometer Case Study.
Theresa Maudie, Alex Hardt, Rick Nielsen, Dennis Stanerson, Ron Bieschke, Mike Miller
2003Managing the Multi-Gbit/s Test Challenges.
Ulrich Schoettmer, Bernd Laquai
2003Method of reducing contactor effect when testing high-precision ADCs.
Gwenolé Maugard, Carsten Wegener, Tom O'Dwyer, Michael Peter Kennedy
2003Mitigating the Effects of The DUT Interface board and Test System Parasitics in Gigabit-Plus Measurements.
Thomas P. Warwick
2003Modeling Scan Chain Modifications For Scan-in Test Power Minimization.
Ozgur Sinanoglu, Alex Orailoglu
2003Multi-GB/s IC Test Challenges and Solutions.
Burnell G. West
2003Next-Generation Devices and Networks Bring Opportunities and Challenges.
Antti Sivula
2003Novel Transient Fault Hardened Static Latch.
Martin Omaña, Daniele Rossi, Cecilia Metra
2003On Reducing Aliasing Effects and Improving Diagnosis of Logic BIST Failures.
Ramesh C. Tekumalla
2003On Reducing Test Data Volume and Test Application Time for Multiple Scan Chain Designs.
Huaxing Tang, Sudhakar M. Reddy, Irith Pomeranz
2003On Reducing Wrapper Boundary Register Cells in Modular SOC Testing.
Qiang Xu, Nicola Nicolici
2003On-chip Compression of Output Responses with Unknown Values Using LFSR Reseeding.
Masao Naruse, Irith Pomeranz, Sudhakar M. Reddy, Sandip Kundu
2003On-line Detection of Faults in Carry-Select Adders.
B. Kiran Kumar, Parag K. Lala
2003Open Architecture ATE and 250 Consecutive UIs.
Takahiro J. Yamaguchi
2003Open Microphone - My DFT is better than yours ...
Geir Eide, Kenneth E. Posse
2003Optical and Electrical Testing of Latchup in I/O Interface Circuits.
Franco Stellari, Peilin Song, Moyra K. McManus, Robert Gauthier, Alan J. Weger, Kiran V. Chatty, Mujahid Muhammad, Pia N. Sanda
2003Optimal Interconnect ATPG Under a Ground-Bounce Constraint.
Henk D. L. Hollmann, Erik Jan Marinissen, Bart Vermeulen
2003Optimization of Test/Diagnosis/Rework Location(s) and Characteristics in Electronic Systems Assembly Using Real-Coded Genetic Algorithms.
Zhen Shi, Peter Sandborn
2003Outlier Detection for DPPM Reduction.
Paul Buxton, Paul Tabor
2003Overview of the IEEE P1500 Standard.
Francisco DaSilva, Yervant Zorian, Lee Whetsel, Karim Arabi, Rohit Kapur
2003PXI - A New Architecture for Many Testing Requirements.
Bob Stasonis
2003PXI: A Solution For Board Functional Test?
Jim Webster
2003Panel Synopsis - How (In)Adequate is One Time Testing?
Rubin A. Parekhji
2003Parity-Based Concurrent Error Detection in Symmetric Block Ciphers.
Ramesh Karri, Grigori Kuznetsov, Michael Gössel
2003Path Delay Test Generation for Domino Logic Circuits in the Presence of Crosstalk.
Rahul Kundu, R. D. (Shawn) Blanton
2003Periodic Jitter Injection with Direct Time Synthesis by SPPTM ATE for SerDes Jitter Tolerance Test in Production.
Masashi Shimanouchi
2003Power-aware NoC Reuse on the Testing of Core-based Systems.
Érika F. Cota, Luigi Carro, Flávio Rech Wagner, Marcelo Lubaszewski
2003Proceedings 2003 International Test Conference (ITC 2003), Breaking Test Interface Bottlenecks, 28 September - 3 October 2003, Charlotte, NC, USA
2003Production Deployment of a Fast Transient Testing Methodology for Analog Circuits : Case Study and Results.
Ramakrishna Voorakaranam, Randy Newby, Sasikumar Cherubal, Bob Cometta, Thomas Kuehl, David M. Majernik, Abhijit Chatterjee
2003Production Test Challenges And Possible Solutions For Multiple GB/s ICs.
Mike Li
2003Progressive Bridge Identification.
Thomas J. Vogels, Wojciech Maly, R. D. (Shawn) Blanton
2003RF Test 101: Defining the Problem, Finding Solutions.
Mustapha Slamani
2003RIC/DICMOS - Multi-channel CMOS Formatter.
Ahmed Rashid Syed
2003Race: A Word-Level ATPG-Based Constraints Solver System For Smart Random Simulation.
Mahesh A. Iyer
2003Reducing Test Data Volume Using Random-Testable and Periodic-Testable Scan Chains in Circuits with Multiple Scan Chains.
Irith Pomeranz
2003Register Transfer Level Approach to Hybrid Time and Hardware Redundancy Based Fault Secure Datapath Synthesis.
Kaijie Wu, Ramesh Karri
2003Relating Yield Models to Burn-In Fall-Out in Time.
Thomas S. Barnett, Adit D. Singh
2003Reliability Threats in VDSM - Shortcomings in Conventional Test and Fault-Tolerance Alternatives.
Michael Nicolaidis
2003Requirements, Challenges, And Solutions For Testing Multiple GB/s ICs In Production.
Mike Li
2003Screening VDSM Outliers using Nominal and Subthreshold Supply Voltage IDDQ.
Chris Schuermyer, Brady Benware, Kevin Cota, Robert Madge, W. Robert Daasch, L. Ning
2003Seamless Research Between Academia And Industry To Facilitate Test Of Integrated High-Speed Wireless Systems: Is This An Illusion?
Abhijit Chatterjee
2003Seeing Chip Testability Through a Systems Person's Eyes.
David W. Yen
2003Selecting PXI Architecture for Board (System) Functional Test.
Eric L. Smitt
2003Self-Testing and Self-Healing via Mobile Agents.
Alfredo Benso
2003Should Nanometer Circuits be Periodically Tested in the Field?
Adit D. Singh
2003Silicon Diagnosis.
Wu-Tung Cheng
2003Silicon IP And Successful DFM.
Robert C. Aitken
2003Simulating Resistive Bridging and Stuck-At Faults.
Piet Engelke, Ilia Polian, Michel Renovell, Bernd Becker
2003Simultaneous Bidirectional Test Data Flow for a Low-cost Wafer Test Strategy.
Burnell G. West
2003Standards Based Wireless Device Testing.
John D. Bowne
2003Statistical Diagnosis for Intermittent Scan Chain Hold-Time Fault.
Yu Huang, Wu-Tung Cheng, Sudhakar M. Reddy, Cheng-Ju Hsieh, Yu-Ting Hung
2003Structural Delay Testing of Latch-based High-speed Pipelines with Time Borrowing.
Kun Young Chung, Sandeep K. Gupta
2003TRIBuTETM Board and Platform Test Methodology: Intel's Next-Generation Test and Validation Methodology for Platforms.
Jay J. Nejedlo
2003Test Challenges of Nanometer Technology.
Janusz Rajski
2003Test Outsourcing - A Subcontract Manufacturer's Perspective.
John Roberts
2003Test Vector Generation Based on Correlation Model for Ratio-Iddq.
Xiaoyun Sun, Larry L. Kinney, Bapiraju Vinnakota
2003Test-Based Model Generation For Legacy Systems.
Hardi Hungar, Tiziana Margaria, Bernhard Steffen
2003Testability Features of the Alpha 21364 Microprocessor.
Scott Erlanger, Dilip K. Bhavsar, Richard A. Davies
2003Testing 3G-controlled systems: time to rejoice or time to feel pain?
Tapio Koivukangas
2003Testing 3G-controlled systems: time to rejoice or time to feel pain?
Moray Rumney
2003Testing Challenges of Future Wireless World.
Tapio Koivukangas
2003Testing DSM ASIC With Static, \DeltaIDDQ, And Dynamic Test Suite: Implementation And Results.
Yoshihito Nishizaki, Osamu Nakayama, Chiaki Matsumoto, Yoshitaka Kimura, Toshimi Kobayashi, Hiroyuki Nakamura
2003Testing High Frequency ADCs and DACs with a Low Frequency Analog Bus.
Stephen K. Sunter
2003Testing of Droplet-Based Microelectrofluidic Systems.
Fei Su, Sule Ozev, Krishnendu Chakrabarty
2003The Confluence of Manufacturing Test and Design Validation.
Kwang-Ting Cheng
2003The Confluence of Manufacturing Test and Design Validation.
Ian G. Harris
2003The Confluence of Manufacturing Test and Design Validation.
Franco Fummi
2003The Increasing Importance of On-line Testing to Ensure High-Reliability Products.
Phil Nigh
2003The P1500 DFT Disclosure Document: A Standard to Communicate Mergeable Core DFT Data.
Michael G. Wahl, Sudipta Bhawmik, Kamran Zarrineh, Pradipta Ghosh, Scott Davidson, Peter Harrod
2003The PXI Modular Instrumentation Architecture.
Eric Starkloff, Tim Fountain, Garth Black
2003The Testability Features of The ARM1026EJ Microprocessor Core.
Teresa L. McLaurin, Frank Frederick, Rich Slobodnik
2003Tools and Techniques for Failure Analysis and Qualification of MEMS.
Jeremy A. Walraven
2003Towards Structural Testing of Superconductor Electronics.
Arun A. Joseph, Hans G. Kerkhoff
2003Transistor-Level Fault Analysis and Test Algorithm Development for Ternary Dynamic Content Addressable Memorie.
Derek Wright, Manoj Sachdev
2003Ultra Low Cost Linear Testing.
Michael A. Jones
2003Using Logic Models To Predict The Detection Behavior Of Statistical Timing Defects.
Li-C. Wang, Angela Krstic, Leonard Lee, Kwang-Ting Cheng, M. Ray Mercer, Thomas W. Williams, Magdy S. Abadir
2003VDD Ramp Testing for RF Circuits.
José Pineda de Gyvez, Guido Gronthoud, Rashid Amine
2003X-Tolerant Compression And Application of Scan-ATPG Patterns In A BIST Architecture.
Peter Wohl, John A. Waicukauski, Sanjay Patel, Minesh B. Amin
2003XML And Java For Open ATE Programming Environment.
A. T. Sivaram, Daniel Fan, Jon Pryce
2003Yield Threats and Inadequacy of One-time Test.
Yervant Zorian