ITC A

138 papers

YearTitle / Authors
1995A Bulti-in Self-Test Strategy for Wireless Communication Systems.
Benoît R. Veillette, Gordon W. Roberts
1995A Comparative Analysis of Input Stimuli for Testing Mixed-Signal LSIs Based on Curent Testing.
Yukiya Miura
1995A Comparison of Test Requirements, Methods, and Results for Seven MCM Products.
Andrew Flint
1995A Designer's View of Chip Test.
Thomas L. Anderson
1995A Detailed Analysis of GOS Defects in MOS Transistors: Testing Implications at Circuit Level.
Jaume Segura, Carol de Benito, Antonio Rubio, Charles F. Hawkins
1995A Discussion of Methods for Measuring Low-Amplitude Jitter.
Michael K. Williams
1995A Fault Model and a Test Method for Analog Fuzzy Logic Circuits.
Stefan Weiner
1995A Gate-Array-Based 666MHz VLSI Test System.
Shuji Kikuchi, Yoshihiko Hayashi, Takashi Suga, Jun Saitou, Masahiko Kaneko, Takashi Matsumoto, Ryozou Yoshino
1995A General Purpose ATE Based I
Gerald H. Johnson, Jan B. Wilstrup
1995A Hierarchical, Desgin-for-Testability (DFT) Methodology for the Rapid Prototyping of Application-Specific Signal Processors (RASSP).
Richard M. Sedmak, John Evans
1995A Low-Cost High-Performance CMOS Timing Vernier for ATE.
Jim Chapman, Jeff Currin, Steve Payne
1995A Methodology to Design Efficient BIST Test Pattern Generators.
Chih-Ang Chen, Sandeep K. Gupta
1995A New Hardware Fault Insertion Scheme for System Diagnostics Verification.
Benoit Nadeau-Dostie, Harry Hulvershorn, Saman Adham
1995A New Method for Partial Scan Design Based on Propagation and Justification Requirements of Faults.
Insung Park, Dong Sam Ha, Gyoochan Sim
1995A Novel Low-Cost Approach to MCM Interconnect Test.
Bruce C. Kim, Abhijit Chatterjee, Madhavan Swaminathan, David E. Schimmel
1995A Routing Testing of a VLSI Massively Parallel Machine Based on IEEE 1149.1.
Chouki Aktouf, Chantal Robach, A. Marinescu
1995A Secure Data Transmission Scheme for 1149.1 Backplane Test Bus.
Wuudiann Ke, Duy Le, Najmi T. Jarwala
1995A Single Board Test System: Changing the Test Paradigm.
Garry C. Gillette
1995A Test Data Collection System for Uniform Data Analysis.
Susan D. Shaye
1995A Tester for Design
Gary J. Lesmeister
1995Advantages of High-Level Test Synthesis over Design for Test.
Rabindra K. Roy
1995Algorithmic Extraction of BSDL from 1149.1-compliant Sample ICs.
Douglas W. Raymond, D. Eugene Wedge, Philip J. Stringer, Harold W. Ng, Suzanne T. Jennings, Craig T. Pynn, Winsor Soule Jr.
1995An Approach for Designing Total-Dose Tolerant MCMs Based on Current Monitoring.
Fabian Vargas, Michael Nicolaidis, Yervant Zorian
1995An Effective BIST Scheme for Booth Multipliers.
Dimitris Gizopoulos, Antonis M. Paschalis, Yervant Zorian
1995An Efficient and Economic Partitioning Approach for Testability.
Xinli Gu, Krzysztof Kuchcinski, Zebo Peng
1995An Experimental Chip to Evaluate Test Techniques: Chip and Experiment Design.
Piero Franco, William D. Farwell, Robert L. Stokes, Edward J. McCluskey
1995An Experimental Chip to Evaluate Test Techniques: Experiment Results.
Siyad C. Ma, Piero Franco, Edward J. McCluskey
1995Arbitrary-Precision Signal Generation for Bandlimited Mixed-Signal Testing.
Xavier Haurie, Gordon W. Roberts
1995Automated 1.5 GHz Sonet Characterization.
Rob Tepper, Jim Tarpo
1995Avoiding Unknown States When Scanning Mutually Exclusive Latches.
Stephen Pateras, Martin S. Schmookler
1995Capacitive Leadframe Testing.
Ted T. Turner
1995Challenging the "High Performance - High Cost" Paradigm in Test.
Ulrich Schoettmer, Toshiyuki Minami
1995Classification and Test Generation for Path-Delay Faults Using Single Stuck-Fault Tests.
Marwan A. Gharaybeh, Michael L. Bushnell, Vishwani D. Agrawal
1995Compiled Code, Dynamic Worst Case Timing Simulation Tracking Multiple Causality.
Kamal K. Varma
1995Contract Manufacturing: How Much Can They Do?
Tom Langford
1995Coping with Re-usability Using Sequential ATPG: A Practical Case Study.
Jos van Sas, Erik Huyskens, Hans Naert, Fred Schell, Ad J. van de Goor
1995Cost-Effective System-Level Test Strategies.
Des Farren, Anthony P. Ambler
1995Cutting the Cost of Test; the Value-added Way.
William R. Simpson
1995DFT & ATPG: Together Again.
Ben Mathew, Daniel G. Saab
1995Deep Submicron: Is Test Up to the Challenge?
Kenneth M. Butler
1995Design and Testing of the On-Ramps to the Information Superhighway.
Philippe Chauveau
1995Deterministic Self-Test of a High-Speed Embedded Memory and Logic Processor Subsystem.
Luigi Ternullo Jr., R. Dean Adams, John Connor, Garret S. Koch
1995Development of an ATE Test Station for Mixed CATV/TELCO Products.
Michael T. Freeman
1995Distributed Probabilistic Diagnosis of MCMs on Large Area.
Koppolu Sasidhar, Abhijit Chatterjee, Vinod K. Agarwal, Joseph L. A. Hughes
1995Dynamic Program Complexity and Software Testing.
John C. Munson, Gregory A. Hall
1995Dynamic Test Emulation for EDA-Based Mixed-Signal Test Development Automation.
Jean Qincui Xia, Tom Austin, Nash Khouzam
1995Electrical Troubleshooting, Diagnostics, and Repair of Multichip Modules.
David C. Keezer
1995End-to-End Performance Measurement for Interactive Multimedia Television.
Martin A. Schulman
1995End-to-End Test Strategy for Wireless Systems.
Madhuri Jarwala, Duy Le, Michael S. Heutmaker
1995Evaluating Waveform-Generation Capabilities of VLSI Test Systems.
Michael G. Davis
1995Exact Aliasing Computation for RAM BIST.
O. Kebichi, Michael Nicolaidis, Vyacheslav N. Yarmolik
1995Failure Analysis for Full-Scan Circuits.
Kaushik De, Arun Gunda
1995Finding Defects with Fault Models.
Robert C. Aitken
1995Finding I/O Faults on In-Circuit ICs Using Parasitic Transistor Tests.
Jack Ferguson
1995From Hardware to Software Testability.
Yves Le Traon, Chantal Robach
1995Functional Tests for Scan Chain Latches.
Samy Makar, Edward J. McCluskey
1995Hierarchical Functional-Fault Simulation for High-Level Synthesis.
Mark Kassab, Janusz Rajski, Jerzy Tyszer
1995High-Level Test Generation Using Symbolic Scheduling.
Mark C. Hansen, John P. Hayes
1995High-Performance Circuit Testing with Slow-Speed Testers.
Vishwani D. Agrawal, Tapan J. Chakraborty
1995I
Manoj Sachdev
1995I
Adit D. Singh, Haroon Rasheed, Walter W. Weber
1995IC Performance Prediction System.
V. Ramakrishnan, D. M. H. Walker
1995Implementing 1149.1 in the PowerPC
Carol Pyron, William C. Bruce
1995Improved Boundary Scan Design.
Lee Whetsel
1995Improvement of the Defect Level of Micro-computer LSI Testing.
Junichi Hirase
1995Improving Board and System Test: A Proposal to Integrate Boundary Scan and I
Douglas Reed, Jason Doege, Antonio Rubio
1995Improving DSP-Based Measurements with Spectral Interpolation.
Mark Burns
1995In-System Testing of Cache Memories.
Janusz Sosnowski
1995Increasing Test Throughput Through the Implementation of Parallel Test on a 16-Bit Multimedia Audio CODEC.
Harold Bogard, Celeste Repasky
1995Inductive Contamination Analysis (ICA) with SRAM Application.
Jitendra Khare, Wojciech Maly
1995Industrial Relevance of Analog IFA: A Fact or a Fiction.
Manoj Sachdev, Bert Atzema
1995IntegraTEST: The New Wave in Mixed-Signal Test.
Birger Schneider, Soeren Soegaard
1995Integrated Test Solutions and Test Economics for MCMs.
Kevin T. Kornegay, Kaushik Roy
1995Integration of IEEE Std. 1149.1 and Mixed-Signal Test Architectures.
David J. Cheek, Ramaswami Dandapani
1995Intel 386
Hitesh Ahuja, Dean Arriens, Ben Schneller, Vandana Verma, Wendy Whitman
1995Intel and the Myths of Test.
Kenneth M. Thompson
1995Is High-Level Test Synthesis Just Design for Test?
Christian Landrault, Marie-Lise Flottes, Bruno Rouzeyre
1995It's DFT, Boundary Scan and Life Cycle Benefits.
Gary O'Donnell
1995Leave the Wires to Last - Funcitonal Evaluation of the IEEE Std 1149.5 Module Test and Maintenance Bus.
Rodham E. Tulloss
1995Linking Diagnostic Software to Hardware Self Test in Telecom Systems.
Harry Hulvershorn, Paul Soong, Saman Adham
1995Low-Complexity Fault Simulation under the Multiplie Observation Time Testing Approach.
Irith Pomeranz, Sudhakar M. Reddy
1995MCM Quality and Cost Analysis Using Economics Models.
Chryssa Dislis, A. F. Al-Ani, Ian P. Jalowiecki
1995Matching Models to Real Life for Defect Reduction.
James A. Tuttle, Thomas W. Collins, Mary Stone Tuttle
1995Non-Robust versus Robust.
Alicja Pierzynska, Slawomir Pilarski
1995On Combining Design for Testability Techniques.
Prashant S. Parikh, Miron Abramovici
1995On Efficiently and Reliably Achieving Low Defective Part Levels.
Li-C. Wang, M. Ray Mercer, Thomas W. Williams
1995On the Effect of I
Kenneth M. Wallquist
1995On the Use of Neural Networks to Guide Software Testing Activities.
Charles Anderson, Anneliese von Mayrhauser, Richard T. Mraz
1995Optimal Space Compaction of Test Responses.
Krishnendu Chakrabarty, Brian T. Murray, John P. Hayes
1995Optimizing Product Profitability - The Test Way.
Prab Varma
1995Optimizing Test Strategies for SONET/SDH/ATM Network Element Manufacturing.
Mark Hoogerbrugge
1995Overview of PowerPC
Jen-Tien Yen, Marie Sullivan, Carlos Montemayor, Pete Wilson, Richard Evers
1995Parallel Delay Fault Coverage and Test Quality Evaluation.
Ira Pramanick, Ankan K. Pramanick
1995Performance Driven BIST Technique for Random Logic.
Charles Njinda, Neeraj Kaul
1995Plug & Play I
Keith Baker, T. F. Waayers, F. G. M. Bouwman, M. J. W. Verstraelen
1995Proceedings IEEE International Test Conference 1995, Driving Down the Cost of Test, Washington, DC, USA, October 21-25, 1995
1995Production I
Gregory A. Maston
1995Re-examining the Needs of the Mixed-Signal Test.
Gordon W. Roberts
1995Report on a Pilot Project Successfully Implementing a Design-to-Test Methodology.
Scot Bullock
1995Required - A Portable Test Standard.
Lawrence D. Carpenter
1995STIL from the Users Perspective.
Gregory A. Maston
1995SiPROBE - A New Technology for Wafer Probing.
Karl F. Zimmermann
1995Software Test Data Generation Using the Chaining Approach.
Roger Ferguson, Bogdan Korel
1995Solving Known Good Die (and Substrate) Test Issues.
Alan W. Righter
1995Structured Design-for-Debug - The SuperSPARC
Hong Hao, Rick Avra
1995Stuck-at Faults, PPMs Rejects or? What doe the SIA Roadmaps Say?
Keith Baker
1995Study on the Costs of On-site VLSI Testing.
Junichi Hirase
1995Supplying Known-Good Die for MCM Applications Using Low-Cost Embedded Testing.
A. Frisch, Mitch Aigner, T. Almy, Hans J. Greub, Mousumi Mitra Hazra, S. Mohr, Nicholas J. Naclerio, W. Russell, M. Stebniskey
1995Synthesis and Retiming for the Pseudo-Exhaustive BIST of Synchronous Sequential Circuits.
Samir Lejmi, Bozena Kaminska, Bechir Ayari
1995Synthesis of Mapping Logic for Generating Transformed Pseudo-Random Patterns for BIST.
Nur A. Touba, Edward J. McCluskey
1995Synthesized Transparent BIST for Detecting Scrambled Pattern-Sensitive Faults in RAMs.
Bruce F. Cockburn, Y.-F. Nicole Sat
1995THD and SNR Tests Using the Simplified Volterra Series with Adaptive Algorithms.
Luke S. L. Hsieh, Andrew Grochowski
1995Telecom Test: New Challenges, Old Roots.
James Jamieson
1995Test Generation and Design for Test for a Large Multiprocessing DSP.
Graham Hetherington, Greg Sutton, Kenneth M. Butler, Theo J. Powell
1995Test Point Insertion for an Area Efficient BIST.
Claus Schotten, Heinrich Meyr
1995Test Quality: Required Stuck-at Fault Coverage with the Use of I
Ron Wantuck
1995Test SPC: A Process to Improve Test System Integrity.
Willie Benitez, Deo Marrero, Douglas J. Mirizzi, Dale Ohmart
1995Test Synthesis in the Behavioral Domain.
Christos A. Papachristou, Joan Carletta
1995Test Synthesis: From Wishful Thinking to Reality.
Kamalesh N. Ruparel
1995Test Vector Generation for Parametric Path Delay Faults.
Mukund Sivaraman, Andrzej J. Strojwas
1995Testability, Debuggability, and Manufacturability Features of the UltraSPARC
Marc E. Levitt, Srinivas Nori, Sridhar Narayanan, G. P. Grewal, Lynn Youngs, Anjali Jones, Greg Billus, Siva Paramanandam
1995Testing a Switching Memory in a Telcommunication System.
Stefano Barbagallo, Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda
1995The Case for Contract Manufacturing.
Randall Hassig
1995The Final Barriers to Widespread Use of I
John M. Acken
1995The ITC Lecture Series: An Experiment.
Kenneth P. Parker, David Greene
1995The Many Faces of Test Synthesis.
Peter C. Maxwell
1995The P1149.4 Mixed Signal Test Bus: Costs and Benefits.
Stephen K. Sunter
1995The Use of Linear Models for the Efficient and Accurate Testing of A/D Converters.
Peter D. Capofreddi, Bruce A. Wooley
1995Timing-Driven Test Point Insertion for Full-Scan and Partial-Scan BIST.
Kwang-Ting Cheng, Chih-Jen Lin
1995Towards 100% Testable FIR Digital Filters.
Laurence Goodby, Alex Orailoglu
1995Transient Power Supply Current Testing of Digital CMOS Circuits.
Rafic Z. Makki, Shyang-Tai Su, H. Troy Nagle
1995Two New Techniques for Identifying Opens on Printed Circuit Boards: Analog Junction Test & Radio Frequency Induction Test.
Joe Wrinn
1995Upset-Tolerant CMOS SRAM Using Current Monitoring: Prototype and Test Experiments.
Th. Calin, F. L. Vargas, Michael Nicolaidis
1995User Application of Statistical Process Monitor Techniques to ASIC Critical Parameters.
Alex M. Ijaz, Eugene R. Hnatek
1995Using the Right Tools and Techniques leads to Successful Testing of MCMs.
Andrew Flint
1995Visualizing Quality.
Solomon Max
1995What's So Different about Deep-Submicron Test?
Craig Hunter
1995Yiel Learning via Functional Test Data.
Young-Jun Kwon, D. M. H. Walker