ITC A

133 papers

YearTitle / Authors
19941149.1 Scan Control Transport Levels.
Robert Gage
19943B21D BIST/Boundary-Scan System Diagnostic Test Story.
Edward C. Behnke
1994500-MHz Testing on a 100-MHz Tester.
Didier Wimmers, Kris Sakaitani, Burnell G. West
1994A Case Study in the Use of Scan in microSparc
Jerry Katz
1994A Generic Test and Maintenance Node for Embedded System Test.
John D. Lofgren
1994A Hierarchical Environment for Interactive Test Engineering.
Thomas Burch, Joachim Hartmann, Günter Hotz, M. Krallmann, U. Nikolaus, Sudhakar M. Reddy, Uwe Sparmann
1994A Hybrid Fault Simulator for Synchronous Sequential Circuits.
Rolf Krieger, Bernd Becker, Martin Keim
1994A Practical System for Mutation Testing: Help for the Common Programmer.
A. Jefferson Offutt
1994A Procedural Interface to Test.
Gregory A. Maston
1994A Serially Addressable, Flexible Current Monitor for Test Fixture Based I
Alan Hales
1994A Simulation-Based Protocol-Driven Scan-Test-Design Rule Checker.
Edward B. Pitty, Denis Martin, Hi-Kyeung Tony Ma
1994A Software Architecture for Mixed-Signal Functional Testing.
John A. Masciola, Gerald K. Morgan, Geoffrey L. Templeton
1994A Study of I
Sreejit Chakravarty, Paul J. Thadikaran
1994A Test Methodology to Support an ASEM MCM Foundry.
Thomas M. Storey, C. Lapihuska, E. Atwood, L. Su
1994A Test Process Optimization and Cost Modeling Tool.
Timothy J. Moore
1994A Test Retrospection and a Quest for Direction.
Robert E. Anderson
1994A Test-Clock Reduction Method for Scan-Designed Circuits.
Jau-Shien Chang, Chen-Shang Lin
1994A Test-System Architecture to Reduce Transmission Line Effects During High-Speed Testing.
Marc Mydill
1994ASIC Test Cost/Strategy Trade-offs.
Donald L. Wheater, Phil Nigh, Jeanne Trinko Mechler, Luke Lacroix
1994ATPG for Heat Dissipation Minimization During Test Application.
Seongmoon Wang, Sandeep K. Gupta
1994Achieving +/-30ps Accuracy in the ATE Environment.
Dennis Petrich
1994Aliasing-free Signature Analysis for RAM BIST.
Vyacheslav N. Yarmolik, Michael Nicolaidis, O. Kebichi
1994An Analog Multi-Tone Signal Generator for Built-In Self-Test Applications.
A. K. Lu, Gordon W. Roberts
1994An Approach to Accelerate Scan Testing in IEEE 1149.1 Architectures.
Lee Whetsel
1994An Automatic Test Pattern Generator for Large Sequential Circuits Based on Genetic Algorithms.
Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda
1994An Effective BIST Scheme for Ring-Address Type FIFOs.
Yervant Zorian, Ad J. van de Goor, Ivo Schanstra
1994An I
Chauchin Su, Kychin Hwang, Shyh-Jye Jou
1994An Improved Method of ADC Jitter Measurement.
Yves Langard, Jean-Luc Balat, Jacques Durand
1994An Integrated Approach for Analog Ciruit Testing with a Minmum Number of Detected Parameters.
Mustapha Slamani, Bozena Kaminska, Guy Quesnel
1994An Intelligent Software-Integrated Environment of IC Testing.
Yuning Sun, Xiaoming Wang, Wanchun Shi
1994An Off-chip I
Hans A. R. Manhaeve, Paul L. Wrighton, Jos van Sas, Urbain Swerts
1994An On-Line Data Collection and Analysis System for VLSI Devices at Wafer Probe and Final Test.
Gregory W. Papadeas, David Gauthier
1994Analogue Fault Simulation Based on Layout-Dependent Fault Models.
R. J. A. Harvey, Andrew Mark David Richardson, Eric Bruls, Keith Baker
1994Application of Joint Time-Frequency Analysis in Mixed-Signal Testing.
Frank Bouwman, Taco Zwemstra, Sonny Hartanto, Keith Baker, Jan Koopmans
1994Application of Optoelectronic Techniques to High Speed Testing.
Ewa Sokolowska, Bozena Kaminska
1994Automated Logic Synthesis of Random-Pattern-Testable Circuits.
Nur A. Touba, Edward J. McCluskey
1994Automatic Failure-Analysis System for High-Density DRAM.
Sangchul Oh, Jae-Ho Kim, Ho-Jeong Choi, Si-Don Choi, Ki Tae Park, Jong-Woo Park, Wha-Joon Lee
1994B-algorithm: A Behavioral-Test Generation Algorithm.
Chang Hyun Cho, James R. Armstrong
1994Back Annotation of Physical Defects into Gate-Level, Realistic Faults in Digital ICs.
Mario Calha, Marcelino B. Santos, Fernando M. Gonçalves, Isabel C. Teixeira, João Paulo Teixeira
1994Backplane Test Bus Selection Criteria.
Cary Champlin
1994Balancing Structured and Ad-hoc Design for Test: Testing of the PowerPC 603
Craig Hunter, E. Kofi Vida-Torku, Johnny J. LeBlanc
1994Behavioral-Test Generation using Mixed-Integer Non-linear Programming.
R. S. Ramchandani, Donald E. Thomas
1994Benchmarking.
Kamalesh N. Ruparel
1994Built-in System Test and Fault Location.
Gordon R. McLeod
1994Calculating Error of Measurement on High-Speed Microprocessor Test.
Tamorah Comard, Madhukar Joshi, Donald A. Morin, Kimberley Sprague
1994Concurrent Engineering with DFT in the Digital System: A Parallel Process.
Ralph Sanchez
1994Configuring Flip-Flops to BIST Registers.
Albrecht P. Stroele, Hans-Joachim Wunderlich
1994Control Strategies for Chip-Based DFT/BIST Hardware.
Debaditya Mukherjee, Massoud Pedram, Melvin A. Breuer
1994Defect Classes - An Overdue Paradigm for CMOS IC.
Charles F. Hawkins, Jerry M. Soden, Alan W. Righter, F. Joel Ferguson
1994Defects, Fault Coverage, Yield and Cost in Board Manufacturing.
Mick Tegethoff, Tom Chen
1994Design of an Efficient Weighted-Random-Pattern Generation System.
Rohit Kapur, Srinivas Patil, Thomas J. Snethen, Thomas W. Williams
1994Designing "Dual-Personality" IEEE 1149.1-Compliant Multi-Chip Modules.
Najmi T. Jarwala
1994Detection and Correction of Systematic Type 1 Test Errors Through Concurrent Engineering.
William R. Kosar
1994Development of a CLASS 1 QTAG Monitor.
Keith Baker, A. H. Bratt, Andrew Richardson, A. Welbers
1994Development of a Solution for Achieving Known-Good-Die.
Lina Prokopchak
1994Digitizer Error Extraction in the Nonlinearity Test.
Luke S. L. Hsieh, Sandeep P. Kumar
1994Do You Practice Safe Tests? What We Found Out About Your Habits.
Cecil A. Dean, Yervant Zorian
1994ECC-On-SIMM Test Challenges.
Timothy J. Dell
1994Efficient O(sqrt(n)) BIST Algorithms for DDNPS Faults in Dual-Port Memories.
Alaaeldin A. Amin, Mohamed Y. Osman, Radwan E. Abdel-Aal, Husni Al-Muhtaseb
1994Efficient Test-Response Compression for Multiple-Output Cicuits.
Krishnendu Chakrabarty, John P. Hayes
1994Ensuring System Traceability to International Standards.
Solomon Max
1994Environmental Stress Testing with Boundary-Scan.
Duy Le, Ivan Karolik, Ronald Smith, A. J. Mcgovern, Chyral Curette, Joseph Ulbin, Michael Zarubaiko, Charles Henry, Lewis Stevens
1994Faster, Better, Cheaper: What Does This Mean For The Test Industry?
Walt Wilson
1994Fastpath: A Path-Delay Test Generator for Standard Scan Designs.
Bill Underwood, Wai-On Law, Sungho Kang, Haluk Konuk
1994Fault Injection Boundary-Scan Design for Verification of Fault-Tolerant Systems.
Savio N. Chau
1994Feasibility Study of Smart Substrate Multichip Modules.
Anne E. Gattiker, Wojciech Maly
1994Fixed-Biased Pseudorandom Built-In Self-Test for Random-Pattern-Resistant Circuits.
Mohammed F. AlShaibi, Charles R. Kime
1994Full-Symbolic ATPG for Large Circuits.
Gianpiero Cabodi, Paolo Camurati, Stefano Quer
1994GLFSR - A New Test Pattern Generator for Built-In Self-Test.
Dhiraj K. Pradhan, Mitrajit Chatterjee
1994Generating March Tests Automatically.
Ad J. van de Goor, B. Smit
1994Goal-Directed Vector Generation Using Sample ICs.
Douglas W. Raymond, Philip J. Stringer, Harold W. Ng, Michael Mitsumata, Robert Burk
1994HALT: Bridging the Gap Between Theory and Practice.
Cheryl Ascarrunz
1994High-Yield Multichip Modules Based on Minimal IC Pretest.
William E. Burdick Jr., Wolfgang Daum
1994Hybrid Design for Testability Combining Scan and Clock Line Control and Method for Test Generation.
Sanghyeon Baeg, William A. Rogers
1994Implementation of a Dual-Segment Architecture for a High-Pin-Count VLSI Test System.
Michael G. Davis
1994Improving Software Testability with Assertion Insertion.
Hwei Yin, James M. Bieman
1994In-System Timing Extraction and Control Through Scan-Based, Test-Access Ports.
André DeHon
1994Integration of Design, Manufacturing and Testing.
Wojciech Maly
1994Is I
Scott Davidson
1994Low-Power Mode and IEEE 1149.1 Compliance - A Low-Power Solution.
Alfred L. Crouch, Rick Ramus, Colin M. Maunder
1994MCM Test Trade-Offs.
Jed Eastman
1994Making the Circular Self-Test Path Technique Effective for Real Circuits.
Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda
1994Manufacturing-Test Simulator: A Concurrent-Engineering Tool for Boards and MCMs.
Mick Tegethoff, Tom Chen
1994Membrane Prove Technology for MCM Known-Good-Die.
Toshiaki Ueno, You Kondoh
1994Modeling for Structured System Interconnect Test.
Frank W. Angelotti
1994Modeling the Effect of Ground Bounce on Noise Margin.
Mary Sue Haydt, Robert Owens, Samiha Mourad
1994Modular Mixed Signal Testing: High Speed or High Resolution.
Eric Kushnick
1994Multi-Frequency, Multi-Phase Scan Chain.
Kee Sup Kim, Len Schultz
1994Multichip Module Testing Methodologies: What's In; What's Not.
Kenneth E. Posse
1994NAND Trees Accurately Diagnose Board-Level Pin Faults.
Gordon D. Robinson
1994Navigating Test Access in Systems.
Lee Whetsel
1994Non-Volatile Programmable Devices and In-Circuit Test.
Douglas W. Raymond, Dominic F. Haigh, Ray Bodick, Barbara Ryan, Dale McCombs
1994Observations on the 1149.x Family of Standards.
Kenneth P. Parker
1994On Achieving Complete Testability of Synchronous Sequential Circuits with Synchronizing Sequences.
Irith Pomeranz, Sudhakar M. Reddy
1994On Path-Delay Testing in a Standard Scan Environment.
Prab Varma
1994On Synthesizing Circuits With Implicit Testability Constraints.
Henry Cox
1994On the Initialization of Sequential Circuits.
Jalal A. Wehbeh, Daniel G. Saab
1994Optimizing Boundary Scan in a Proprietary Environment.
William Eklow
1994Parallel Pattern Fast Fault Simulation for Three-State Circuits and Bidirectional I/O.
J. Th. van der Linden, M. H. Konijnenburg, Ad J. van de Goor
1994Potential Solutions for Benchmarking Issues.
Don Sterba
1994Practical Test Methods for Verification of the EDRAM.
Kent Stalnaker
1994Proceedings IEEE International Test Conference 1994, TEST: The Next 25 Years, Washington, DC, USA, October 2-6, 1994
1994QTAG: A Standard for Test Fixture Based I
Keith Baker
1994Reduced Scan Shift: A New Testing Method for Sequential Circuit.
Yoshinobu Higami, Seiji Kajihara, Kozo Kinoshita
1994Residual Charge on the Faulty Floating Gate MOS Transistor.
Simon Johnson
1994Roadmap for Extending IEEE 1149.1 for Hierarchical Control of Locally-Stored, Standardized-Command-Set Test Programs.
John Andrews
1994Sequentially Untestable Faults Identified Without Search ("Simple Implications Beat Exhaustive Search!").
Mahesh A. Iyer, Miron Abramovici
1994Simulation Results of an Efficient Defect-Analysis Procedure.
Olaf Stern, Hans-Joachim Wunderlich
1994Sleuth: A Domain-Based Testing Tool.
Anneliese von Mayrhauser, Jeff Walls, Richard T. Mraz
1994Structure and Metrology for a Single-wire Analog.
Yunsheng Lu, Weiwei Mao, Ramaswami Dandapani, Ravi K. Gulati
1994System Test Cost Modelling Based on Event Rate Analysis.
Des Farren, Anthony P. Ambler
1994System-Level Testability of Hardware/Software Systems.
Harald P. E. Vranken, M. P. J. Stevens, M. T. M. Segers, J. H. M. M. van Rhee
1994Techniques for Characterizing DRAMs With a 500-MHz Interface.
James A. Gasbarro, Mark Horowitz
1994Test Station Workcell Controller and Resource Relationship Design.
Scott A. Erjavic
1994Test Strategies for a Family of Complex MCMs.
Andrew Flint
1994Test: The New Value-Added Field.
Aart J. de Geus
1994Testability Strategy of the ALPHA AXP 21164 Microprocessor.
Dilip K. Bhavsar, John H. Edmondson
1994Testabilty Features of the MC 68060 Microprocessor.
Alfred L. Crouch, Matthew Pressly, Joe Circello
1994Testing 256k Word x 16 Bit Cache DRAM (CDRAM).
Yasuhiro Konishi, Toshiyuki Ogawa, Masaki Kumanoya
1994Testing CMOS Logic Gates for Realistic Shorts.
Brian Chess, Anthony Freitas, F. Joel Ferguson, Tracy Larrabee
1994Testing High Speed Drams.
James A. Gasbarro
1994Testing Issues on High Speed Synchronous DRAMs.
Wha-Joon Lee
1994Testing Two Generations of HDTV Decoders - The Impact of Boundary-Scan.
Lars Eerenstein
1994The Effect on Quality of Non-Uniform Fault Coverage and Fault Probability.
Peter C. Maxwell, Robert C. Aitken, Leendert M. Huisman
1994The IEEE P1149.5 MTM-Bus, A Backplane Test and Initialization Interface.
Patrick F. McHugh
1994The PowerPC 603
Craig Hunter, Jeff Slaton, Jim Eno, Romesh M. Jessani, Carl Dietz
1994Transforming Behavioral Specifications to Facilitate Synthesis of Testable Designs.
Sujit Dey, Miodrag Potkonjak
1994Transparent Memory Testing for Pattern-Sensitive Faults.
Mark G. Karpovsky, Vyacheslav N. Yarmolik
1994Ultra Hi-Speed Pin-Electronics and Test Station Using GaAs IC.
Takashi Sekino, Toshiyuki Okayasu
1994Using SCAN
John Andrews
1994Variable Supply Voltage Testing for Analogue CMOS and Bipolar Circuits.
Eric Bruls
1994When Does It Make cents to Give Up Physical Test Access?
David A. Greene
1994microSPARC
Kalon Holdbrook, Sunil Joshi, Samir Mitra, Joe Petolino, Renu Raman, Michelle Wong