| 1991 | "Resistive Shorts" Within CMOS Gates. Hong Hao, Edward J. McCluskey |
| 1991 | A 20 Bit Waveform Source for a Mixed Signal Automatic Test System. Daniel A. Rosenthal |
| 1991 | A Case Study of Mixed Signal Fault Isolation: Knowledge Based vs. Decision Tree Programming. Charles W. Buenzli Jr., Robert Gonzalez |
| 1991 | A Common Approach to Test Generation and Hardware Verification Based on Temporal Logic. Thomas Kropf, Hans-Joachim Wunderlich |
| 1991 | A Computer Architecture for High Pin Count Testers. Christopher J. Hannaford |
| 1991 | A Concurrent Test Architecture for Massively-Parallel Computers and its Error Detection Capability. Marius V. A. Hâncu, Kazuhiko Iwasaki, Yuji Sato, Mamoru Sugie |
| 1991 | A Densely Integrated High Performance CMOS Tester. Gary J. Lesmeister |
| 1991 | A Design-for-Testability Architecture for Multichip Modules. Kenneth E. Posse |
| 1991 | A Flexible Approach to Test Program Cross Compilers. Michael A. Perugini |
| 1991 | A Generic Method to Develop a Defect Monitoring System for IC Processes. Eric Bruls, F. Camerik, H. J. Kretschman, Jochen A. G. Jess |
| 1991 | A Layout Driven Design for Testability Technique for MOS VLSI Circuits. Sungho Kim, Prithviraj Banerjee, Srinivas Patil |
| 1991 | A Methodology for Designing Optimal Self-Checking Sequential Circuits. Rubin A. Parekhji, G. Venkatesh, Sunil D. Sherlekar |
| 1991 | A Mixed Functional/IDDQ Testing Methodology for CMOS Transistor Faults. Evstratios Vandris, Gerald E. Sobelman |
| 1991 | A Partial Enhanced-Scan Approach to Robust Delay-Fault Test Generation for Sequential Circuits. Kwang-Ting Cheng, Srinivas Devadas, Kurt Keutzer |
| 1991 | A Picosecond Accuracy Timing Error Compensation Technique in TDR Measurement. Tai-ichi Otsuji |
| 1991 | A Pragmatic Test Data Management System. Gordon F. Taylor, Steven M. Blumenau |
| 1991 | A Product Information Access System for the Verification, Test, Diagnosis and Repair of Electronic Assemblies. John McWha, Peter Kouklamanis |
| 1991 | A Sequential Test Generator with Explicit Elimination of Easy-to-Test Faults. Tsu-Wei Ku, Wei-Kong Chia |
| 1991 | A Test Generation Method for Sequential Circuits Based on Maximum Utilization of Internal States. Toshinobu Ono, Masaaki Yoshida |
| 1991 | A Workstation Environment for Boundary Scan Interconnect Testing. Timothy J. Moore |
| 1991 | ARTEST: An Architectural Level Test Generator for Data Path Faults and Control Faults. Jaushin Lee, Janak H. Patel |
| 1991 | Achieving Board-Level BIST Using the Boundary-Scan Master. Najmi T. Jarwala, Chi W. Yau |
| 1991 | Achieving Complete Delay Fault Testability by Extra Inputs. Irith Pomeranz, Sudhakar M. Reddy |
| 1991 | Advanced Mixed Signal Testing by DSP Localized Tester. Koji Karube, Yoshiyuki Bessho, Tokuo Takakura, Keita Gunji |
| 1991 | Aliasing and Diagnosis Probability in MISR and STUMPS Using a General Error Model. Mark G. Karpovsky, Sandeep K. Gupta, Dhiraj K. Pradhan |
| 1991 | Allocation and Assignment in High-Level Synthesis for Self-Testable Data Paths. LaNae J. Avra |
| 1991 | An Accurate Bridging Fault Test Pattern Generator. Steven D. Millman, James P. Garvey Sr. |
| 1991 | An Address Maskable Parallel Testing for Ultra High Density DRAMs. Yoshikazu Morooka, Shigeru Mori, Hiroshi Miyamoto, Michihiro Yamada |
| 1991 | An Algorithm to Test Rams for Physical Neighborhood Pattern Sensitive Faults. Manoj Franklin, Kewal K. Saluja |
| 1991 | An Approach to Chip-Internal Current Monitoring and Measurement Using an Electron Beam Tester. Klaus Helmreich, Peter Nagel, Werner Wolz, Klaus D. Müller-Glaser |
| 1991 | An Architecture for Extending the IEEE Standard 1149.1 Test Access Port to System Backplanes. Dilip K. Bhavsar |
| 1991 | An Efficient, Forward Fault Simulation Algorithm Based on the Parallel Pattern Single Fault Propagation. Hyung Ki Lee, Dong Sam Ha |
| 1991 | An IEEE 1149.1 Based Logic/Signature Analyzer in a Chip. Lee Whetsel |
| 1991 | An Intelligent Approach to Automatic Test Equipment. William R. Simpson, John W. Sheppard |
| 1991 | An Organized Firmware Verification Environment for the Programmable Image DSP. Yutaka Tashiro, Hironori Yamauchi, Toshihiro Minami, Tetsuo Tajiri, Yutaka Suzuki |
| 1991 | Arbitrary Waveform Generation with Absolute Duration Control. Bryan J. Dinteman |
| 1991 | At-Speed Test is not Necessarily an AC Test. Jacob Savir, Robert F. Berry |
| 1991 | Built-In Self-Diagnostic Read-Only-Memories. Prawat Nagvajara, Mark G. Karpovsky |
| 1991 | Built-In Self-Test Considerations in a High-Performance, General-Purpose Processor. Sudha Sarma |
| 1991 | Built-In Self-Test for High-Speed Data-Path Circuitry. Charles E. Stroud |
| 1991 | Built-In Self-Test of the VLSI Content Addressable Filestore. Richard Illman, Terry Bird, George Catlow, Stephen Clarke, Len Theobald, Gil Willetts |
| 1991 | COMPACTEST: A Method to Generate Compact Test Sets for Combinatorial Circuits. Irith Pomeranz, Lakshmi N. Reddy, Sudhakar M. Reddy |
| 1991 | Can Redundancy Enhance Testability? Andrzej Krasniewski |
| 1991 | Can Undergraduate Test Engineering Education Be "Faster, Better, Sooner?". Richard Absher |
| 1991 | Characterization and Control of PLCC and MQFP Lead Inspection Systems. Scott A. Erjavic |
| 1991 | Circuit Pack BIST from System to Factory - The MCERT Chip. Partha Raghavachari |
| 1991 | Concurrent Engineering: Creating Designs That Are Faster, Better and Available Sooner. Phil Robinson |
| 1991 | Concurrent Error Detection for Restricted Fault Sets in Sequential Circuits and Microprogrammed Control Units Using Convolutional Codes. Lawrence P. Holmquist, Larry L. Kinney |
| 1991 | Concurrent Error Detection in Linear Analog and Switched-Capacitor State Variable Systems Using Continuous Checksums. Abhijit Chatterjee |
| 1991 | Coupling Electron-Beam Probing with Knowledge-Based Fault Localization. M. Marzouki, J. Laurent, Bernard Courtois |
| 1991 | Cube-Contained Random Patterns and Their Applications to the Complete Testing of Synthesized Multi-Level Circuits. Stephen Pateras, Janusz Rajski |
| 1991 | Current vs. Logic Testing of Gate Oxide Short, Floating Gate and Bridging Failures in CMOS. Rosa Rodríguez-Montañés, Jaume A. Segura, Víctor H. Champac, Joan Figueras, J. A. Rubio |
| 1991 | DSP Calibration for Accurate Time Waveform Reconstruction. Eric Rosenfeld, Bradford Sumner |
| 1991 | Defect Level Estimation of Random and Pseudorandom Testing. Wen-Ben Jone |
| 1991 | Delay Testing Quality in Timing-Optimized Designs. Eun Sei Park, Bill Underwood, Thomas W. Williams, M. Ray Mercer |
| 1991 | Delay Testing of Digital Circuits by Output Waveform Analysis. Piero Franco, Edward J. McCluskey |
| 1991 | Design for Testability: Using Scanpath Techniques for Path-Delay Test and Measurement. Bulent I. Dervisoglu, Gayvin E. Stong |
| 1991 | Distractions in Design for Testability and Built-Is Self-Test. Charles E. Stroud |
| 1991 | Distributed Layout Verification Using Sequential Software and Standard Hardware. Yehuda Shiran |
| 1991 | Don't Eliminate Incoming Test - Move It. D. L. Smoot, Babur Mustafa Pulat |
| 1991 | EE Curriculum - Continuous Process Improvement? Charles F. Hawkins, Richard H. Williams |
| 1991 | Effective Implementation of Statistical Process Control in an Integrated Circuit Test Environment. Sally Wilk |
| 1991 | Electromigration Effects in VLSI Due to Various Current Types. E. Weis, E. Kinsbron, M. Snyder, B. Vogel, N. Croitoru |
| 1991 | Enhancing Board Functional Self-Test by Concurrent Sampling. Kenneth D. Wagner, Thomas W. Williams |
| 1991 | Estimating the Quality of Manufactured Digital Sequential Circuits. Dharam Vir Das, Sharad C. Seth, Vishwani D. Agrawal |
| 1991 | Fast Sequential ATPG Based on Implicit State Enumeration. Hyunwoo Cho, Gary D. Hachtel, Fabio Somenzi |
| 1991 | Fast Signature Computation for Linear Compactors. D. Lambidonis, André Ivanov, Vinod K. Agarwal |
| 1991 | Fault Diagnosis using Functional Fault Models for VHDL descriptions. Vijay Pitchumani, Pankaj Mayor, Nimish Radia |
| 1991 | Fault Location with Current Monitoring. Robert C. Aitken |
| 1991 | Fault Modeling and Testing of GaAs Static Random Access Memories. Sundarar Mohan, Pinaki Mazumder |
| 1991 | Fault Modeling for the Testing of Mixed Integrated Circuits. Anne Meixner, Wojciech Maly |
| 1991 | For Test Automation, Silicon is Free. Tushar Gheewala |
| 1991 | Formalizing Signature Analysis for Control Flow Checking of Pipelined RISC Multiprocessors. X. Delord, Gabriele Saucier |
| 1991 | Gate-Delay-Fault Testability Properties of Multiplexor-Based Networks. Pranav Ashar, Srinivas Devadas, Kurt Keutzer |
| 1991 | Hardware Acceleration Alone Will Not Make Fault Grading ULSI a Reality. Gopi Ganapathy, Jacob A. Abraham |
| 1991 | Hierarchical Test Generation Based on Delayed Propagation. Margot Karam, Régis Leveugle, Gabriele Saucier |
| 1991 | Hierarchical Test Program Development for Scan Testable Circuits. Jens Leenstra, Lambert Spaanenburg |
| 1991 | High Frequency Wafer Probing and Power Supply Resonance Effects. S. P. Athan, David C. Keezer, J. McKinley |
| 1991 | High Performance Pin Electronics Employing GaAs IC and Hybrid Circuit Packaging Technology. Barry Baril, Dan Clayson, David McCracken, Stewart Taylor |
| 1991 | High Quality Tests for Switch-Level Circuits Using Current and Logic Test Generation Algorithms. Chun-Hung Chen, Jacob A. Abraham |
| 1991 | High-Density CMOS Multichip-Module Testing and Diagnosis. Robert W. Bassett, Pamela S. Gillis, John J. Shushereba |
| 1991 | IC Defects-Based Testability Analysis. José T. de Sousa, Fernando M. Gonçalves, João Paulo Teixeira |
| 1991 | Implementing 1149.1 on CMOS Microprocessors. William C. Bruce, Michael G. Gallup, Grady Giles, Tom Munns |
| 1991 | Implementing Boundary-Scan and Pseudo-Random BIST in an Asynchronous Transfer Mode Switch. Pierre Thorel, Jean-Luc Rainard, Alain Botta, Alain Chemarin, Jacques Majos |
| 1991 | Improving the Quality of Test Education. Wojciech Maly |
| 1991 | Industry Graphic Standards and ATE Windowing Software. Arthur E. Downey |
| 1991 | Integrating CrossCheck Technology into the Raytheon Test Environment. Stephen M. Lorusso, Paul N. Bompastore, Michael T. Fertsch |
| 1991 | Integrating Emulation Techniques into General Purpose ATE. R. Wade Williams |
| 1991 | Is Burn-In Burned Out? Charles C. Packard |
| 1991 | Is Burn-In Burned Out? Noel E. Donlin |
| 1991 | Languages to Support Boundary-Scan Test. Colin M. Maunder |
| 1991 | Linear Error Modeling of Analog and Mixed-Signal Devices. Gerard N. Stenbakken, T. Michael Souders |
| 1991 | Locating Bridging Faults in Memory Arrays. Ad J. van de Goor, P. C. M. van der Arend, Gert-Jan Tromp |
| 1991 | Logic Partitioning and Resynthesis for Testability. Kaushik De, Prithviraj Banerjee |
| 1991 | Looking for Functional Fault Equivalence. Antonio Lioy |
| 1991 | Low Overhead Built-In Testable Error Detection and Correction with Excellent Fault Coverage. Mehdi Katoozi, Arnold Nordsiek |
| 1991 | Maximal Diagnosis for Wiring Networks. Jung-Cheun Lien, Melvin A. Breuer |
| 1991 | Maximizing and Maintaining AC Test Accuracy in the Manufacturing Environment. Raymond J. Bulaga, Edward F. Westermann |
| 1991 | Military Burn-In Requirements - One Perspective. Daniel J. Burns |
| 1991 | Minimal Test Sets for Combinatorial Circuits. Gert-Jan Tromp |
| 1991 | Multi-Step Stress Test for Yield Improvement of 16Mbit EPROMs with Redundancy Scheme. Jun-ichi Miyamoto, Nobuaki Ohtsuka, Ken-ichi Imamiya, Naoto Tomita, Yumiko Iyama |
| 1991 | Multiple-Fault Simulation and Coverage of Deterministic Single-Fault Test Sets. Ken Kubiak, W. Kent Fuchs |
| 1991 | On Multiple Path Propagating Tests for Path Delay Faults. Ankan K. Pramanick, Sudhakar M. Reddy |
| 1991 | On Optimizing Wafer-Probe Testing for Product Quality Using Die-Yield Prediction. Adit D. Singh, C. Mani Krishna |
| 1991 | On Test Generation for Iddq Testing of Bridging Faults in CMOS Circuits. S. Wayne Bollinger, Scott F. Midkiff |
| 1991 | On the Integration of Design and Manufacturing for Improved Testability. Rafic Z. Makki, Kasra Daneshvar, Farid Tranjan, Richard Greene |
| 1991 | On the Testable Design of Bilateral Bit-Level Systolic Arrays. Subir Bandyopadhyay, Bhargab B. Bhattacharya |
| 1991 | Parity Bit Calculation and Test Signal Compaction for BIST Applications. Sungju Park, Sheldon B. Akers |
| 1991 | Partitioning Hierarchical Designs for Testability. Magdy S. Abadir, Joe Newman, Desmond D'Souza, Steve Spencer |
| 1991 | Proceedings IEEE International Test Conference 1991, Test: Faster, Better, Sooner, Nashville, TN, USA, October 26-30, 1991 |
| 1991 | Production Experience with Built-In Self-Test in the IBM ES/9000 System. Paul H. Bardell, Michael J. Lapointe |
| 1991 | Programming for Parallel Pattern Generators. M. Kanzaki, Masahiro Ishida |
| 1991 | Quality in Test Education? Kenneth Rose |
| 1991 | Real-Time Data Comparison for GigaHertz Digital Test. David C. Keezer |
| 1991 | Refined Bounds on Signature Analysis Aliasing for Random Testing. Nirmal R. Saxena, Piero Franco, Edward J. McCluskey |
| 1991 | Representing Boundary Scan Tests with the EDIF Test View. Carol Pyron |
| 1991 | Robustly Scan-Testable CMOS Sequential Circuits. Bong-Hee Park, Premachandran R. Menon |
| 1991 | Search State Equivalence for Redundancy Identification and Test Generation. John Giraldi, Michael L. Bushnell |
| 1991 | Selectable Length Partial Scan: A Method to Reduce Vector Length. Sean P. Morley, Ralph Marlett |
| 1991 | Software Testing - The State of the Practice. Edward F. Miller |
| 1991 | Software Testing, the State of the Practice. Ted W. Gary |
| 1991 | Software Testing. Paul D. Roddy |
| 1991 | Statistical Product Monitoring: A Powerful Tool for Quality Improvement. Barbara Cole, Glen Herzog, Phung Ngo, Steven Hinkle, Peter Sherry |
| 1991 | Stuck Fault and Current Testing Comparison Using CMOS Chip Test. Thomas M. Storey, Wojciech Maly, John Andrews, Myron Miske |
| 1991 | Test Application Timing: The Unexplored Issue in AC Test. Vijay S. Iyengar, Gopalakrishnan Vijayan |
| 1991 | Test Generation: A Boundary Scan Implementation for Module Interconnect Testing. Mark F. Lefebvre |
| 1991 | Test Grading the 68332. Tony Cheng, Eric Hoang, David Rivera, Alan Haedge, Jamie Fontenot, Glenn Carson |
| 1991 | Test Pattern Development and Evaluation for DRAMs with Fault Simulator RAMSIM. H.-D. Oberle, Peter Muhmenthaler |
| 1991 | Test Pattern Generation for Realistic Bridge Faults in CMOS ICs. F. Joel Ferguson, Tracy Larrabee |
| 1991 | Test Propagation Through Modules and Circuits. Brian T. Murray, John P. Hayes |
| 1991 | Test Vector Generation for Linear Analog Devices. Sheng-Jen Tsai |
| 1991 | Testability Features of the 68HC16Z1. Jose A. Lyon, Mike Gladden, Eytan Hartung, Eric Hoang, K. Raghunathan |
| 1991 | Testing the Integrity of the Boundary Scan Test Infrastructure. Frans G. M. de Jong, Frank van der Heyden |
| 1991 | The Behavior and Testing Implications of CMOS IC Logic Gate Open Circuits. Christopher L. Henderson, Jerry M. Soden, Charles F. Hawkins |
| 1991 | The Best Flip-Flops to Scan. Miron Abramovici, James J. Kulikowski, Rabindra K. Roy |
| 1991 | The Effect of Different Test Sets on Quality Level Prediction: When is 80% better than 90%? Peter C. Maxwell, Robert C. Aitken, Vic Johansen, Inshen Chiang |
| 1991 | The Interaction of Test and Quality. Peter C. Maxwell |
| 1991 | The enVision Don Organ |
| 1991 | Two Fault Injection Techniques for Test of Fault Handling Mechanisms. Johan Karlsson, Ulf Gunneflo, Peter Lidén, Jan Torin |
| 1991 | Two-Pattern Test Capabilities of Autonomous TPG Circuits. Kiyoshi Furuya, Edward J. McCluskey |
| 1991 | Two-Stage Fault Location. Paul G. Ryan, Shishpal Rawat, W. Kent Fuchs |
| 1991 | Unit Testing Versus Integration Testing. A. Jefferson Offutt |
| 1991 | Using Boundary Scan Description Language in Design. Dick Chiles, John DeJaco |
| 1990 | CMOS Bridging Fault Detection. Thomas M. Storey, Wojciech Maly |