| 1989 | "ATG" Test Generation Software. Arthur E. Downey |
| 1989 | : Experiments on Aliasing in Signature Analysis Registers. Dhiren Xavier, Robert C. Aitken, André Ivanov, Vinod K. Agarwal |
| 1989 | A 250 MHz Shared-Resource VLSI Test System with High Pin Count and Memory Test Capability. Shuji Kikuchi, Yoshihiko Hayashi, Takashi Matsumoto, Ryozou Yoshino, Ryuichi Takagi |
| 1989 | A BIST Design Methodology Experiment. Samuel H. Duncan |
| 1989 | A Framework and Method for Hierarchical Test Generation. John D. Calhoun, Franc Brglez |
| 1989 | A Fundamental Approach to SPC Implementation. Melisa N. Vittrup, Glendon S. Frashure |
| 1989 | A High Performance, 10-Volt Integrated Pin Electronics Driver. Christopher W. Branson |
| 1989 | A Logic Analyzer Tool That Cuts E-Beam Prober Acquisition Times. Christopher G. Talbot, Suresh Rajan |
| 1989 | A New Array Architecture for Parallel Testing in VLSI Memories. Yoshio Matsuda, Kazutami Arimoto, Masaki Tsukude, Tsukasa Oishi, Kazuyasu Fujishima |
| 1989 | A New Framework for Analyzing Test Generation and Diagnosis Algorithms for Wiring Interconnects. Najmi T. Jarwala, Chi W. Yau |
| 1989 | A New System Architecture for a Combined In-Circuit/Functional Tester. Jay M. Stepleton |
| 1989 | A Pragmatic Approach to the Design of Self-Testing Circuits. Yvon Savaria, Bruno Laguë, Bozena Kaminska |
| 1989 | A Proposed Benchmark Unit for Evaluating Electronic Troubleshooting Expert Systems. Moshe Ben-Bassat, Defna Ben-Arie, Israel Beniaminy, Jonathan Cheifetz, Michael Klinger |
| 1989 | A Self-Test System Architecture for Reconfigurable WSI. David L. Landis |
| 1989 | A Sequential Circuit Fault Simulation by Surrogate Fault Propagation. Xaiolin Wang, Fredrick J. Hill, Zhengkin Mi |
| 1989 | A Telecommunications Line Interface Test System Architecture. John L. LaMay, Dan C. Caldwell |
| 1989 | A Testability Strategy for Silicon Compilers. Frans P. M. Beenker, Rob Dekker, Rudi Stans, Max van der Star |
| 1989 | A Testable Realization of CMOS Combinational Circuits. Sreejit Chakravarty |
| 1989 | A Testing Methodology for New-Generation Specialty Memory Devices. Kenrick Koo, Steve Ramseyer, Al Tejeda |
| 1989 | A Testing Technique to Characterize E^2PROM's Aging and Endurance. Massimo Lanzoni, Piero Olivo, Bruno Riccò |
| 1989 | A Unified Theory for Designing Optimal Test Generation and Diagnosis Algorithms for Board Interconnects. Najmi T. Jarwala, Chi W. Yau |
| 1989 | An Analysis of Tungsten Probes' Effect on Yield in a Production Wafer Probe Environment. Norman Nadeau, Sylvie Perreault |
| 1989 | An Approach to Functional Level Testability Analysis. C. H. Chen, Premachandran R. Menon |
| 1989 | An Easily Computed Functional Level Testability Measure. Kurt H. Thearling, Jacob A. Abraham |
| 1989 | An Integrated Analog Test Simulation Environment. Bruce A. Webster |
| 1989 | An Interactive Sequential Test Pattern Generation System. Rahul Razdan, M. Anwaruddin, Predrag G. Kovijanic, R. Ganesh, H.-C. Shih |
| 1989 | An Optimal Test Sequence for the JTAG/IEEE P1149.1 Test Access Port Controller. Anton T. Dahbura, M. Ümit Uyar, Chi W. Yau |
| 1989 | Automating ASIC Design-for-Testability: The VLSI Test Assistant. Arif Samad, Martin Bell |
| 1989 | Board-Level Boundary-Scan: Regaining Observability with an Additional IC. W. David Ballew, Lauren M. Streb |
| 1989 | Built-In Self-Test of the Macrolan Chip. Richard Illman, Stephen Clarke |
| 1989 | CAE Functionality for Verification of Diagnostic Programs. Carol Pyron, Rex Sallade |
| 1989 | CMOS Design for Improved IC Testability. Michele Favalli, Piero Olivo, Maurizio Damiani, Bruno Riccò |
| 1989 | CMOS IC Stuck-Open Fault Electrical Effects and Design Considerations. Jerry M. Soden, R. Keith Treece, Michael R. Taylor, Charles F. Hawkins |
| 1989 | Calculating the Effects of Linear Dependencies in m-Sequences Used as Test Stimuli. Paul H. Bardell |
| 1989 | Cell-Based Test Design Method. Kazuhiro Sakashita, Takeshi Hashizume, Takashi Ohya, Isao Takimoto, Shuichi Kato |
| 1989 | Characterization of High-Speed (Above 50 MHz) Devices Using Advance ATE-Techniques, Results and Device Problems. Steve Barton |
| 1989 | Clock Signal Distribution Network for High-Speed Testers. Ching-Wen Hsue |
| 1989 | Composite Electro-Optical Testing of Surface-Mount Device Boards-One Manufacturer's Experience. Frank J. Langley, Ronald R. Boatright, Laurence Crosby |
| 1989 | Computation of Delay Defect and Delay Fault Probabilities Using a Statistical Timing Simulator. Jacques Benkoski, Andrzej J. Strojwas |
| 1989 | Cost Analysis of Test Method Environments. Chryssa Dislis, I. D. Dear, J. R. Miles, S. C. Lau, Anthony P. Ambler |
| 1989 | Cost Impacts of Automatic Test Equipment Purchase Decisions. J. Stephen Pabst |
| 1989 | Coupling Coefficients for Signal Lines Separated by Ground Lines on PC Boards. J. R. Birchak, H. K. Haill |
| 1989 | CrossCheck: A Practical Solution for ASIC Testability. George Swan, Yatin Trivedi, David J. Wharton |
| 1989 | Custom Pin Electronics for VLSI Automatic Test Equipment. Stephen W. Bryson |
| 1989 | Data Verification: A Prerequisite for Heuristic Diagnostics. David Grabel |
| 1989 | Delay Test Generation for Synchronous Sequential Circuits. Srinivas Devadas |
| 1989 | Design Assurance in a University Setting. Kenneth Rose |
| 1989 | Design and Test in the Universities. Sami A. Al-Arian |
| 1989 | Design for Test of Mbit DRAMs. Rainer Kraus, Oskar Kowarik, Kurt Hoffmann, Dieter Oberle |
| 1989 | Design for Testability and Test Generation for Static Redundancy System Level Fault-Tolerant Circuits. Charles E. Stroud, Ahmed E. Barbour |
| 1989 | Design of a BIST RAM with Row/Column Pattern Sensitive Fault Detection Capability. Manoj Franklin, Kewal K. Saluja, Kozo Kinoshita |
| 1989 | Design-for-Testability Using Test Design Yield and Decision Theory. Bozena Kaminska, Yvon Savaria |
| 1989 | DesignTest^TM: A Solution to the Problems of ASIC Verification. Don Allingham, Pat Bashford, Mike Peters, Dean Vendl |
| 1989 | Diagnostics Based on Fault Signature. John C. Chan, Baxter F. Womack |
| 1989 | Efficient Generation of Test Patterns Using Boolean Difference. Tracy Larrabee |
| 1989 | Engineering Curricula for "Meeting the Tests of Time". Richard Absher, J. E. (Ned) Lecky |
| 1989 | Enhanced Delay Test Generator for High-Speed Logic LSIs. Kazumi Hatayama, Mitsuji Ikeda, Terumine Hayashi, Masahiro Takakura, Kuniaki Kishida, Shun Ishiyama |
| 1989 | Essential: An Efficient Self-Learning Test Pattern Generation Algorithm for Sequential Circuits. Michael H. Schulz, Elisabeth Auth |
| 1989 | FANTESTIC: Towards a Powerful Fault Analysis and Test Pattern Generator for Integrated Circuits. Marcel Jacomet |
| 1989 | Fast Accurate and Complete ADC Testing. Solomon Max |
| 1989 | Fast Automatic Failbit Analysis for DRAMs. W. Malzfeldt, W. Mohr, H.-D. Oberle, K. Kodalle |
| 1989 | Fault Diagnosis in Analogue Circuits Using AI Techniques. Alice McKeon, Antony Wakeling |
| 1989 | Fault Location in Repairable Programmable Logic Arrays. Chin-Long Wey |
| 1989 | Fault Partitioning Issues in an Integrated Parallel Test Generation/Fault Simulation Environment. Srinivas Patil, Prithviraj Banerjee |
| 1989 | Fault Simulation in a Pipelined Multiprocessor System. Prathima Agrawal, Vishwani D. Agrawal, Kwang-Ting Cheng, Raffi Tutundjian |
| 1989 | Flexible, High-Performance Pin Electronics Implementation. Phillip N. King |
| 1989 | Functional Testing of Circuits and SMD Boards with Limited Nodal Access. Kenneth R. Chin |
| 1989 | Hardware-Based Weighted Random Pattern Generation for Boundary Scan. Franc Brglez, Gershon Kedem, Clay Gloster |
| 1989 | Hierarchical Test Pattern Generation Based on High-Level Primitives. Thomas M. Sarfert, Remo G. Markgraf, Erwin Trischler, Michael H. Schulz |
| 1989 | High Performance Electron Beam Tester for Voltage Measurement on Unpassivated and Passivated Devices. Yasuo Tokunaga, Jürgen Frosien |
| 1989 | High-Resolution Analog Measurement on Mixed-Signal LSI Tester. Kohei Akiyama, Hiroshi Nishimura, Kyoji Anazawa, Akito Kishida, Nobuyuki Kasuga |
| 1989 | IC Characteristic Matching for Optimal System Performance. Kenneth R. Stuchlik |
| 1989 | Implementation and Evaluation of Microinstruction-Controlled Self Test Using a Masked Microinstruction Scheme. Yasuyuki Nozuyama, Akira Nishimura, Jun Iwamura |
| 1989 | Improved System Design Through Proper Nesting of Test Levels. J. Patterson |
| 1989 | Issues for Mixed-Signal CAD-Tester Interface. Eric Rosenfeld |
| 1989 | Location and Identification for Single and Multiple Faults in Testable Redundant PLAs for Yield Enhancement. Yinan N. Shen, Fabrizio Lombardi |
| 1989 | Low Cost Testing of High Density Logic Components. Robert W. Bassett, Barry J. Butkus, Stephen L. Dingle, Marc R. Faucher, Pamela S. Gillis, Jeannie H. Panner, John G. Petrovick, Donald L. Wheater |
| 1989 | Main Frame Diagnosis Support System. Yoichi Tsubuku, Takao Nishida, Hiroshi Shiga, Ken Ohga, Hirohisa Nishine, Mamoru Kaneko |
| 1989 | Mainstream ATE: To Reduce LSI and VLSI Test Cost. Michael W. Salter, Kemon P. Taschioglou |
| 1989 | Methods of Test Waveform Synthesis for High-Speed Data Communication Devices. Kenneth Lanier |
| 1989 | Mixed-Mode Simulation for Time-Domain Fault Analysis. Thomas H. Morrin |
| 1989 | On the Design and Test of Asynchronous Macros Embedded in Synchronous Systems. Jens Leenstra, Lambert Spaanenburg |
| 1989 | On the Design of Multiple-Input Shift-Registers for Signature Analysis Testing. Piero Olivo, Maurizio Damiani, Bruno Riccò |
| 1989 | Optimized Synthesis of Dedicated Controllers with Concurrent Checking Capabilities. Régis Leveugle, Gabriele Saucier |
| 1989 | Practical Test Strategies for Users of 100 PPM ICs. James Westover |
| 1989 | Proceedings International Test Conference 1989, Washington, D.C., USA, August 1989 |
| 1989 | Process Monitoring Oriented IC Testing. Wojciech Maly, Samir B. Naik |
| 1989 | Prototype Testing Simplified by Scannable Buffers and Latches. Andy Halliday, Greg Young, Alfred L. Crouch |
| 1989 | Qualification and Quantification of Process-Induced Product-Related Defects. F. Camerik, P. A. J. Dirks, Jochen A. G. Jess |
| 1989 | Quality Issues of High Pin Count Fine Pitch VLSI Packages. Eugene R. Hnatek, Billy R. Livesay |
| 1989 | R96MFX Test Strategy. William R. Mann |
| 1989 | Rapid Data Acquisition for E-Beam Testing. D. J. Hall, Anthony W. Sloman, G. S. Plows |
| 1989 | Reconfigurable Resource Architecture Improves VLSI Tester Utilization. Sheila O'Keefe |
| 1989 | Redundancies and Don't Cares in Sequential Logic Synthesis. Srinivas Devadas, Hi-Keung Tony Ma, A. Richard Newton |
| 1989 | SASPL: A Test Program Productivity Analysis Tool. Eric Paradis, David Stannard |
| 1989 | Search Strategy Switching: An Alternative to Increased Backtracking. Hyoung B. Min, William A. Rogers |
| 1989 | Symbolic Test Generation for Hierarchically Modeled Digital Systems. P. N. Anirudhan, Premachandran R. Menon |
| 1989 | Synthesis of Pseudo-Random Pattern Testable Designs. Daniel Brand, Vijay S. Iyengar |
| 1989 | TSG: A Test System Generator for Debugging and Regression Test of High-Level Behavioral Synthesis Tools. Rolf Ernst, S. Sutarwala, J.-Y. Jou |
| 1989 | Techniques for Improved Testability in the IBM ES/9370 System. Robert F. Lusch, Endre F. Sarkany |
| 1989 | Test Effectiveness Metrics and CMOS Faults. Scott F. Midkiff, Wern-Yan Koe |
| 1989 | Test Set Embedding in a Built-In Self-Test Environment. Sheldon B. Akers, Winston Jansz |
| 1989 | Testability Analysis of Synchronous Sequential Circuits Based on Structural Data. Raghu V. Hudli, Sharad C. Seth |
| 1989 | Testability Expertise and Test Planning from High-Level Specifications. Michel Crastes de Paulet, Margot Karam, Gabriele Saucier |
| 1989 | Testability Features of the MC68332 Modular Microcontroller. Wallace Harwood, Mark McDermott |
| 1989 | Testing Conventional Logic and Memory Clusters Using Boundary Scan Devices as Virtual ATE Channels. Peter Hansen |
| 1989 | Testing for Coupled Cells in Random-Access Memories. Jacob Savir, William H. McAnney, Salvatore R. Vecchio |
| 1989 | Testing of Glue Logic Interconnects Using Boundary Scan Architecture. Abu S. M. Hassan, Vinod K. Agarwal, Janusz Rajski, Benoit Nadeau-Dostie |
| 1989 | The Analysis of Parallel BIST by the Combined Markov Chain (CMC) Model. C. C. Chuang, Anup K. Gupta |
| 1989 | The Economics of Scan Design. Marc E. Levitt, Jacob A. Abraham |
| 1989 | The Linear Array Systolic Tester (LAST). Gary J. Lesmeister |
| 1989 | The Omnitest System: A No-Generate, No-Compile, Interactive Test Methodology. Wayne D. Dettloff, Melodie D. Tebbs |
| 1989 | The Parallel-Test-Detect Fault Simulation Algorithm. Bill Underwood, Jack Ferguson |
| 1989 | The Pseudo-Exhaustive Test of Sequential Circuits. Sybille Hellebrand, Hans-Joachim Wunderlich |
| 1989 | The Push for Test in Universities. Donald W. Bouldin |
| 1989 | The Role of Test in a "Continuous Improvement" Environment. Ron Santella |
| 1989 | Topological Testing. Miroslaw Malek, Antoine N. Mourad, Mihir Pandya |
| 1989 | Tradeoff Decisions Made for P11149.1 Controller Design. Sue Vining |
| 1989 | Transmission Line Simulation for Testing ISDN Devices. David K. Oka |
| 1989 | VLSI Package Reliability Risk Due to Accelerated Environmental Testing. David Haupert, Fu-Gin Chen, David Lee |
| 1989 | Writing Correct and Usable Specifications for Board Test: A Case Study. Barry A. Alcorn |