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80 papers

YearTitle / Authors
20083-tier dynamically adaptive power-aware motion estimator for h.264/AVC video encoding.
Muhammad Shafique, Lars Bauer, Jörg Henkel
2008A 1-V piecewise curvature-corrected CMOS bandgap reference.
Jing-Hu Li, Yu-nan Fu, Yong-sheng Wang
2008A 1.8/2.4-ghz dualband cmos low noise amplifier using miller capacitance tuning.
Depak Balemarthy, Roy Paily
2008A framework for energy consumption based design space exploration for wireless sensor nodes.
Sonali Chouhan, M. Balakrishnan, Ranjan Bose
2008A low power layered decoding architecture for LDPC decoder implementation for IEEE 802.11n LDPC codes.
Jie Jin, Chi-Ying Tsui
2008A mathematical solution to power optimal pipeline design by utilizing soft edge flip-flops.
Mohammad Ghasemazar, Behnam Amelifard, Massoud Pedram
2008A multi-story power delivery technique for 3D integrated circuits.
Pulkit Jain, Tony Tae-Hyoung Kim, John Keane, Chris H. Kim
2008A parallel and randomized algorithm for large-scale discrete dual-Vt assignment and continuous gate sizing.
Tai-Hsuan Wu, Lin Xie, Azadeh Davoodi
2008A physical level study and optimization of CAM-based checkpointed register alias table.
Elham Safi, Andreas Moshovos, Andreas G. Veneris
2008A probabilistic technique for full-chip leakage estimation.
Shaobo Liu, Qinru Qiu, Qing Wu
2008A secure and low-energy logic style using charge recovery approach.
Mehrdad Khatir, Amir Moradi, Alireza Ejlali, Mohammad T. Manzuri Shalmani, Mahmoud Salmasizadeh
2008A tutorial on test power.
Vishwani D. Agrawal
2008Advances in low power verification.
Janick Bergeron
2008An expected-utility based approach to variation aware VLSI optimization under scarce information.
Upavan Gupta, Nagarajan Ranganathan
2008Analytical results for design space exploration of multi-core processors employing thread migration.
Ravishankar Rao, Sarma B. K. Vrudhula, Krzysztof S. Berezowski
2008Analyzing static and dynamic write margin for nanometer SRAMs.
Jiajing Wang, Satyanand Nalam, Benton H. Calhoun
2008Bus encoding for simultaneous delay and energy optimization.
Jingyi Zhang, Qing Wu, Qinru Qiu
2008Caching for bursts (C-Burst): let hard disks sleep well and work energetically.
Feng Chen, Xiaodong Zhang
2008Clock gating for power optimization in ASIC design cycle theory & practice.
Sukumar Jairam, Madhusudan Rao, Jithendra Srinivas, Parimala Vishwanath, H. Udayakumar, Jagdish C. Rao
2008Correlation verification between transistor variability model with body biasing and ring oscillation frequency in 90nm subthreshold circuits.
Hiroshi Fuketa, Masanori Hashimoto, Yukio Mitsuyama, Takao Onoye
2008Design of dual threshold voltages asynchronous circuits.
Behnam Ghavami, Hossein Pedram
2008Design of low-power short-distance opto-electronic transceiver front-ends with scalable supply voltages and frequencies.
Xuning Chen, Gu-Yeon Wei, Li-Shiuan Peh
2008Dynamic virtual ground voltage estimation for power gating.
Hao Xu, Ranga Vemuri, Wen-Ben Jone
2008Energy conservation by adaptive feature loading for mobile content-based image retrieval.
Karthik Kumar, Yamini Nimmagadda, Yu-Ju Hong, Yung-Hsiang Lu
2008Energy harvesting photodiodes with integrated 2D diffractive storage capacitance.
Nathaniel J. Guilar, Erin G. Fong, Travis Kleeburg, Diego R. Yankelevich, Rajeevan Amirtharajah
2008Energy-efficient MESI cache coherence with pro-active snoop filtering for multicore microprocessors.
Avadh Patel, Kanad Ghose
2008Enhancing
Dong Jiao, Jie Gu, Pulkit Jain, Chris H. Kim
2008Enhancing energy efficiency of processor-based embedded systems through post-fabrication ISA extension.
Hamid Noori, Farhad Mehdipour, Koji Inoue, Kazuaki J. Murakami
2008Entry control in network-on-chip for memory power reduction.
Dongwook Lee, Sungjoo Yoo, Kiyoung Choi
2008Error-resilient low-power Viterbi decoders.
Rami A. Abdallah, Naresh R. Shanbhag
2008Expected system energy consumption minimization in leakage-aware DVS systems.
Jian-Jia Chen, Lothar Thiele
2008Extending the lifetime of media recorders constrained by battery and flash memory size.
Younghyun Kim, Youngjin Cho, Naehyuck Chang, Chaitali Chakrabarti, Nam Ik Cho
2008Frequency planning for multi-core processors under thermal constraints.
Michael Kadin, Sherief Reda
2008Full-system chip multiprocessor power evaluations using FPGA-based emulation.
Abhishek Bhattacharjee, Gilberto Contreras, Margaret Martonosi
2008Hybrid dynamic thermal management based on statistical characteristics of multimedia applications.
Inchoon Yeo, Eun Jung Kim
2008Impact of dynamic voltage and frequency scaling on the architectural vulnerability of GALS architectures.
Niranjan Soundararajan, Narayanan Vijaykrishnan, Anand Sivasubramaniam
2008Increasing minimum operating voltage (V
Taro Niiyama, Piao Zhe, Koichi Ishida, Masami Murakata, Makoto Takamiya, Takayasu Sakurai
2008Innovations to extend CMOS nano-transistors to the limit.
Tahir Ghani
2008Instruction-driven clock scheduling with glitch mitigation.
Gu-Yeon Wei, David M. Brooks, Ali Durlov Khan, Xiaoyao Liang
2008Lazy instruction scheduling: keeping performance, reducing power.
Ali Mahjur, Mahmud Taghizadeh, Amir-Hossein Jahangir
2008Low power chips: a fabless asic perspective.
Shashank Bhonge, Vamsi Boppana
2008Low power current mode receiver with inductive input impedance.
Marshnil Vipin Dave, Maryam Shojaei Baghini, Dinesh Kumar Sharma
2008Low power design under parameter variations.
Swarup Bhunia, Kaushik Roy
2008Low power high bandwidth amplifier with RC Miller and gain enhanced feedforward compensation.
Shagun Bajoria, Vineet Kumar Singh, Raju Kunde, Chetan D. Parikh
2008Low-power high-accuracy timing systems for efficient duty cycling.
Thomas Schmid, Jonathan Friedman, Zainul Charbiwala, Young H. Cho, Mani B. Srivastava
2008Multiple power-gating domain (multi-VGND) architecture for improved leakage power reduction.
Ashoka Visweswara Sathanur, Luca Benini, Alberto Macii, Enrico Macii, Massimo Poncino
2008Next-generation power-aware design.
Takayasu Sakurai
2008Noninvasive leakage power tomography of integrated circuits by compressive sensing.
Davood Shamsi, Petros Boufounos, Farinaz Koushanfar
2008O
Swaroop Ghosh, Jung Hwan Choi, Patrick Ndai, Kaushik Roy
2008On leakage currents: sources and reduction for transistors, gates, memories and digital systems.
Wolfgang Nebel, Domenik Helms
2008On the power efficiency of cascode compensation over Miller compensation in two-stage operational amplifiers.
Hamed Aminzadeh, Khalil Mafinezhad
2008On the rules of low-power design (and how to break them).
Todd M. Austin
2008Optimal power and noise allocation for analog and digital sections of a low power radio receiver.
Kannan Aryaperumal Sankaragomathi, Manodipan Sahoo, Satyam Dwivedi, Bharadwaj S. Amrutur, Navakanta Bhat
2008Optimal technology selection for minimizing energy and variability in low voltage applications.
Mingoo Seok, Dennis Sylvester, David T. Blaauw
2008Penalty for power reduction -: performance or schedule or yield?
Bodhisatya Sarker, Jaswinder Ahuja, Arijit Dutta, Srinath D., Kaip Sridhar, Radhakrishnan Nair, Jayant Lahiri
2008Post-silicon programmed body-biasing platform suppressing device variability in 45 nm CMOS technology.
Hiroaki Suzuki, Masanori Kurimoto, Tadao Yamanaka, Hidehiro Takata, Hiroshi Makino, Hirofumi Shinohara
2008Power delivery for high performance microprocessors.
Srikanth Balasubramanian
2008Power management from cores to datacenters: where are we going to get the next ten-fold improvements?
Parthasarathy Ranganathan
2008Power management solutions for computer systems and datacenters.
Karthick Rajamani, Charles Lefurgy, Soraya Ghiasi, Juan Rubio, Heather Hanson, Tom W. Keller
2008Power reduction in on-chip interconnection network by serialization.
Arvind Madan, Bharadwaj Amrutur
2008Power-efficient clustering via incomplete bypassing.
Eric P. Villasenor, Daeho Seo, Mithuna Thottethodi
2008Power-gating-aware high-level synthesis.
Eunjoo Choi, Changsik Shin, Taewhan Kim, Youngsoo Shin
2008PowerAntz: distributed power sharing strategy for network on chip.
Suman Kalyan Mandal, Rabi N. Mahapatra
2008Proactive temperature management in MPSoCs.
Ayse Kivilcim Coskun, Tajana Simunic Rosing, Kenny C. Gross
2008Proceedings of the 2008 International Symposium on Low Power Electronics and Design, 2008, Bangalore, India, August 11-13, 2008
Vijaykrishnan Narayanan, C. P. Ravikumar, Jörg Henkel, Ali Keshavarzi, Vojin G. Oklobdzija, Barry M. Pangrle
2008Reducing leakage power by accounting for temperature inversion dependence in dual-Vt synthesized circuits.
Andrea Calimera, R. Iris Bahar, Enrico Macii, Massimo Poncino
2008Reducing wakeup latency and energy of MTCMOS circuits via keeper insertion.
Charbel J. Akl, Magdy A. Bayoumi
2008Reliability-centric gate sizing with simultaneous optimization of soft error rate, delay and power.
Koustav Bhattacharya, Nagarajan Ranganathan
2008Row/column redundancy to reduce SRAM leakage in presence of random within-die delay variation.
Maziar Goudarzi, Tohru Ishihara
2008SOC designs in the energy conscious era.
Srikanth Jadcherla
2008SRAM methodology for yield and power efficiency: per-element selectable supplies and memory reconfiguration schemes.
Rouwaida Kanj, Rajiv V. Joshi, Zhuo Li, Jente B. Kuang, Hung C. Ngo, Nancy Ying Zhou, Weiping Shi, Sani R. Nassif
2008Simultaneous optimization of battery-aware voltage regulator scheduling with dynamic voltage and frequency scaling.
Youngjin Cho, Younghyun Kim, Yongsoo Joo, Kyungsoo Lee, Naehyuck Chang
2008Single stage static level shifter design for subthreshold to I/O voltage conversion.
Yu-Shiang Lin, Dennis Sylvester
2008System implications of integrated photonics.
Norman P. Jouppi
2008Thermal analysis of 8-T SRAM for nano-scaled technologies.
Mesut Meterelliyoz, Jaydeep P. Kulkarni, Kaushik Roy
2008Thread fusion.
José González, Qiong Cai, Pedro Chaparro, Grigorios Magklis, Ryan N. Rakvic, Antonio González
2008Towards a green electronic world: a collaborative approach.
Jaswinder Ahuja
2008Variability of flip-flop timing at sub-threshold voltages.
Niklas Lotze, Maurits Ortmanns, Yiannos Manoli
2008Variation-aware gate sizing and clustering for post-silicon optimized circuits.
Cheng Zhuo, David T. Blaauw, Dennis Sylvester
2008Word-interleaved cache: an energy efficient data cache architecture.
T. Venkata Kalyan, Madhu Mutyam