ISLPED A

57 papers

YearTitle / Authors
1999A 1.2V, 430MHz, 4dBm power amplifier and a 250muW front-end, using a standard digital CMOS process.
Thierry Melly, Alain-Serge Porret, Christian C. Enz, Maher Kayal, Eric A. Vittoz
1999A completey on-chip voltage regulation technique for low power digital circuits.
L. Richard Carley, Akshay Aggarwal
1999A low energy architecture for fast PN acquisition.
Christopher Deng, Charles Chien
1999A methodology for power efficient partitioning of data-dominated algorithm specifications within performance constraints.
Kostas Masselos, Koen Danckaert, Francky Catthoor, Constantinos E. Goutis, Hugo De Man
1999A shared-bitline SRAM cell architecture for 1-V ultra low-power word-bit configurable macrocells.
Hiroki Morimura, Satoshi Shigematsu, Shinsuke Konaka
1999Algorithm and architecture of a 1V low power hearing instrument DSP.
Finn Müller, Nikolai Bisgaard, John Melanson
1999An architectural solution for the inductive noise problem due to clock-gating.
Mondira Deb Pant, Pankaj Pant, D. Scott Wills, Vivek Tiwari
1999An optimization technique for dual-output domino logic.
Sumant Ramprasad, Ibrahim N. Hajj, Farid N. Najm
1999CMOS front-end LNA-mixer of micropower RF wireless systems.
Razieh Rofougaran, Tsung-Hsien Lin, William J. Kaiser
1999Challenges in clockgating for a low power ASIC methodology.
David Garrett, Mircea R. Stan, Alvar Dean
1999Circuit methods for the integration of low voltage (1.1-1.8V) analog functions on system-on-a-chip IC's in a single-poly CMOS processes.
Vladimir Koifman, Yachin Afek, Joseph Shor
1999Circuit styles and strategies for CMOS VLSI design on SOI.
Fari Assaderaghi
1999Clock distribution using multiple voltages.
Jatuchai Pangjun, Sachin S. Sapatnekar
1999Comparison of class A amplifiers for low-power and low-voltage switched capacitor applications.
Christoph Schwoerer, Dominique Morche, Patrice Senn
1999Conforming inverted data store for low power memory.
You-Sung Chang, Bong-Il Park, Chong-Min Kyung
1999Databus charge recovery: practical considerations.
Benjamin Bishop, Mary Jane Irwin
1999Designing power efficient hypermedia processors.
Chunho Lee, Johnson Kin, Miodrag Potkonjak, William H. Mangione-Smith
1999Differential PLL for wireless applications using differential CMOS LC-VCO and differential charge pump.
Ayman ElSayed, Akbar Ali, Mohamed I. Elmasry
1999Dynamic power estimation using the probabilistic contribution measure (PCM).
HoonSang Jin, Myung-Soo Jang, Jin-Suk Song, Jin-Yong Lee, Taek-Soo Kim, Jeong-Taek Kong
1999Efficient switching activity computation during high-level synthesis of control-dominated designs.
Alessandro Bogliolo, Luca Benini, Bruno Riccò, Giovanni De Micheli
1999Energy efficient data transfer and storage organization for a MAP turbo decoder module.
Curt Schurgers, Francky Catthoor, Marc Engels
1999Energy-efficient design of battery-powered embedded systems.
Tajana Simunic, Luca Benini, Giovanni De Micheli
1999Energy-efficient dynamic circuit design in the presence of crosstalk noise.
Ganesh Balamurugan, Naresh R. Shanbhag
1999Energy-efficient signal processing via algorithmic noise-tolerance.
Rajamohana Hegde, Naresh R. Shanbhag
1999Energy-per-cycle estimation at RTL.
Subodh Gupta, Farid N. Najm
1999Global register allocation for minimizing energy consumption.
Yumin Zhang, Xiaobo Hu, Danny Z. Chen
1999Hysteresis effect in floating-body partially-depleted SOI CMOS domino circuits.
Ruchir Puri, Ching-Te Chuang
1999Instruction fetch energy reduction using loop caches for embedded applications with small tight loops.
Lea Hwang Lee, Bill Moyer, John Arends
1999Inverse polarity techniques for high-speed/low-power multipliers.
Pascal C. H. Meier, Rob A. Rutenbar, L. Richard Carley
1999Low power RF integrated circuits: principles and practice.
Asad A. Abidi, Hooman Darabi
1999Low power synthesis of dual threshold voltage CMOS VLSI circuits.
Vijay Sundararajan, Keshab K. Parhi
1999Lower and upper bounds on the switching activity in scheduled data flow graphs.
Lars Kruse, Eike Schmidt, Gerd Jochens, Wolfgang Nebel
1999Mixed-swing quadrail for low power dual-rail domino logic.
Bharath Ramasubramanian, Herman Schmit, L. Richard Carley
1999Modeling and automating selection of guarding techniques for datapath elements.
William E. Dougherty, Donald E. Thomas
1999Non-stationary effects in trace-driven power analysis.
Radu Marculescu, Diana Marculescu, Massoud Pedram
1999Passive precharge and rippled power logic (PPRPL).
Samuel B. Schaevitz, Christopher Lin
1999Power macro-models for DSP blocks with application to high-level synthesis.
Subodh Gupta, Farid N. Najm
1999Power scalable processing using distributed arithmetic.
Rajeevan Amirtharajah, Thucydides Xanthopoulos, Anantha P. Chandrakasan
1999Proceedings of the 1999 International Symposium on Low Power Electronics and Design, 1999, San Diego, California, USA, August 16-17, 1999
Farid N. Najm, Jason Cong, David T. Blaauw
1999Reducing power consumption of turbo code decoder using adaptive iteration with variable supply voltage.
Oliver Yuk-Hang Leung, Chung-Wai Yue, Chi-Ying Tsui, Roger S. Cheng
1999Reducing power in superscalar processor caches using subbanking, multiple line buffers and bit-line segmentation.
Kanad Ghose, Milind B. Kamble
1999Retractile clock-powered logic.
Nestoras Tzartzanis, William C. Athas
1999Selective instruction compression for memory energy reduction in embedded systems.
Luca Benini, Alberto Macii, Enrico Macii, Massimo Poncino
1999Single-phase source-coupled adiabatic logic.
Suhwan Kim, Marios C. Papaefthymiou
1999Statistically optimized asynchronous barrel shifters for variable length codecs.
Peter A. Beerel, Sangyun Kim, Pei-Chuan Yeh, Kyeounsoo Kim
1999Stochastic modeling of a power-managed system: construction and optimization.
Qinru Qiu, Qing Wu, Massoud Pedram
1999System-level power optimization: techniques and tools.
Luca Benini, Giovanni De Micheli
1999Technology and design challenges for low power and high performance.
Vivek De, Shekhar Borkar
1999Technology scaling behavior of optimum reverse body bias for standby leakage power reduction in CMOS IC's.
Ali Keshavarzi, Siva G. Narendra, Shekhar Borkar, Charles F. Hawkins, Kaushik Roy, Vivek De
1999The design of a low energy FPGA.
George Varghese, Hui Zhang, Jan M. Rabaey
1999The impact of battery capacity and memory bandwidth on CPU speed-setting: a case study.
Thomas L. Martin, Daniel P. Siewiorek
1999Ultra-low power digital subthreshold logic circuits.
Hendrawan Soeleman, Kaushik Roy
1999Using dynamic cache management techniques to reduce energy in a high-performance processor.
Nikolaos Bellas, Ibrahim N. Hajj, Constantine D. Polychronopoulos
1999VIP - an input pattern generator for indentifying critical voltage drop for deep sub-micron designs.
Yi-Min Jiang, Tak K. Young, Kwang-Ting Cheng
1999Variable supply-voltage scheme with 95%-efficiency DC-DC converter for MPEG-4 codec.
Fuyuki Ichiba, Kojiro Suzuki, Shinji Mita, Tadahiro Kuroda, Tohru Furuyama
1999Vibration-to-electric energy conversion.
Scott E. Meninger, José Oscar Mur-Miranda, Rajeevan Amirtharajah, Anantha P. Chandrakasan, Jeffrey H. Lang
1999Way-predicting set-associative cache for high performance and low energy consumption.
Koji Inoue, Tohru Ishihara, Kazuaki J. Murakami