ISCA A*

65 papers

YearTitle / Authors
1992*T: A Multithreaded Massively Parallel Architecture.
Rishiyur S. Nikhil, Gregory M. Papadopoulos, Arvind
1992A Novel Cache Design for Vector Processing.
Qing Yang, Liping Wu Yang
1992A Performance Study of Memory Consistency Models.
Richard N. Zucker, Jean-Loup Baer
1992A Simulation Based Study of TLB Performance.
J. Bradley Chen, Anita Borg, Norman P. Jouppi
1992A Study of I/O System Organizations.
A. L. Narasimha Reddy
1992A class of prefetch schemes for on-chip data caches.
Anujan Varma, Gunjan Sinha
1992A new compiler-directed cache coherence scheme for shared memory multiprocessors with fast and parallel explicit invalidation.
Ahmed Louri, Hongki Sung
1992A partitioned translation lookaside buffer approach to reducing address bandwith.
Matthew K. Farrens, Arvin Park, Rob Fanfelle, Pius Ng, Gary S. Tyson
1992Active Messages: A Mechanism for Integrated Communication and Computation.
Thorsten von Eicken, David E. Culler, Seth Copen Goldstein, Klaus E. Schauser
1992Adjustable Block Size Coherent Caches.
Cezary Dubnicki, Thomas J. LeBlanc
1992Alternative Implementations of Two-Level Adaptive Branch Prediction.
Tse-Yu Yeh, Yale N. Patt
1992An Analysis of Loop Latency in Dataflow Execution.
Walid A. Najjar, William Marcus Miller, A. P. Wim Böhm
1992An Elementary Processor Architecture with Simultaneous Instruction Issuing from Multiple Threads.
Hiroaki Hirata, Kozo Kimura, Satoshi Nagamine, Yoshiyuki Mochizuki, Akio Nishimura, Yoshimori Nakase, Teiji Nishizawa
1992Analysis of multithreaded microprocessors under multiprogramming.
David E. Culler, Michial A. Gunter, James C. Lee
1992Architectural and implementation tradeoffs in the design of multiple-context processors.
James Laudon, Anoop Gupta, Mark Horowitz
1992Architecture of a graphics processor.
Gautam B. Singh
1992Cache Replacement with Dynamic Exclusion.
Scott McFarling
1992Cache write generate for high performance parallel processing.
Craig M. Wittenbrink, Arun K. Somani, C. H. Chen
1992Comparative Performance Evaluation of Cache-Coherent NUMA and COMA Architectures.
Per Stenström, Truman Joe, Anoop Gupta
1992Comparison of Sparing Alternatives for Disk Arrays.
Jai Menon, Dick Mattson
1992Data path issues in a highly concurrent machine.
Augustus K. Uht, Darin B. Johnson
1992Directory-based cache coherency protocol for a ring-connected multiprocessor-array.
Wisam Michael
1992Dynamic Dependency Analysis of Ordinary Programs.
Todd M. Austin, Gurindar S. Sohi
1992Effects of Building Blocks on the Performance of Super-Scalar Architectures.
Edil S. T. Fernandes, Fernando M. B. Barbosa
1992Enhancing boosting with semantic register in a superscalar processor.
Feipei Lai, Meng-Chou Chang
1992Evaluation of the WM Architecture.
William A. Wulf
1992Expanded delta networks for very large parallel computers.
Brian D. Alleyne, Isaac D. Scherson
1992Futurebus+ as an I/O Bus: Profile B.
Barbara P. Aichinger
1992Hiding Memory Latency using Dynamic Scheduling in Shared-Memory Multiprocessors.
Kourosh Gharachorloo, Anoop Gupta, John L. Hennessy
1992Implications of hierarchical N-body methods for multiprocessor architecture.
Jaswinder Pal Singh
1992Improved Multithreading Techniques for Hiding Communication Latency in Multiprocessors.
Bob Boothe, Abhiram G. Ranade
1992Increasing the Number of Strides for Conflict-Free Vector Access.
Mateo Valero, Tomás Lang, José M. Llabería, Montse Peiron, Eduard Ayguadé, Juan J. Navarro
1992Instruction-level Parallelism in Prolog: Analysis and Architectural Support.
Alessandro De Gloria, Paolo Faraboschi
1992Integrated computer architecture development system.
Walter H. Burkhardt, Stefan Rust
1992Interleaved Parallel Schemes: Improving Memory Throughput on Supercomputers.
André Seznec, Jacques Lenfant
1992Lazy Release Consistency for Software Distributed Shared Memory.
Peter J. Keleher, Alan L. Cox, Willy Zwaenepoel
1992Limits of Control Flow on Parallelism.
Monica S. Lam, Robert P. Wilson
1992Low-Latency Message Communication Support for the AP1000.
Toshiyuki Shimizu, Takeshi Horie, Hiroaki Ishihata
1992Memory Latency Effects in Decoupled Architectures With a Single Data Memory Module.
Lizyamma Kurian, Paul T. Hulina, Lee D. Coraor
1992Memory management support for tiled array organization.
Gary Newman
1992Monitoring Program Behaviour on SUPRENUM.
Markus Siegle, Richard Hofmann
1992OPAC: A floating-point coprocessor dedicated to compute-bound kernels.
André Seznec, Karl Courtel
1992Parallel electro-optical rule-based system for fast execution of expert systems.
Ahmed Louri, Jongwhoa Na
1992Performance Evaluation of a Decoded Instruction Cache for Variable Instruction-Length Computers.
Gideon D. Intrater, Ilan Y. Spillinger
1992Performance Optimization of Pipelined Primary Caches.
Kunle Olukotun, Trevor N. Mudge, Richard B. Brown
1992Performance evaluation of disk subsystems.
Ruben Yomtov
1992Performance improvement for vector pipeline multiprocessor systems using a disordered execution model.
M. Tahar Kechadi, Jean-Luc Dekeyser, Philippe Marquet, Philippe Preux
1992Performance of multiple-bus multiprocssor under non-uniform memory reference model.
Mohammed Azhar Sayeed, Mohammed Atiquzzaman
1992Performance of the SCI Ring.
Steven L. Scott, James R. Goodman, Mary K. Vernon
1992Pipelining and bypassing in a VLIW processor.
Arthur Abnous, Nader Bagherzadeh
1992Planar-Adaptive Routing: Low-cost Adaptive Networks for Multiprocessors.
Andrew A. Chien, Jae H. Kim
1992Prefetch unit for vector operations on scalar computers.
Ivan Sklenár
1992Proceedings of the 19th Annual International Symposium on Computer Architecture. Gold Coast, Australia, May 1992
Allan Gottlieb
1992Processor Coupling: Integrating Compile Time and Runtime Scheduling for Parallelism.
Stephen W. Keckler, William J. Dally
1992Revisit the case for direct-mapped chaches: a case for two-way set-associative level-two caches.
Wen-Hann Wang, Jim Quinlan, Konrad Lai
1992Seamless - a latency-tolerant RISC-based multiprocessor architecture.
Samuel A. Fineberg, Thomas L. Casavant, Brent H. Pease
1992Synthesis of application-specific heterogeneous multiprocessor systems.
Shiv Prakash, Alice C. Parker
1992The DASH Prototype: Implementation and Performance.
Daniel Lenoski, James Laudon, Truman Joe, David Nakahira, Luis Stevens, Anoop Gupta, John L. Hennessy
1992The Expandable Split Window Paradigm for Exploiting Fine-Grain Parallelism.
Manoj Franklin, Gurindar S. Sohi
1992The Impact of Communication Locality on Large-Scale Multiprocessor Performance.
Kirk L. Johnson
1992The Turn Model for Adaptive Routing.
Christopher J. Glass, Lionel M. Ni
1992The time-constrained barrier synchronizer and its applications in parallel systems.
Der-Chung Cheng, Kanad Ghose
1992Thread-based Programming for the EM-4 Hybrid Dataflow Machine.
Mitsuhisa Sato, Yuetsu Kodama, Shuichi Sakai, Yoshinori Yamaguchi, Yasuhito Koumura
1992Towards a Shared-Memory Massively Parallel Multiprocessor.
Daniel Litaize, Abdelaziz Mzoughi, Christine Rochange, Pascal Sainrat
1992Tradeoffs in Supporting Two Page Sizes.
Madhusudhan Talluri, Shing I. Kong, Mark D. Hill, David A. Patterson