ISCA A*

58 papers

YearTitle / Authors
201643rd ACM/IEEE Annual International Symposium on Computer Architecture, ISCA 2016, Seoul, South Korea, June 18-22, 2016
2016APRES: Improving Cache Efficiency by Exploiting Load Characteristics on GPUs.
Yunho Oh, Keunsoo Kim, Myung Kuk Yoon, Jong Hyun Park, Yongjun Park, Won Woo Ro, Murali Annavaram
2016ARM Virtualization: Performance and Architectural Implications.
Christoffer Dall, Shih-Wei Li, Jin Tack Lim, Jason Nieh, Georgios Koloventzos
2016ASIC Clouds: Specializing the Datacenter.
Ikuo Magaki, Moein Khazraee, Luis Vega Gutierrez, Michael Bedford Taylor
2016Accelerating Dependent Cache Misses with an Enhanced Memory Controller.
Milad Hashemi, Khubaib, Eiman Ebrahimi, Onur Mutlu, Yale N. Patt
2016Accelerating Markov Random Field Inference Using Molecular Optical Gibbs Sampling Units.
Siyang Wang, Xiangyu Zhang, Yuxuan Li, Ramin Bashizade, Song Yang, Chris Dwyer, Alvin R. Lebeck
2016ActivePointers: A Case for Software Address Translation on GPUs.
Sagi Shahar, Shai Bergman, Mark Silberstein
2016Agile Paging: Exceeding the Best of Nested and Shadow Paging.
Jayneel Gandhi, Mark D. Hill, Michael M. Swift
2016All-Inclusive ECC: Thorough End-to-End Protection for Reliable Computer Memory.
Jungrae Kim, Michael B. Sullivan, Sangkug Lym, Mattan Erez
2016Asymmetry-Aware Work-Stealing Runtimes.
Christopher Torng, Moyang Wang, Christopher Batten
2016Automatic Generation of Efficient Accelerators for Reconfigurable Hardware.
David Koeplinger, Raghu Prabhakar, Yaqi Zhang, Christina Delimitrou, Christos Kozyrakis, Kunle Olukotun
2016Back to the Future: Leveraging Belady's Algorithm for Improved Cache Replacement.
Akanksha Jain, Calvin Lin
2016Base-Victim Compression: An Opportunistic Cache Compression Architecture.
Jayesh Gaur, Alaa R. Alameldeen, Sreenivas Subramoney
2016Biscuit: A Framework for Near-Data Processing of Big Data Workloads.
Boncheol Gu, Andre S. Yoon, Duck-Ho Bae, Insoon Jo, Jinyoung Lee, Jonghyun Yoon, Jeong-Uk Kang, MoonSang Kwon, Chanho Yoon, Sangyeun Cho, Jaeheon Jeong, Duckhyun Chang
2016Bit-Plane Compression: Transforming Data for Better Compression in Many-Core Architectures.
Jungrae Kim, Michael B. Sullivan, Esha Choukse, Mattan Erez
2016Boosting Access Parallelism to PCM-Based Main Memory.
Mohammad Arjomand, Mahmut T. Kandemir, Anand Sivasubramaniam, Chita R. Das
2016CASH: Supporting IaaS Customers with a Sub-core Configurable Architecture.
Yanqi Zhou, Henry Hoffmann, David Wentzlaff
2016Cambricon: An Instruction Set Architecture for Neural Networks.
Shaoli Liu, Zidong Du, Jinhua Tao, Dong Han, Tao Luo, Yuan Xie, Yunji Chen, Tianshi Chen
2016Cnvlutin: Ineffectual-Neuron-Free Deep Neural Network Computing.
Jorge Albericio, Patrick Judd, Tayler H. Hetherington, Tor M. Aamodt, Natalie D. Enright Jerger, Andreas Moshovos
2016DRAF: A Low-Power DRAM-Based Reconfigurable Acceleration Fabric.
Mingyu Gao, Christina Delimitrou, Dimin Niu, Krishna T. Malladi, Hongzhong Zheng, Bob Brennan, Christos Kozyrakis
2016Decoupling Loads for Nano-Instruction Set Computers.
Ziqiang Huang, Andrew D. Hilton, Benjamin C. Lee
2016Dynamo: Facebook's Data Center-Wide Power Management System.
Qiang Wu, Qingyuan Deng, Lakshmi Ganesh, Chang-Hong Hsu, Yun Jin, Sanjeev Kumar, Bin Li, Justin Meza, Yee Jiun Song
2016EIE: Efficient Inference Engine on Compressed Deep Neural Network.
Song Han, Xingyu Liu, Huizi Mao, Jing Pu, Ardavan Pedram, Mark A. Horowitz, William J. Dally
2016Efficient Synonym Filtering and Scalable Delayed Translation for Hybrid Virtual Caching.
Chang Hyun Park, Taekyung Heo, Jaehyuk Huh
2016Efficiently Scaling Out-of-Order Cores for Simultaneous Multithreading.
Faissal M. Sleiman, Thomas F. Wenisch
2016Energy Efficient Architecture for Graph Analytics Accelerators.
Muhammet Mustafa Ozdal, Serif Yesil, TaeMin Kim, Andrey Ayupov, John Greth, Steven M. Burns, Özcan Özturk
2016Energy Efficient Data Encoding in DRAM Channels Exploiting Data Value Similarity.
Hoseok Seol, Wongyu Shin, Jaemin Jang, Jungwhan Choi, Jinwoong Suh, Lee-Sup Kim
2016Evaluation of an Analog Accelerator for Linear Algebra.
Yipeng Huang, Ning Guo, Mingoo Seok, Yannis P. Tsividis, Simha Sethumadhavan
2016Exploiting Dynamic Timing Slack for Energy Efficiency in Ultra-Low-Power Embedded Systems.
Hari Cherupalli, Rakesh Kumar, John Sartori
2016Eyeriss: A Spatial Architecture for Energy-Efficient Dataflow for Convolutional Neural Networks.
Yu-Hsin Chen, Joel S. Emer, Vivienne Sze
2016Future Vector Microprocessor Extensions for Data Aggregations.
Timothy Hayes, Oscar Palomar, Osman S. Unsal, Adrián Cristal, Mateo Valero
2016ISAAC: A Convolutional Neural Network Accelerator with In-Situ Analog Arithmetic in Crossbars.
Ali Shafiee, Anirban Nag, Naveen Muralimanohar, Rajeev Balasubramonian, John Paul Strachan, Miao Hu, R. Stanley Williams, Vivek Srikumar
2016LAP: Loop-Block Aware Inclusion Properties for Energy-Efficient Asymmetric Last Level Caches.
Hsiang-Yun Cheng, Jishen Zhao, Jack Sampson, Mary Jane Irwin, Aamer Jaleel, Yu Lu, Yuan Xie
2016LaPerm: Locality Aware Scheduler for Dynamic Parallelism on GPUs.
Jin Wang, Norm Rubin, Albert Sidelnik, Sudhakar Yalamanchili
2016MITTS: Memory Inter-arrival Time Traffic Shaping.
Yanqi Zhou, David Wentzlaff
2016Mellow Writes: Extending Lifetime in Resistive Memories through Selective Slow Write Backs.
Lunkai Zhang, Brian Neely, Diana Franklin, Dmitri B. Strukov, Yuan Xie, Frederic T. Chong
2016Minerva: Enabling Low-Power, Highly-Accurate Deep Neural Network Accelerators.
Brandon Reagen, Paul N. Whatmough, Robert Adolf, Saketh Rama, Hyunkwang Lee, Sae Kyu Lee, José Miguel Hernández-Lobato, Gu-Yeon Wei, David M. Brooks
2016Morpheus: Creating Application Objects Efficiently for Heterogeneous Computing.
Hung-Wei Tseng, Qianchen Zhao, Yuxiao Zhou, Mark Gahagan, Steven Swanson
2016Neurocube: A Programmable Digital Neuromorphic Architecture with High-Density 3D Memory.
Duckhwan Kim, Jaeha Kung, Sek M. Chai, Sudhakar Yalamanchili, Saibal Mukhopadhyay
2016Opportunistic Competition Overhead Reduction for Expediting Critical Section in NoC Based CMPs.
Yuan Yao, Zhonghai Lu
2016PRIME: A Novel Processing-in-Memory Architecture for Neural Network Computation in ReRAM-Based Main Memory.
Ping Chi, Shuangchen Li, Cong Xu, Tao Zhang, Jishen Zhao, Yongpan Liu, Yu Wang, Yuan Xie
2016Peak Efficiency Aware Scheduling for Highly Energy Proportional Servers.
Daniel Wong
2016Power Attack Defense: Securing Battery-Backed Data Centers.
Chao Li, Zhenhua Wang, Xiaofeng Hou, Haopeng Chen, Xiaoyao Liang, Minyi Guo
2016PowerChop: Identifying and Managing Non-critical Units in Hybrid Processor Architectures.
Michael A. Laurenzano, Yunqi Zhang, Jiang Chen, Lingjia Tang, Jason Mars
2016Production-Run Software Failure Diagnosis via Adaptive Communication Tracking.
Mohammad Mejbah Ul Alam, Abdullah Muzahid
2016RedEye: Analog ConvNet Image Sensor Architecture for Continuous Mobile Vision.
Robert LiKamWa, Yunhui Hou, Yuan Gao, Mia Polansky, Lin Zhong
2016RelaxFault Memory Repair.
Dong-Wan Kim, Mattan Erez
2016Rescuing Uncorrectable Fault Patterns in On-Chip Memories through Error Pattern Transformation.
Henry Duwe, Xun Jian, Daniel Petrisko, Rakesh Kumar
2016Short-Circuit Dispatch: Accelerating Virtual Machine Interpreters on Embedded Processors.
Channoh Kim, Sungmin Kim, Hyeon-Gyu Cho, Doo-young Kim, Jaehyeok Kim, Young H. Oh, Hakbeom Jang, Jae W. Lee
2016Strober: Fast and Accurate Sample-Based Energy Simulation for Arbitrary RTL.
Donggyu Kim, Adam M. Izraelevitz, Christopher Celio, Hokeun Kim, Brian Zimmer, Yunsup Lee, Jonathan Bachrach, Krste Asanovic
2016The Anytime Automaton.
Joshua San Miguel, Natalie D. Enright Jerger
2016Towards Statistical Guarantees in Controlling Quality Tradeoffs for Approximate Acceleration.
Divya Mahajan, Amir Yazdanbakhsh, Jongse Park, Bradley Thwaites, Hadi Esmaeilzadeh
2016Transparent Offloading and Mapping (TOM): Enabling Programmer-Transparent Near-Data Processing in GPU Systems.
Kevin Hsieh, Eiman Ebrahimi, Gwangsun Kim, Niladrish Chatterjee, Mike O'Connor, Nandita Vijaykumar, Onur Mutlu, Stephen W. Keckler
2016Treadmill: Attributing the Source of Tail Latency through Precise Load Testing and Statistical Inference.
Yunqi Zhang, David Meisner, Jason Mars, Lingjia Tang
2016Using Multiple Input, Multiple Output Formal Control to Maximize Resource Efficiency in Architectures.
Raghavendra Pradyumna Pothukuchi, Amin Ansari, Petros G. Voulgaris, Josep Torrellas
2016Virtual Thread: Maximizing Thread-Level Parallelism beyond GPU Scheduling Limit.
Myung Kuk Yoon, Keunsoo Kim, Sangpil Lee, Won Woo Ro, Murali Annavaram
2016Warped-Slicer: Efficient Intra-SM Slicing through Dynamic Resource Partitioning for GPU Multiprogramming.
Qiumin Xu, Hyeran Jeon, Keunsoo Kim, Won Woo Ro, Murali Annavaram
2016XED: Exposing On-Die Error Detection Information for Strong Memory Reliability.
Prashant J. Nair, Vilas Sridharan, Moinuddin K. Qureshi