| 2008 | 35th International Symposium on Computer Architecture (ISCA 2008), June 21-25, 2008, Beijing, China |
| 2008 | 3D-Stacked Memory Architectures for Multi-core Processors. Gabriel H. Loh |
| 2008 | A Comprehensive Memory Modeling Tool and Its Application to the Design and Analysis of Future Memory Hierarchies. Shyamkumar Thoziyoor, Jung Ho Ahn, Matteo Monchiero, Jay B. Brockman, Norman P. Jouppi |
| 2008 | A Proactive Wearout Recovery Approach for Exploiting Microarchitectural Redundancy to Extend Cache SRAM Lifetime. Jeonghee Shin, Victor V. Zyuban, Pradip Bose, Timothy Mark Pinkston |
| 2008 | A Two-Level Load/Store Queue Based on Execution Locality. Miquel Pericàs, Adrián Cristal, Francisco J. Cazorla, Rubén González, Alexander V. Veidenbaum, Daniel A. Jiménez, Mateo Valero |
| 2008 | Achieving Out-of-Order Performance with Almost In-Order Complexity. Francis Tseng, Yale N. Patt |
| 2008 | Atom-Aid: Detecting and Surviving Atomicity Violations. Brandon Lucia, Joseph Devietti, Karin Strauss, Luis Ceze |
| 2008 | Atomic Vector Operations on Chip Multiprocessors. Sanjeev Kumar, Daehyun Kim, Mikhail Smelyanskiy, Yen-Kuang Chen, Jatin Chhugani, Christopher J. Hughes, Changkyu Kim, Victor W. Lee, Anthony D. Nguyen |
| 2008 | Corona: System Implications of Emerging Nanophotonic Technology. Dana Vantrease, Robert Schreiber, Matteo Monchiero, Moray McLaren, Norman P. Jouppi, Marco Fiorentino, Al Davis, Nathan L. Binkert, Raymond G. Beausoleil, Jung Ho Ahn |
| 2008 | Counting Dependence Predictors. Franziska Roesner, Doug Burger, Stephen W. Keckler |
| 2008 | DeLorean: Recording and Deterministically Replaying Shared-Memory Multiprocessor Execution Effciently. Pablo Montesinos, Luis Ceze, Josep Torrellas |
| 2008 | Fetch-Criticality Reduction through Control Independence. Mayank Agarwal, Nitin Navale, Kshitiz Malik, Matthew I. Frank |
| 2008 | Flexible Decoupled Transactional Memory Support. Arrvindh Shriraman, Sandhya Dwarkadas, Michael L. Scott |
| 2008 | Flexible Hardware Acceleration for Instruction-Grain Program Monitoring. Shimin Chen, Michael Kozuch, Theodoros Strigkos, Babak Falsafi, Phillip B. Gibbons, Todd C. Mowry, Vijaya Ramachandran, Olatunji Ruwase, Michael P. Ryan, Evangelos Vlachos |
| 2008 | From Speculation to Security: Practical and Efficient Information Flow Tracking Using Speculative Hardware. Haibo Chen, Xi Wu, Liwei Yuan, Binyu Zang, Pen-Chung Yew, Frederic T. Chong |
| 2008 | Globally-Synchronized Frames for Guaranteed Quality-of-Service in On-Chip Networks. Jae W. Lee, Man Cheuk Ng, Krste Asanovic |
| 2008 | Improving NAND Flash Based Disk Caches. Taeho Kgil, David Roberts, Trevor N. Mudge |
| 2008 | Intra-disk Parallelism: An Idea Whose Time Has Come. Sriram Sankar, Sudhanva Gurumurthi, Mircea R. Stan |
| 2008 | Learning and Leveraging the Relationship between Architecture-Level Measurements and Individual User Satisfaction. Alex Shye, Berkin Özisikyilmaz, Arindam Mallik, Gokhan Memik, Peter A. Dinda, Robert P. Dick, Alok N. Choudhary |
| 2008 | MIRA: A Multi-layered On-Chip Interconnect Router Architecture. Dongkook Park, Soumya Eachempati, Reetuparna Das, Asit K. Mishra, Yuan Xie, Narayanan Vijaykrishnan, Chita R. Das |
| 2008 | Microcoded Architectures for Ion-Tap Quantum Computers. Lucas Kreger-Stickles, Mark Oskin |
| 2008 | Online Estimation of Architectural Vulnerability Factor for Soft Errors. Xiaodong Li, Sarita V. Adve, Pradip Bose, Jude A. Rivers |
| 2008 | Parallelism-Aware Batch Scheduling: Enhancing both Performance and Fairness of Shared DRAM Systems. Onur Mutlu, Thomas Moscibroda |
| 2008 | Polymorphic On-Chip Networks. Martha Mercaldi Kim, John D. Davis, Mark Oskin, Todd M. Austin |
| 2008 | ReVIVaL: A Variation-Tolerant Architecture Using Voltage Interpolation and Variable Latency. Xiaoyao Liang, Gu-Yeon Wei, David M. Brooks |
| 2008 | Rerun: Exploiting Episodes for Lightweight Memory Race Recording. Derek Hower, Mark D. Hill |
| 2008 | Running a Quantum Circuit at the Speed of Data. Nemanja Isailovic, Mark Whitney, Yatish Patel, John Kubiatowicz |
| 2008 | Self-Optimizing Memory Controllers: A Reinforcement Learning Approach. Engin Ipek, Onur Mutlu, José F. Martínez, Rich Caruana |
| 2008 | Software-Controlled Priority Characterization of POWER5 Processor. Carlos Boneti, Francisco J. Cazorla, Roberto Gioiosa, Alper Buyuktosunoglu, Chen-Yong Cher, Mateo Valero |
| 2008 | Technology-Driven, Highly-Scalable Dragonfly Topology. John Kim, William J. Dally, Steve Scott, Dennis Abts |
| 2008 | TokenTM: Efficient Execution of Large Transactions with Hardware Transactional Memory. Jayaram Bobba, Neelam Goyal, Mark D. Hill, Michael M. Swift, David A. Wood |
| 2008 | Trading off Cache Capacity for Reliability to Enable Low Voltage Operation. Chris Wilkerson, Hongliang Gao, Alaa R. Alameldeen, Zeshan Chishti, Muhammad M. Khellah, Shih-Lien Lu |
| 2008 | Understanding and Designing New Server Architectures for Emerging Warehouse-Computing Environments. Kevin T. Lim, Parthasarathy Ranganathan, Jichuan Chang, Chandrakant D. Patel, Trevor N. Mudge, Steven K. Reinhardt |
| 2008 | Using Hardware Memory Protection to Build a High-Performance, Strongly-Atomic Hybrid Transactional Memory. Lee Baugh, Naveen Neelakantam, Craig B. Zilles |
| 2008 | VEAL: Virtualized Execution Accelerator for Loops. Nathan Clark, Amir Hormati, Scott A. Mahlke |
| 2008 | Variation-Aware Application Scheduling and Power Management for Chip Multiprocessors. Radu Teodorescu, Josep Torrellas |
| 2008 | Virtual Circuit Tree Multicasting: A Case for On-Chip Hardware Multicast Support. Natalie D. Enright Jerger, Li-Shiuan Peh, Mikko H. Lipasti |
| 2008 | iDEAL: Inter-router Dual-Function Energy and Area-Efficient Links for Network-on-Chip (NoC) Architectures. Avinash Karanth Kodi, Ashwini Sarathy, Ahmed Louri |