IOLTS C

58 papers

YearTitle / Authors
201622nd IEEE International Symposium on On-Line Testing and Robust System Design, IOLTS 2016, Sant Feliu de Guixols, Spain, July 4-6, 2016
2016A fault-tolerant sequential circuit design for SAFs and PDFs soft errors.
Anzhela Yu. Matrosova, Sergey Ostanin, Irina Kirienko, Ekaterina Nikolaeva
2016A high performance scan flip-flop design for serial and mixed mode scan test.
Satyadev Ahlawat, Jaynarayan T. Tudu, Anzhela Yu. Matrosova, Virendra Singh
2016A hybrid self-diagnosis mechanism with defective nodes locating and attack detection for parallel computing systems.
Lake Bu, Mark G. Karpovsky
2016ACM: Accurate crosstalk modeling to predict channel delay in Network-on-Chips.
Zeinab Mahdavi, Zahra Shirmohammadi, Seyed Ghassem Miremadi
2016Activity profiling: Review of different solutions to develop reliable and performant design.
Florian Cacho, Ahmed Benhassain, Souhir Mhira, Ajith Sivadasan, Vincent Huard, P. Cathelin, Vincent Knopik, Abhishek Jain, C. R. Parthasarathy, Lorena Anghel
2016Advanced double-sampling architectures.
Michael Nicolaidis, Michael G. Dimopoulos
2016An efficient LDPC encoder architecture for space applications.
Dimitris Theodoropoulos, Nektarios Kranitis, Antonis M. Paschalis
2016An odd-even scheme to prevent a packet from being corrupted and dropped in fault tolerant NoCs.
Biswajit Bhowmik, Santosh Biswas, Jatindra Kumar Deka
2016An on-line test solution for addressing interconnect shorts in on-chip networks.
Biswajit Bhowmik, Jatindra Kumar Deka, Santosh Biswas
2016An soft error propagation analysis considering logical masking effect on re-convergent path.
Shuhei Yoshida, Go Matsukawa, Shintaro Izumi, Hiroshi Kawaguchi, Masahiko Yoshimoto
2016Analysis of BTI aging of level shifters.
Jiajing Cai, Basel Halak, Daniele Rossi
2016Analytic models for crossbar read operation.
Adedotun Adeyemo, Xiaohan Yang, Anu Bala, Jimson Mathew, Abusaleh M. Jabir
2016Automatic generation of stimuli for fault diagnosis in IEEE 1687 networks.
Riccardo Cantoro, Mehrdad Montazeri, Matteo Sonza Reorda, Farrokh Ghani Zadegan, Erik Larsson
2016Binary decision diagram to design balanced secure logic styles.
Hyunmin Kim, Seokhie Hong, Bart Preneel, Ingrid Verbauwhede
2016Cache-aware reliability evaluation through LLVM-based analysis and fault injection.
Maha Kooli, Giorgio Di Natale, Alberto Bosio
2016Comparison of RTL fault models for the robustness evaluation of aerospace FPGA devices.
Romain Champon, Vincent Beroulle, Athanasios Papadimitriou, David Hély, Gilles Genévrier, Frédéric Cézilly
2016Concurrent error detection and tolerance in Kalman filters using encoded state and statistical covariance checks.
Sujay Pandey, Suvadeep Banerjee, Abhijit Chatterjee
2016Conditional soft-edge flip-flop for SET mitigation.
Panagiotis Sismanoglou, Dimitris Nikolos
2016Efficient fault tolerant parallel matrix-vector multiplications.
Zhen Gao, Pedro Reviriego, Juan Antonio Maestro
2016Evaluating application-aware soft error effects in digital circuits without fault injections or probabilistic computations.
K. Chibani, Michele Portolan, Régis Leveugle
2016Evaluation of machine learning algorithms for image quality assessment.
Ghislain Takam Tchendjou, Rshdee Alhakim, Emmanuel Simeu, Fritz Lebowsky
2016Feasibility of software-based repair for program memories.
Patryk Skoncej, Felix Mühlbauer, Felix Kubicek, Lukas Schröder, Mario Schölzel
2016Fine-grain analysis of the parameters involved in aging of digital circuits.
Boukary Ouattara, Olivier Héron, Chiara Sandionigi
2016Flexible in-silicon checking of run-time programmable assertions.
Yumin Zhou, Oliver Bringmann, Wolfgang Rosenstiel
2016HLS-based sensitivity-inductive soft error mitigation for satellite communication systems.
Xiang Chen, Wenhui Yang, Ming Zhao, Jing Wang
2016Hardware Trojans classification for gate-level netlists based on machine learning.
Kento Hasegawa, Masaru Oya, Masao Yanagisawa, Nozomu Togawa
2016Hardware enlightening: No where to hide your Hardware Trojans!
Mohammad Saleh Samimi, Ehsan Aerabi, Zahra Kazemi, Mahdi Fazeli, Ahmad Patooghy
2016Hardware-simulation correlation of timing error detection performance of software-based error detection mechanisms.
Yutaka Masuda, Masanori Hashimoto, Takao Onoye
2016Hot-carrier and BTI damage distinction for high performance digital application in 28nm FDSOI and 28nm LP CMOS nodes.
Alain Bravaix, M. Saliva, Florian Cacho, X. Federspiel, Cheikh Ndiaye, Souhir Mhira, Edith Kussener, E. Pauly, Vincent Huard
2016ISA-independent post-silicon validation for the address translation mechanisms of modern microprocessors.
George Papadimitriou, Athanasios Chatzidimitriou, Dimitris Gizopoulos, Ronny Morad
2016Leakage mitigation for low power microcontroller design in 40nm for Internet-of-Things (IoT).
Ajay Kapoor, Nur Engin, Johan Verdaasdonk
2016Modeling RTL fault models behavior to increase the confidence on TSIM-based fault injection.
Jaime Espinosa, Carles Hernández, Jaume Abella
2016NBTI aging evaluation of PUF-based differential architectures.
Mohd Syafiq Mispan, Basel Halak, Mark Zwolinski
2016On the influence of compiler optimizations in the fault tolerance of embedded systems.
Alejandro Serrano-Cases, Jose Isaza-Gonzalez, Sergio Cuenca-Asensi, Antonio Martínez-Álvarez
2016On the robustness of DCT-based compression algorithms for space applications.
Serhiy Avramenko, Matteo Sonza Reorda, Massimo Violante, Görschwin Fey, Jan-Gerd Mess, Robert Schmidt
2016On-line write margin estimator to monitor performance degradation in SRAM cores.
Bartomeu Alorda, Cristian Carmona, Gabriel Torrens, Sebastià A. Bota
2016Online monitoring of NBTI and HCD in beta-multiplier circuits.
Theodor Hillebrand, Maike Taddiken, Konstantin Tscherkaschin, Steffen Paul, Dagmar Peters-Drolshagen
2016Online monitoring of the maximum angle error in AMR sensors.
Andreina Zambrano, Hans G. Kerkhoff
2016Online time interference detection in mixed-criticality applications on multicore architectures using performance counters.
Stefano Esposito, Massimo Violante, Marco Sozzi, Marco Terrone, Massimo Traversone
2016Power-side-channel analysis of carbon nanotube FET based design.
Chandra K. H. Suresh, Bodhisatwa Mazumdar, Sk Subidh Ali, Ozgur Sinanoglu
2016Pushing the limits: How fault tolerance extends the scope of approximate computing.
Hans-Joachim Wunderlich, Claus Braun, Alexander Schöll
2016REMO: Redundant execution with minimum area, power, performance overhead fault tolerant architecture.
Shoba Gopalakrishnan, Virendra Singh
2016RIIF-2: Toward the next generation reliability information interchange format.
Alessandro Savino, Stefano Di Carlo, Alessandro Vallero, Gianfranco Politano, Dimitris Gizopoulos, Adrian Evans
2016Recovery of performance degradation in defective branch target buffers.
Filippos Filippou, Georgios Keramidas, Michail Mavropoulos, Dimitris Nikolos
2016Redesign for untrusted gate-level netlists.
Masaru Oya, Masao Yanagisawa, Nozomu Togawa
2016Resilient random modulo cache memories for probabilistically-analyzable real-time systems.
David Trilla, Carles Hernández, Jaume Abella, Francisco J. Cazorla
2016Reusing logic masking to facilitate path-delay-based hardware Trojan detection.
Arash Nejat, David Hély, Vincent Beroulle
2016Revisiting software-based soft error mitigation techniques via accurate error generation and propagation models.
Mojtaba Ebrahimi, Maryam Rashvand, Firas Kaddachi, Mehdi Baradaran Tahoori, Giorgio Di Natale
2016SET response of a SEL protection switch for 130 and 250 nm CMOS technologies.
Marko S. Andjelkovic, Aleksandar Ilic, Vladimir Petrovic, Miljana Nenadovic, Zoran Stamenkovic, Goran S. Ristic
2016STT-MTJ-based TRNG with on-the-fly temperature/current variation compensation.
Elena-Ioana Vatajelu, Giorgio Di Natale, Paolo Prinetto
2016Scalable FPGA graph model to detect routing faults.
Luca Sterpone, Gianpiero Cabodi, Sebastiano F. Finocchiaro, Carmelo Loiacono, Francesco Savarese, Boyang Du
2016Single-event performance of differential flip-flop designs and hardening implication.
Rongmei Chen, Enxia Zhang, Bharat L. Bhuva
2016Statistical analysis and comparison of 2T and 3T1D e-DRAM minimum energy operation.
Manish Rana, Ramon Canal, Esteve Amat, Antonio Rubio
2016Susceptible workload driven selective fault tolerance using a probabilistic fault model.
Mauricio D. Gutierrez, Vasileios Tenentes, Tom J. Kazmierski
2016Tackling long duration transients in sequential logic.
Erol Koser, Walter Stechele
2016Temperature- and aging-resistant inverter for robust and reliable time to digital circuit designs in a 65nm bulk CMOS process.
Konstantin Tscherkaschin, Theodor Hillebrand, Maike Taddiken, Steffen Paul, Dagmar Peters-Drolshagen
2016Variations-tolerant 9T SRAM circuit with robust and low leakage SLEEP mode.
Hailong Jiao, Yongmin Qiu, Volkan Kursun