IOLTS C

47 papers

YearTitle / Authors
20142014 IEEE 20th International On-Line Testing Symposium, IOLTS 2014, Platja d'Aro, Girona, Spain, July 7-9, 2014
2014A hybrid reliability assessment method and its support of sequential logic modelling.
Samuel N. Pagliarini, Lirida A. B. Naviner, Jean-François Naviner, Dhiraj K. Pradhan
2014A new solution to on-line detection of Control Flow Errors.
Boyang Du, Matteo Sonza Reorda, Luca Sterpone, Luis Parra, Marta Portela-García, Almudena Lindoso, Luis Entrena
2014A noise-tolerant master-slave flip-flop.
Yukiya Miura, Yoshihiro Ohkawa
2014A novel hardware logic encryption technique for thwarting illegal overproduction and Hardware Trojans.
Sophie Dupuis, Papa-Sidi Ba, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre
2014A novel methodology to increase fault tolerance in autonomous FPGA-based systems.
Stefano Di Carlo, Giulio Gambardella, Paolo Prinetto, Daniele Rolfo, Pascal Trotta, Alessandro Vallero
2014A placement strategy for reducing the effects of multiple faults in digital circuits.
Samuel N. Pagliarini, Dhiraj K. Pradhan
2014Aging-aware critical paths in deep submicron.
Phaninder Alladi, Spyros Tragoudas
2014An innovative standard cells remapping method for in-circuit critical parameters monitoring.
Loic Welter, Philippe Dreux, Hassen Aziza, Jean-Michel Portal
2014Area-efficient synthesis of fault-secure NoC switches.
Atefe Dalirsani, Michael A. Kochte, Hans-Joachim Wunderlich
2014Comparative study of defect-tolerant multiplexers for FPGAs.
Arwa Ben Dhia, Mariem Slimani, Lirida A. B. Naviner
2014Cost-efficient of a cluster in a mesh SRAM-based FPGA.
Saif-Ur Rehman, Mounir Benabdenbi, Lorena Anghel
2014Cross-layer early reliability evaluation: Challenges and promises.
Stefano Di Carlo, Alessandro Vallero, Dimitris Gizopoulos, Giorgio Di Natale, Antonio González, Ramon Canal, Riccardo Mariani, M. Pipponzi, Arnaud Grasset, Philippe Bonnot, Frank Reichenbach, Gulzaib Rafiq, Trond Loekstad
2014Customized cell detector for laser-induced-fault detection.
Feng Lu, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre
2014Dependable reconfigurable space systems: Challenges, new trends and case studies.
Antonis M. Paschalis, Harald Michalik, Nektarios Kranitis, Celia López-Ongil, Pedro Reviriego Vasallo
2014Double node charge sharing SEU tolerant latch design.
Katerina Katsarou, Yiorgos Tsiatouhas
2014Early assessment of SEU sensitivity through untestable fault identification.
Luca Cassano, Hipólito Guzmán-Miranda, Miguel A. Aguirre
2014Effect of ionizing radiation on TRNGs for safe telecommunications: Robustness and randomness.
Honorio Martín, Anna Vaskova, Celia López-Ongil, Enrique San Millán, Marta Portela-García
2014Error masking with approximate logic circuits using dynamic probability estimations.
Antonio Sanchez-Clemente, Luis Entrena, Mario García-Valderas
2014Exploiting a fast and simple ECC for scaling supply voltage in level-1 caches.
Gulay Yalcin, Emrah Islek, Oyku Tozlu, Pedro Reviriego, Adrián Cristal, Osman S. Unsal, Oguz Ergin
2014FF-DICE: An 8T soft-error tolerant cell using Independent Dual Gate SOI FinFETs.
Nicholas Axelos, Nikolaos Eftaxiopoulos-Sarris, Georgios Zervakis, Kostas Tsoumanis, Kiamal Z. Pekmestzi
2014Fault injection and fault handling: An MPSoC demonstrator using IEEE P1687.
Kim Petersén, Dimitar Nikolov, Urban Ingelsson, Gunnar Carlsson, Farrokh Ghani Zadegan, Erik Larsson
2014Fault injection in GPGPU cores to validate and debug robust parallel applications.
M. De Carvalho, Davide Sabena, Matteo Sonza Reorda, Luca Sterpone, Paolo Rech, Luigi Carro
2014Flip-flop selection for in-situ slack-time monitoring based on the activation probability of timing-critical paths.
Sébastien Sarrazin, Samuel Evain, Ivan Miro Panades, Lirida Alves de Barros Naviner, Valentin Gherman
2014Framework for economical error recovery in embedded cores.
Gaurang Upasani, Xavier Vera, Antonio González
2014From an analytic NBTI device model to reliability assessment of complex digital circuits.
Nasim Pour Aryan, A. Listl, Leonhard Heiß, Cenk Yilmaz, Georg Georgakos, Doris Schmitt-Landsiedel
2014Improved circuitry for soft error correction in combinational logic in pipelined designs.
Milos Krstic, Stefan Weidling, Vladimir Petrovic, Michael Gössel
2014Improving the significance of probabilistic circuit fault emulations.
David May, Walter Stechele
2014Managing SER costs of complex systems through Linear Programming.
Dan Alexandrescu, Nematollah Bidokhti, Andy Yu, Adrian Evans, Enrico Costenaro
2014Modified DEC BCH codes for parallel correction of 3-bit errors comprising a pair of adjacent errors.
Christian Badack, Thomas Kern, Michael Gössel
2014Multi-abstraction level signature generation and comparison based on radiation single event upset.
Christelle Hobeika, Simon Pichette, M. A. Leonard, Claude Thibeault, Jean-François Boland, Yves Audet
2014Multivariate outlier modeling for capturing customer returns - How simple it can be.
Jeff Tikkanen, Nik Sumikawa, Li-C. Wang, Magdy S. Abadir
2014New approaches for synthesis of redundant combinatorial logic for selective fault tolerance.
Hao Xie, Li Chen, Rui Liu, Adrian Evans, Dan Alexandrescu, Shi-Jie Wen, Rick Wong
2014Novel self-test methods to reduce on-chip memory requirements and improved test coverage.
Prakash Narayanan, Satish Ravichandran, Balaji Ramayanam
2014Online error detection and recovery in dataflow execution.
Tiago A. O. Alves, Sandip Kundu, Leandro A. J. Marzulo, Felipe Maia Galvão França
2014Permanent faults on LIN networks: On-line test generation.
Anna Vaskova, Marta Portela-García, Mario García-Valderas, Celia López-Ongil, Matteo Sonza Reorda
2014Power-aware optimization of software-based self-test for L1 caches in microprocessors.
George Theodorou, Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos
2014Pre-bond testing of weak defects in TSVs.
Daniel Arumí, Rosa Rodríguez-Montañés, Joan Figueras
2014Precise fault-injections using voltage and temperature manipulation for differential cryptanalysis.
Raghavan Kumar, Philipp Jovanovic, Ilia Polian
2014Preliminary results of SEU fault-injection on multicore processors in AMP mode.
Vanessa Vargas, Pablo Ramos, Wassim Mansour, Raoul Velazco, Nacer-Eddine Zergainoh, Jean-François Méhaut
2014Real-time transient error and induced noise cancellation in linear analog filters using learning-assisted adaptive analog checksums.
Álvaro Gómez-Pau, Suvadeep Banerjee, Abhijit Chatterjee
2014Solutions for the self-adaptation of communicating systems in operation.
Martin Andraud, Anthony Deluthault, Mouhamadou Dieng, Florence Azaïs, Serge Bernard, Philippe Cauvet, Mariane Comte, Thibault Kervaon, Vincent Kerzerho, Salvador Mir, Paul-Henri Pugliesi-Conti, Michel Renovell, Fabien Soulier, Emmanuel Simeu, Haralampos-G. D. Stratigopoulos
2014Timing for virtual TMR in logic circuits.
Sebastian Müller, Tobias Koal, Mario Schölzel, Heinrich Theodor Vierhaus
2014Towards low-cost fault detection strategy of FPGA configuration memory in real-time systems.
Michael Frischke, Andreas J. Rohatschek, Walter Stechele
2014Two complementary approaches for studying the effects of SEUs on HDL-based designs.
Wassim Mansour, Miguel A. Aguirre, Hipólito Guzmán-Miranda, Javier Barrientos Rojas, Raoul Velazco
2014Validation of a tool for estimating the effects of soft-errors on modern SRAM-based FPGAs.
Marco Desogus, Luca Sterpone, David Merodio Codinachs
2014Versatile architecture-level fault injection framework for reliability evaluation: A first report.
Nikos Foutris, Manolis Kaliorakis, Sotiris Tselonis, Dimitris Gizopoulos