| 2011 | 17th IEEE International On-Line Testing Symposium (IOLTS 2011), 13-15 July, 2011, Athens, Greece |
| 2011 | A BIST scheme for testing and repair of multi-mode power switches. Zhaobo Zhang, Xrysovalantis Kavousianos, Yiorgos Tsiatouhas, Krishnendu Chakrabarty |
| 2011 | A comprehensive soft error analysis methodology for SoCs/ASICs memory instances. Dan Alexandrescu |
| 2011 | A multi-objective optimization for memory BIST sharing using a genetic algorithm. Lilia Zaourar, Yann Kieffer, Arnaud Wenzel |
| 2011 | A new IP core for fast error detection and fault tolerance in COTS-based solid state mass memories. Enrico Costenaro, Massimo Violante, Dan Alexandrescu |
| 2011 | A novel radiation tolerant SRAM design based on synergetic functional component separation for nanoscale CMOS. Yuriy Shiyanovskii, Aravind Rajendran, Christos A. Papachristou |
| 2011 | A reliable fault classifier for dependable systems on SRAM-based FPGAs. Cristiana Bolchini, Chiara Sandionigi, Luca Fossati, David Merodio Codinachs |
| 2011 | A robust algorithm for pessimistic analysis of logic masking effects in combinational circuits. Taiga Takata, Yusuke Matsunaga |
| 2011 | A side channel attack countermeasure using system-on-chip power profile scrambling. Armin Krieg, Johannes Grinschgl, Christian Steger, Reinhold Weiss, Josef Haid |
| 2011 | A verification strategy for fault-detection and fault-tolerance circuits. Gabriele Boschi, Riccardo Mariani, Stefano Lorenzini |
| 2011 | AKARI-X: A pseudorandom number generator for secure lightweight systems. Honorio Martín, Enrique San Millán, Luis Entrena, Julio César Hernández Castro, Pedro Peris-Lopez |
| 2011 | Accelerating secure circuit design with hardware implementation of Diehard Battery of tests of randomness. Anna Vaskova, Celia López-Ongil, Enrique San Millán, Alejandro Jiménez-Horas, Luis Entrena |
| 2011 | Algebraic manipulation detection codes and their applications for design of secure cryptographic devices. Zhen Wang, Mark G. Karpovsky |
| 2011 | An FPGA-based framework for run-time injection and analysis of soft errors in microprocessors. Matthias Sauer, Victor Tomashevich, Jörg Müller, Matthew Lewis, Andreas Spilla, Ilia Polian, Bernd Becker, Wolfram Burgard |
| 2011 | An analytical model for the calculation of the Expected Miss Ratio in faulty caches. Daniel Sánchez, Yiannakis Sazeides, Juan L. Aragón, José M. García |
| 2011 | An approach to reduce computational cost in combinatorial logic netlist reliability analysis using circuit clustering and conditional probabilities. Josep Torras Flaquer, Jean-Marc Daveau, Lirida A. B. Naviner, Philippe Roche |
| 2011 | An effective methodology for on-line testing of embedded microprocessors. Paolo Bernardi, Lyl M. Ciganda, Ernesto Sánchez, Matteo Sonza Reorda |
| 2011 | An intellectual property core to detect task schedulling-related faults in RTOS-based embedded systems. Dhiego Silva, Letícia Maria Veiras Bolzani, Fabian Vargas |
| 2011 | An on-line memory state validation using shadow memory cloning. Mikhail Baklashov |
| 2011 | Control-flow error recovery using commodity multi-core architecture features. Navid Khoshavi, Hamid R. Zarandi, Mohammad Maghsoudloo |
| 2011 | Countermeasures against fault attacks: The good, the bad, and the ugly. Paolo Maistri |
| 2011 | Detection of Trojan HW by using hidden information on the system. Osnat Keren, Ilya Levin, Vladimir Sinelnikov |
| 2011 | Error correction encoding for multi-threshold capture mechanism. Kedar Karmarkar, Spyros Tragoudas |
| 2011 | Estimation of component criticality in early design steps. Matthias Sauer, Alejandro Czutro, Ilia Polian, Bernd Becker |
| 2011 | Evaluation techniques for on-line testing of robust systems based on critical tasks distribution. Anna Vaskova, Celia López-Ongil, Mario García-Valderas, Marta Portela-García, Luis Entrena |
| 2011 | Fail-safety in core-based system design. Rafal Baranowski, Hans-Joachim Wunderlich |
| 2011 | Fault attack resistant deterministic random bit generator usable for key randomization. Eberhard Böhl, Paul Duplys |
| 2011 | Fault-tolerance assessment and enhancement in SoCWire interface: A system-on-chip wire. Ronak Salamat, Hamid R. Zarandi |
| 2011 | Generalized parity-check matrices for SEC-DED codes with fixed parity. Valentin Gherman, Samuel Evain, Nathaniel Seymour, Yannick Bonhomme |
| 2011 | Generic BIST architecture for testing of content addressable memories. Hayk T. Grigoryan, Gurgen Harutunyan, Samvel K. Shoukourian, Valery A. Vardanian, Yervant Zorian |
| 2011 | High-level synthesis for multi-cycle transient fault tolerant datapaths. Tomoo Inoue, Hayato Henmi, Yuki Yoshikawa, Hideyuki Ichihara |
| 2011 | ICT: Interface software for the characterization and test of mixed-signal power cores. Jorge O. M. Esteves, Tiago H. Moita, Carlos B. Almeida, Marcelino B. Santos |
| 2011 | Internal model control for a self-tuning Delay-Locked Loop in UWB communication systems. Rshdee Alhakim, Emmanuel Simeu, Kosai Raoof |
| 2011 | Investigation of multi cell upset in sequential logic and validity of redundancy technique. Taiki Uemura, Takashi Kato, Hideya Matsuyama, Keiji Takahisa, Mitsuhiro Fukuda, Kichiji Hatanaka |
| 2011 | Loopback output router for reliable Network on Chip. Cédric Killian, Camel Tanougast, Fabrice Monteiro, Abbas Dandache |
| 2011 | Matrix control-flow algorithm-based fault tolerance. Ronaldo Rodrigues Ferreira, Álvaro Freitas Moreira, Luigi Carro |
| 2011 | Memory BIST with address programmability. Aymen Fradi, Michael Nicolaidis, Lorena Anghel |
| 2011 | Modeling and mitigating NBTI in nanoscale circuits. Seyab Khan, Said Hamdioui |
| 2011 | Multi-level secure JTAG architecture. Luke Pierce, Spyros Tragoudas |
| 2011 | Multiple-bit-upset and single-bit-upset resilient 8T SRAM bitcell layout with divided wordline structure. Shusuke Yoshimoto, Takuro Amashita, D. Kozuwa, Taiga Takata, Masayoshi Yoshimura, Yusuke Matsunaga, Hiroto Yasuura, Hiroshi Kawaguchi, Masahiko Yoshimoto |
| 2011 | New reliability mechanisms in memory design for sub-22nm technologies. Nivard Aymerich, A. Asenov, Andrew R. Brown, Ramon Canal, Binjie Cheng, Joan Figueras, Antonio González, Enric Herrero, S. Markov, Miguel Miranda, Peyman Pouyan, Tanausú Ramírez, Antonio Rubio, Elena I. Vatajelu, Xavier Vera, Xingsheng Wang, Paul Zuber |
| 2011 | Noise margin, critical charge and power-delay tradeoffs for SRAM design. Aravind Rajendran, Yuriy Shiyanovskii, Frank Wolff, Christos A. Papachristou |
| 2011 | On graceful degradation of chip multiprocessors in presence of faults via flexible pooling of critical execution units. Rance Rodrigues, Sandip Kundu |
| 2011 | On graceful degradation of microprocessors in presence of faults via resource banking. Rance Rodrigues, Sandip Kundu |
| 2011 | RVC-based time-predictable faulty caches for safety-critical systems. Jaume Abella, Eduardo Quiñones, Francisco J. Cazorla, Mateo Valero, Yanos Sazeides |
| 2011 | Real time cross-layer adaptation for minimum energy wireless image transport using bit error rate control. Jayaram Natarajan, Shreyas Sen, Abhijit Chatterjee |
| 2011 | Reduced overhead soft error mitigation using error control coding techniques. V. Prasanth, Virendra Singh, Rubin A. Parekhji |
| 2011 | Rise of the hardware Trojans. Berk Sunar |
| 2011 | Selective fault tolerance for finite state machines. Michael Augustin, Michael Gössel, Rolf Kraemer |
| 2011 | Self-checking test circuits for latches and flip-flops. Renato P. Ribas, Yuyang Sun, André Inácio Reis, André Ivanov |
| 2011 | Soft error correction in embedded storage elements. Michael E. Imhof, Hans-Joachim Wunderlich |
| 2011 | Software-based control flow error detection and correction using branch triplication. Nahid Farhady Ghalaty, Mahdi Fazeli, Hossein Izadi Rad, Seyed Ghassem Miremadi |
| 2011 | The cost of cryptography: Is low budget possible? Ingrid Verbauwhede |
| 2011 | Towards functional-safe timing-dependable real-time architectures. Marco Paolieri, Riccardo Mariani |
| 2011 | Towards improved survivability in safety-critical systems. Jaume Abella, Francisco J. Cazorla, Eduardo Quiñones, Arnaud Grasset, Sami Yehia, Philippe Bonnot, Dimitris Gizopoulos, Riccardo Mariani, Guillem Bernat |
| 2011 | Unidirectional error detection, localization and correction for DRAMs: Application to on-line DRAM repair strategies. Madalin Neagu, Liviu Miclea, Joan Figueras |
| 2011 | Variability-aware task mapping strategies for many-cores processor chips. Fabien Chaix, Gilles Bizot, Michael Nicolaidis, Nacer-Eddine Zergainoh |
| 2011 | Variations of fault manifestation during Burn-In - A case study on industrial SRAM test results. Michael Linder, Alfred Eder, Klaus Oberländer, Martin Huch |