IOLTS C

55 papers

YearTitle / Authors
201016th IEEE International On-Line Testing Symposium (IOLTS 2010), 5-7 July, 2010, Corfu, Greece
20103D integration: Circuit design, test, and reliability challenges.
Nikolaos Minas, Ingrid De Wolf, Erik Jan Marinissen, Michele Stucchi, Herman Oprins, Abdelkarim Mercha, Geert Van der Plas, Dimitrios Velenis, Pol Marchal
2010A bit level area aware cache-based architecture for memory repairs.
Nicholas Axelos, Kiamal Z. Pekmestzi
2010A framework to support the design of COTS-based reliable space computers for on-board data handling.
Salvatore Campagna, Massimo Violante
2010A method for detecting resistive opens in buses.
Josep Rius
2010A new framework for the automatic insertion of mitigation structures in circuits netlists.
Niccolò Battezzati, Davide Serrone, Massimo Violante
2010A partitioning approach to improve reconfigurable neuron-inspired online BIST.
Ali Shahabi, S. Behdad Hosseini, Hasan Sohofi, Zainalabedin Navabi
2010A self-consistent model to estimate NBTI degradation and a comprehensive on-line system lifetime enhancement technique.
Georgios Karakonstantis, Charles Augustine, Kaushik Roy
2010A software-based self-test methodology for in-system testing of processor cache tag arrays.
George Theodorou, Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos
2010Aging test strategy and adaptive test scheduling for SoC failure prediction.
Hyunbean Yi, Tomokazu Yoneda, Michiko Inoue, Yasuo Sato, Seiji Kajihara, Hideo Fujiwara
2010An FPGA-based fail-soft system with adaptive reconfiguration.
Ryoji Noji, Satoshi Fujie, Yuki Yoshikawa, Hideyuki Ichihara, Tomoo Inoue
2010An analog VLSI multilayer perceptron and its application towards built-in self-test in analog circuits.
Dzmitry Maliuk, Haralampos-G. D. Stratigopoulos, Yiorgos Makris
2010An on-line fault detection technique based on embedded debug features.
Michelangelo Grosso, Matteo Sonza Reorda, Marta Portela-García, Mario García-Valderas, Celia López-Ongil, Luis Entrena
2010Analysis of on-line self-testing policies for real-time embedded multiprocessors in DSM technologies.
Olivier Héron, Julien Guilhemsang, Nicolas Ventroux, Alain Giulieri
2010Analysis of root causes of alpha sensitivity variations on microprocessors manufactured using different cell layouts.
Paolo Rech, Michelangelo Grosso, Fabio Melchiori, Domenico Loparco, Davide Appello, Luigi Dilillo, Alessandro Paccagnella, Matteo Sonza Reorda
2010Application dependent FPGA testing method using compressed deterministic test vectors.
Martin Rozkovec, Jiri Jenícek, Ondrej Novák
2010Built-in performance monitoring of mixed-signal/RF front ends using real-time parameter estimation.
Shyam Kumar Devarakond, Shreyas Sen, Aritra Banerjee, Vishwanath Natarajan, Abhijit Chatterjee
2010Checkpointing virtual machines against transient errors.
Long Wang, Zbigniew Kalbarczyk, Ravishankar K. Iyer, Arun Iyengar
2010Concepts for fault tolerant sensor systems.
A. Richardson
2010Configurable serial fault-tolerant link for communication in 3D integrated systems.
Vladimir Pasca, Lorena Anghel, Claudia Rusu, Mounir Benabdenbi
2010Cross-BIC architecture for single and multiple SEU detection enhancement in SRAM memories.
Sebastià A. Bota, Gabriel Torrens, Bartomeu Alorda, Jaume Verd, Jaume Segura
2010Design of embedded constant weight code checkers based on averaging operations.
Steffen Tarnick
2010Distributed online software monitoring of manycore architectures.
Etienne Faure, Mounir Benabdenbi, François Pêcheux
2010Error resilient video encoding using Block-Frame Checksums.
Joshua W. Wells, Jayaram Natarajan, Abhijit Chatterjee
2010Evaluating transient-fault effects on traditional C-element's implementations.
Rodrigo Possamai Bastos, Gilles Sicard, Fernanda Lima Kastensmidt, Marc Renaudin, Ricardo Reis
2010Evaluation of concurrent error detection techniques on the advanced encryption standard.
Kaouthar Bousselam, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre
2010Fully distributed initialization procedure for a 2D-Mesh NoC, including off-line BIST and partial deactivation of faulty components.
Zhen Zhang, Alain Greiner, Mounir Benabdenbi
2010How to flip a bit?
Michel Agoyan, Jean-Max Dutertre, Amir-Pasha Mirbaha, David Naccache, Anne-Lise Ribotta, Assia Tria
2010Improving fault handling software techniques.
Piotr Gawkowski, Tomasz Rutkowski, Janusz Sosnowski
2010Interconnect Built-In Self-Repair and Adaptive-Serialization (I-BIRAS) for 3D integrated systems.
Michael Nicolaidis, Vladimir Pasca, Lorena Anghel
2010Investigating the Use of BICS to detect resistive-open defects in SRAMs.
Raul Chipana, Letícia Maria Veiras Bolzani, Fabian Vargas, Jorge Semião, Juan J. Rodríguez-Andina, Isabel C. Teixeira, João Paulo Teixeira
2010Key randomization using a power analysis resistant deterministic random bit generator.
Paul Duplys, Eberhard Böhl, Wolfgang Rosenstiel
2010On-line detection of random voltage perturbations in buses with multiple-threshold receivers.
Michael N. Skoufis, Spyros Tragoudas
2010On-line testing of bundled-data asynchronous handshake protocols.
Steffen Zeidler, Alexandre V. Bystrov, Milos Krstic, Rolf Kraemer
2010Online fault testing of reversible logic using dual rail coding.
Navid Farazmand, Masoud Zamani, Mehdi Baradaran Tahoori
2010Predictive error detection by on-line aging monitoring.
Julio César Vázquez, Víctor H. Champac, Adriel Ziesemer, Ricardo Reis, Jorge Semião, Isabel C. Teixeira, Marcelino B. Santos, João Paulo Teixeira
2010Probabilistic methods for the impact of an SET in combinational logic.
Sreenivas Gangadhar, Spyros Tragoudas
2010Programmable restricted SEC codes to mask permanent faults in semiconductor memories.
Samuel Evain, Yannick Bonhomme, Valentin Gherman
2010Qualification and relifing testing for space applications applied to the agilent G-Link components.
Michel Pignol, Florence Malou, Corinne Aicardi
2010RILM: Reconfigurable inter-layer routing mechanism for 3D multi-layer networks-on-chip.
Claudia Rusu, Lorena Anghel, Dimiter Avresky
2010Radiation effects on programmable analog devices and mitigation techniques.
Tiago R. Balen, Marcelo Lubaszewski
2010Reconfigurable low-power Concurrent Error Detection in logic circuits.
Sobeeh Almukhaizim, Sara Bunian, Ozgur Sinanoglu
2010Reducing the area overhead of TMR-systems by protecting specific signals.
Michael Augustin, Michael Gössel, Rolf Kraemer
2010Robust FSMs for cryptographic devices resilient to strong fault injection attacks.
Zhen Wang, Mark G. Karpovsky
2010Robust cryptographic ciphers with on-line statistical properties validation.
Anna Vaskova, Celia López-Ongil, Alejandro Jiménez-Horas, Enrique San Millán, Luis Entrena
2010Robust detection of soft errors using delayed capture methodology.
V. Prasanth, Virendra Singh, Rubin A. Parekhji
2010SBST for on-line detection of hard faults in multiprocessor applications under energy constraints.
Andreas Merentitis, Dionisis Margaris, Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos
2010Selecting state variables for improved on-line testability through output response comparison of identical circuits.
Irith Pomeranz, Sudhakar M. Reddy
2010Self-checking arithmetic logic unit with duplicated outputs.
Vitaly Ocheretny
2010Temperature dependence of NBTI induced delay.
Seyab Khan, Said Hamdioui
2010Test and reliability concerns for 3D-ICs.
Yervant Zorian
2010Thermal coupling in ICs: Applications to the test and characterization of analogue and RF circuits.
Josep Altet, Diego Mateo, Eduardo Aldrete-Vidrio
2010Timing error tolerance in nanometer ICs.
Stefanos Valadimas, Yiorgos Tsiatouhas, Angela Arapoyanni
2010Trustworthy computing in a multi-core system using distributed scheduling.
David R. McIntyre, Francis G. Wolff, Christos A. Papachristou, Swarup Bhunia
2010Wavelet analysis of measurements for on-line testing analog & mixed-signal circuits.
Michael G. Dimopoulos, Alexios Spyronasios, Alkis A. Hatzopoulos