IOLTS C

59 papers

YearTitle / Authors
200814th IEEE International On-Line Testing Symposium (IOLTS 2008), 7-9 July 2008, Rhodes, Greece
2008A BISR Architecture for Embedded Memories.
Kiamal Z. Pekmestzi, Nicholas Axelos, Isidoros Sideris, Nikos K. Moshopoulos
2008A Built-In Self-Test Scheme for Soft Error Rate Characterization.
Alodeep Sanyal, Syed M. Alam, Sandip Kundu
2008A Fault-Tolerant Attitude Determination System Based on COTS Devices.
Ricardo de Oliveira Duarte, Luiz de Siqueira Martins-Filho, Guilherme F. T. Knop, Ricardo S. Prado
2008A Hybrid Approach to the Test of Cache Memory Controllers Embedded in SoCs.
Wilson J. Pérez H., Jaime Velasco-Medina, Danilo Ravotto, Edgar E. Sánchez, Matteo Sonza Reorda
2008A Low-Cost Accumulator-Based Test Pattern Generation Architecture.
Dimitris Magos, Ioannis Voyiatzis, Steffen Tarnick
2008A Modular Memory BIST for Optimized Memory Repair.
Philipp Öhler, Alberto Bosio, Giorgio Di Natale, Sybille Hellebrand
2008A New Approach for Transient Fault Injection Using Symbolic Simulation.
Ashish Darbari, Bashir M. Al-Hashimi, Peter Harrod, Daryl Bradley
2008A New Radiation Hardened by Design Latch for Ultra-Deep-Sub-Micron Technologies.
Zhengfeng Huang, Huaguo Liang
2008A Novel GA-Based High-Level Synthesis Technique to Enhance RT-Level Concurrent Testing.
Naghmeh Karimi, Soheil Aminzadeh, Saeed Safari, Zainalabedin Navabi
2008A Systematical Method of Quantifying SEU FIT.
Shi-Jie Wen, Dan Alexandrescu, Renaud Perez
2008An Enhanced Logic BIST Architecture for Online Testing.
Fan Yang, Sreejit Chakravarty, Narendra Devta-Prasanna, Sudhakar M. Reddy, Irith Pomeranz
2008Basic Architecture for Logic Self Repair.
Tobias Koal, Heinrich Theodor Vierhaus
2008Budget-Dependent Control-Flow Error Detection.
Ramtilak Vemu, Jacob A. Abraham
2008Communication Aware Recovery Configurations for Networks-on-Chip.
Claudia Rusu, Cristian Grecu, Lorena Anghel
2008Design Techniques for Bit-Parallel Galois Field Multipliers with On-Line Single Error Correction and Double Error Detection.
Jimson Mathew, Abusaleh M. Jabir, Dhiraj K. Pradhan
2008Detailed Analyses of Single Laser Shot Effects in the Configuration of a Virtex-II FPGA.
Gaetan Canivet, Jessy Clédière, Jean Baptiste Ferron, Frédéric Valette, Marc Renaudin, Régis Leveugle
2008Deterministic Built-in TPG with Segmented FSMs.
Samara Sudireddy, Jayawant Kakade, Dimitri Kagaris
2008Developing Fault Injection Environment for Complex Experiments.
Piotr Gawkowski, Janusz Sosnowski
2008Development of a Testbench for Validation of DMT and DT2 Fault-Tolerant Architectures on SOI PowerPC7448.
Michel Pignol, Thierry Parrain, Vincent Claverie, Christian Boléat, Guy Estaves
2008Directed Random SBST Generation for On-Line Testing of Pipelined Processors.
Andreas Merentitis, George Theodorou, Mihalis Giorgaras, Nektarios Kranitis
2008Dynamic Scheduling of Test Routines for Efficient Online Self-Testing of Embedded Microprocessors.
Nikolaos G. Bartzoudis, Vasileios Tantsios, Klaus D. McDonald-Maier
2008Dynamic Testing of an SRAM-Based FPGA by Time-Resolved Laser Fault Injection.
Vincent Pouget, Alexandre Douin, Gilles Foucard, Paul Peronnard, Dean Lewis, Pascal Fouillat, Raoul Velazco
2008Embedding Current Monitoring in H-Tree RAM Architecture for Multiple SEU Tolerance and Reliability Improvement.
Costas Argyrides, Fabian Vargas, Marlon Moraes, Dhiraj K. Pradhan
2008Exploiting Parametric Power Supply and/or Temperature Variations to Improve Fault Tolerance in Digital Circuits.
Jorge Semião, Judit Freijedo, Juan J. Rodríguez-Andina, Fabian Vargas, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira
2008False Error Study of On-line Soft Error Detection Mechanisms.
M. Kiran Kumar Reddy, Bharadwaj S. Amrutur, Rubin A. Parekhji
2008Fault Tolerant Reversible Finite Field Arithmetic Circuits.
Jimson Mathew, Jawar Singh, Anas Abu Taleb, Dhiraj K. Pradhan
2008Growing Interest of Advanced Commercial CMOS Technologies for Space and Medical Applications. Illustration with a New Nano-Power and Radiation-Hardened SRAM in 130nm CMOS.
Philippe Roche, Mark Lysinger, Gilles Gasiot, Jean-Marc Daveau, Mehdi Zamanian, Pierre Dautriche
2008Guided Probabilistic Checksums for Error Control in Low Power Digital-Filters.
Muhammad Mudassar Nisar, Abhijit Chatterjee
2008Integrating Scan Design and Soft Error Correction in Low-Power Applications.
Michael E. Imhof, Hans-Joachim Wunderlich, Christian G. Zoellin
2008Modeling and Simulation of Circuit Aging in Scaled CMOS Design.
Yu (Kevin) Kao
2008New Linear SEC-DED Codes with Reduced Triple Bit Error Miscorrection Probability.
Michael Richter, Klaus Oberländer, Michael Gössel
2008On Line Testing of Single Feedback Bridging Fault in Cluster Based FPGA by Using Asynchronous Element.
Nachiketa Das, Pranab Roy, Hafizur Rahaman
2008On the Detection of SSN-Induced Logic Errors through On-Chip Monitoring.
Florence Azaïs, Laurent Larguier, Yves Bertrand, Michel Renovell
2008On the Evaluation of Radiation-Induced Transient Faults in Flash-Based FPGAs.
Niccolò Battezzati, Simone Gerardin, Andrea Manuzzato, Alessandro Paccagnella, Sana Rezgui, Luca Sterpone, Massimo Violante
2008On the Minimization of Potential Transient Errors and SER in Logic Circuits Using SPFD.
Sobeeh Almukhaizim, Yiorgos Makris, Yu-Shen Yang, Andreas G. Veneris
2008On-Line Failure Detection and Confinement in Caches.
Jaume Abella, Pedro Chaparro, Xavier Vera, Javier Carretero, Antonio González
2008On-Line Testing of Lab-on-Chip Using Digital Microfluidic Compactors.
Yang Zhao, Krishnendu Chakrabarty
2008Physical Demonstration of Polymorphic Self-Checking Circuits.
Richard Ruzicka, Lukás Sekanina, Roman Prokop
2008Propagation of Transients Along Sensitizable Paths.
Sreenivas Gangadhar, Michael N. Skoufis, Spyros Tragoudas
2008Reliability in Application Specific Mesh-Based NoC Architectures.
Fatemeh Refan, Homa Alemzadeh, Saeed Safari, Paolo Prinetto, Zainalabedin Navabi
2008SDRAM Architecture & Single Event Effects Revealed with Laser.
Antonin Bougerol, Florent Miller, Nadine Buard
2008SRAM Cell Design Protected from SEU Upsets.
Yuriy Shiyanovskii, Francis G. Wolff, Christos A. Papachristou
2008Self-Configuration and Reachability Metrics in Massively Defective Multiport Chips.
Piotr Zajac, Jacques Henri Collet, Andrzej Napieralski
2008Smart Hardening for Round-based Encryption Algorithms: Application to Advanced Encryption Standard.
Celia López-Ongil, Alejandro Jiménez-Horas, Marta Portela-García, Mario García-Valderas, Enrique San Millán, Luis Entrena
2008Soft Error Protection Techniques.
Subhasish Mitra
2008Soft Error Rates of Hardened Sequentials utilizing Local Redundancy.
Norbert Seifert
2008Soft-Error Vulnerability of Sub-100-nm Flip-Flops.
Tino Heijmen
2008Software Self-Testing of a Symmetric Cipher with Error Detection Capability.
Paolo Maistri, Cyril Excoffon, Régis Leveugle
2008Special Session 1: Radiation Hardening Techniques.
Norbert Seifert
2008Special Session 2: Benchmarking and Standardization in Software-Based SER Characterization: Towards an IEEE Task Force?
Michael Nicolaidis
2008Special Session 3 - Panel: SER in Automotive: what is the impact of the AEC Q100-G spec?
Tino Heijmen
2008Special Session 4: Reliability and Circuit Simulation.
Rob Aitken
2008SystemC-Based Minimum Intrusive Fault Injection Technique with Improved Fault Representation.
Rishad A. Shafik, Paul M. Rosinger, Bashir M. Al-Hashimi
2008Totally Fault Tolerant RNS Based FIR Filters.
Salvatore Pontarelli, Gian Carlo Cardarilli, Marco Re, Adelio Salsano
2008Using Low Pass Filters in Mitigation Techniques against Single-Event Transients in 45nm Technology LSIs.
Taiki Uemura, Ryo Tanabe, Yoshiharu Tosaka, Shigeo Satoh
2008Variation of SRAM Alpha-Induced Soft Error Rate with Technology Node.
Damien Leroy, Rémi Gaillard, Erwin Schäfer, Cyrille Beltrando, Shi-Jie Wen, Richard Wong
2008Verification and Analysis of Self-Checking Properties through ATPG.
Marc Hunger, Sybille Hellebrand
2008Yield Improvement, Fault-Tolerance to the Rescue?.
Julien Vial, Alberto Bosio, Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel