IOLTS C

59 papers

YearTitle / Authors
200713th IEEE International On-Line Testing Symposium (IOLTS 2007), 8-11 July 2007, Heraklion, Crete, Greece
2007A C-element Latch Scheme with Increased Transient Fault Tolerance for Asynchronous Circuits.
K. T. Gardiner, Alexandre Yakovlev, Alexandre V. Bystrov
2007A Configurable Modular Test Processor and Scan Controller Architecture.
R. Frost, D. Rudolph, Christian Galke, René Kothe, Heinrich Theodor Vierhaus
2007A Functional Self-Test Approach for Peripheral Cores in Processor-Based SoCs.
Andreas Apostolakis, Mihalis Psarakis, Dimitris Gizopoulos, Antonis M. Paschalis
2007A Hybrid Approach to Fault Detection and Correction in SoCs.
Paolo Bernardi, Letícia Maria Veiras Bolzani, Matteo Sonza Reorda
2007A Rapid Fault Injection Approach for Measuring SEU Sensitivity in Complex Processors.
Marta Portela-García, Celia López-Ongil, Mario García-Valderas, Luis Entrena
2007A systematic approach for Failure Modes and Effects Analysis of System-On-Chips.
Riccardo Mariani, Gabriele Boschi
2007Accelerating Soft Error Rate Testing Through Pattern Selection.
Alodeep Sanyal, Kunal P. Ganeshpure, Sandip Kundu
2007Accelerating Yield Ramp through Real-Time Testing.
Sanjiv Taneja
2007An Analytical Model for Reliability Evaluation of NoC Architectures.
Atefe Dalirsani, Mohammad Hosseinabady, Zainalabedin Navabi
2007An Automated Methodology for Cogeneration of Test Blocks for Peripheral Cores.
Letícia Maria Veiras Bolzani, Ernesto Sánchez, Massimiliano Schillaci, Matteo Sonza Reorda, Giovanni Squillero
2007An Elliptic Curve Cryptosystem Design Based on FPGA Pipeline Folding.
Osama Daifallah Al-Khaleel, Christos A. Papachristou, Francis G. Wolff, Kiamal Z. Pekmestzi
2007An On-Line Fault Detection Scheme for SBoxes in Secure Circuits.
Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre
2007Analysis of System-Failure Rate Caused by Soft-Errors using a UML-Based Systematic Methodology in an SoC.
Mohammad Hosseinabady, Mohammad Hossein Neishaburi, Zainalabedin Navabi, Alfredo Benso, Stefano Di Carlo, Paolo Prinetto, Giorgio Di Natale
2007Applicability of Energy Efficient Coding Methodology to Address Signal Integrity in 3D NoC Fabrics.
Partha Pratim Pande, Amlan Ganguly, Brett Feero, Cristian Grecu
2007Architectural Trade-Offs for Fault Tolerant Multi-Core Systems.
Krisztián Flautner
2007Automated Derivation of Application-aware Error Detectors using Static Analysis.
Karthik Pattabiraman, Zbigniew Kalbarczyk, Ravishankar K. Iyer
2007Blurring the Layers of Abstractions: Time to Take a Step Back?
Krisztián Flautner
2007Circuit Failure Prediction Enables Robust System Design Resilient to Aging and Wearout.
Subhasish Mitra
2007Configurable Error Control Scheme for NoC Signal Integrity.
Daniele Rossi, Paolo Angelini, Cecilia Metra
2007Defect-Aware Configurable Computing in Nanoscale Crossbar for Improved Yield.
Somnath Paul, Rajat Subhra Chakraborty, Swarup Bhunia
2007Design for Resilience to Soft Errors and Variations.
Ming Zhang, T. M. Mak, James W. Tschanz, Kee Sup Kim, Norbert Seifert, Davia Lu
2007Design of Embedded m-out-of-n Code Checkers Using Complete Parallel Counters.
Steffen Tarnick
2007Efficient Testable Bit Parallel Multipliers over GF(2^m) with Constant Test set.
Jimson Mathew, Hafizur Rahaman, Dhiraj K. Pradhan
2007Embedding test patterns into Low-Power BIST sequences.
Ioannis Voyiatzis
2007Envelope Detection Based Transition Time Supervision for Online Testing of RF MEMS Switches.
Emmanuel Simeu, Salvador Mir, R. Kherreddine, Hoang Nam Nguyen
2007Essential Fault-Tolerance Metrics for NoC Infrastructures.
Cristian Grecu, Lorena Anghel, Partha Pratim Pande, André Ivanov, Resve A. Saleh
2007Fault-Secure Interface Between Fault-Tolerant RAM and Transmission Channel Using Systematic Cyclic Codes.
Fabrice Monteiro, Stanislaw J. Piestrak, Houssein Jaber, Abbas Dandache
2007Formal Analysis of Quasi Delay Insensitive Circuits Behavior in the Presence of SEUs.
Yannick Monnet, Marc Renaudin, Régis Leveugle
2007Fuse: A Technique to Anticipate Failures due to Degradation in ALUs.
Jaume Abella, Xavier Vera, Osman S. Unsal, Oguz Ergin, Antonio González
2007GRAAL: A Fault-Tolerant Architecture for Enabling Nanometric Technologies.
Michael Nicolaidis
2007Heavy Ion Test Results in a CMOS triple Voting Register for a High-Energy Physics Experiment.
X. Cano, Sebastià A. Bota, Ricardo Graciani Diaz, David Gascon, A. Herms, Albert Comerma, Jaume Segura, Lluís Garrido
2007Highly Reliable Power Aware Memory Design.
Costas Argyrides, Dhiraj K. Pradhan
2007Identification of Critical Errors in Imaging Applications.
Ilia Polian, Damian Nowroth, Bernd Becker
2007Infant Mortality--The Lesser Known Reliability Issue.
T. M. Mak
2007Innovative Design Platforms for Reliable SoCs in Advanced Nanometer Technologies.
Davide Pandini
2007LFSR Reseeding with Irreducible Polynomials.
Snehal Udar, Dimitri Kagaris
2007Latchup effect in CMOS IC: a solution for crypto-processors protection against fault injection attacks?
Nadine Buard, Florent Miller, Cédric Ruby, Rémi Gaillard
2007Methodology and Tools Developed for Validation of COTS-based Fault-Tolerant Spacecraft Supercomputers.
Michel Pignol
2007Multiple Event Transient Induced by Nuclear Reactions in CMOS Logic Cells.
Claudia Rusu, Antonin Bougerol, Lorena Anghel, Cécile Weulersse, Nadine Buard, S. Benhammadi, Nicolas Renaud, Guillaume Hubert, Frederic Wrobel, Thierry Carrière, Rémi Gaillard
2007Novel Process and Temperature-Stable BICS for Embedded Analog and Mixed-Signal Test.
John C. Liobe, Martin Margala
2007On Derating Soft Error Probability Based on Strength Filtering.
Alodeep Sanyal, Sandip Kundu
2007On-Line Self-Healing of Circuits Implemented on Reconfigurable FPGAs.
Manuel G. Gericota, Luís F. Lemos, Gustavo R. Alves, José M. Ferreira
2007On-line Dynamic Delay Insertion to Improve Signal Integrity in Synchronous Circuits.
Jorge Semião, Judit Freijedo, Juan J. Rodríguez-Andina, Fabian Vargas, Marcelino B. Santos, Isabel C. Teixeira, João Paulo Teixeira
2007Online monitoring of FPGA-based co-processing engines embedded in dependable workstations.
Nikolaos G. Bartzoudis, Klaus D. McDonald-Maier
2007Probabilistic Concurrent Error Compensation in Nonlinear Digital Filters Using Linearized Checksums.
Muhammad Mudassar Nisar, Maryam Ashouei, Abhijit Chatterjee
2007Reliability issues in deep deep sub-micron technologies: time-dependent variability and its impact on embedded system design.
Antonis Papanikolaou, Hua Wang, Miguel Miranda, Francky Catthoor
2007Resilience, Production Yield and Self-Configuration in the Future Massively Defective Nanochips.
Jacques Henri Collet, Piotr Zajac
2007Robustness of circuits under delay-induced faults : test of AES with the PAFI tool.
Olivier Faurax, Assia Tria, Laurent Freund, Frédéric Bancel
2007Self Checking Circuit Optimization by means of Fault Injection Analysis: A Case Study on Reed Solomon Decoders.
Salvatore Pontarelli, Luca Sterpone, Gian Carlo Cardarilli, Marco Re, Matteo Sonza Reorda, Adelio Salsano, Massimo Violante
2007Single Event Effects in 1Gbit 90nm NAND Flash Memories under Operating Conditions.
Marta Bagatin, Giorgio Cellere, Simone Gerardin, Alessandro Paccagnella, Angelo Visconti, Silvia Beltrami, M. Maccarrone
2007Soft Error Rates in 65nm SRAMs--Analysis of new Phenomena.
Franz X. Ruckerbauer, Georg Georgakos
2007Soft Errors: Technology Trends, System Effects, and Protection Techniques.
Subhasish Mitra, Pia N. Sanda, Norbert Seifert
2007Soft-Errors Phenomenon Impacts on Design for Reliability Technologies.
Mark Derbey
2007Spread in Alpha-Particle-Induced Soft-Error Rate of 90-nm Embedded SRAMs.
Tino Heijmen
2007Statistical Device Variability and its Impact on Yield and Performance.
Asen Asenov
2007Surviving to Errors in Multi-Core Environments.
Xavier Vera, Jaume Abella
2007Time-Sensitive Control-Flow Checking for Multitask Operating System-Based SoCs.
Fabian Vargas, Leonardo Piccoli, Juliano Benfica, Antonio A. de Alecrim Jr., Marlon Moraes
2007Tolerance to Small Delay Defects by Adaptive Clock Stretching.
Swaroop Ghosh, Patrick Ndai, Swarup Bhunia, Kaushik Roy