IOLTS C

58 papers

YearTitle / Authors
200612th IEEE International On-Line Testing Symposium (IOLTS 2006), 10-12 July 2006, Como, Italy
2006A Low-Cost SEU Fault Emulation Platform for SRAM-Based FPGAs.
P. Kenterlis, Nektarios Kranitis, Antonis M. Paschalis, Dimitris Gizopoulos, Mihalis Psarakis
2006A Low-Cost Single-Event Latchup Mitigation Sscheme.
Michael Nicolaidis
2006A New Self-Checking and Code-Disjoint Non-Restoring Array Divider.
Daniel Marienfeld, Egor S. Sogomonyan, Vitalij Ocheretnij, Michael Gössel
2006A Note on Error Detection in an RSA Architecture by Means of Residue Codes.
Luca Breveglieri, Paolo Maistri, Israel Koren
2006A Partitioning Technique for Identification of Error-Capturing Scan Cells in Scan-BIST.
Chaowen Yu, Sudhakar M. Reddy, Irith Pomeranz
2006An Improved Technique for Reducing False Alarms Due to Soft Errors.
Sandip Kundu, Ilia Polian
2006Asynchronous Design: Fault Robustness and Security Characteristics.
Marc Renaudin, Yannick Monnet
2006Built-in Self Repair by Reconfiguration of FPGAs.
S. Habermann, René Kothe, Heinrich Theodor Vierhaus
2006CEDA: Control-flow Error Detection through Assertions.
Ramtilak Vemu, Jacob A. Abraham
2006Characterizing Laser-Induced Pulses in ICs: Methodology and Results.
Damien Leroy, Stanislaw J. Piestrak, Fabrice Monteiro, Abbas Dandache, Stéphane Rossignol, Pascal Moitrel
2006Checker No-Harm Alarm Robustness.
Daniele Rossi, Martin Omaña, Cecilia Metra, Andrea Pagni
2006Combinational Logic Soft Error Analysis and Protection.
André K. Nieuwland, Samir Jasarevic, Goran Jerin
2006Contribution of Communications to Dependability in Massively-Defective General-Purpose Nanoarchitectures.
Jacques Henri Collet, Piotr Zajac, Yves Crouzet, Andrzej Napieralski
2006DMT and DT2: Two Fault-Tolerant Architectures developed by CNES for COTs-based Spacecraft Supercomputers.
Michel Pignol
2006Delay Fault Localization in Test-Per-Scan BIST Using Built-In Delay Sensor.
Swaroop Ghosh, Swarup Bhunia, Arijit Raychowdhury, Kaushik Roy
2006Dependability Evaluation of Transient Fault Effects in Reconfigurable Compute Fabric Devices.
Luca Sterpone, Massimo Violante
2006Design of a Robust 8-Bit Microprocessor to Soft Errors.
Rodrigo Possamai Bastos, Fernanda Lima Kastensmidt, Ricardo Reis
2006Designing Robust Checkers in the Presence of Massive Timing Errors.
Frederic Worm, Patrick Thiran, Paolo Ienne
2006Diophantine-Equation Based Arithmetic Test Set Embedding.
Dimitris Nikolos, Dimitrios Kagaris, Spyros Gidaros
2006Dynamic Fault Detection in Digital Systems Using Dynamic Voltage Scaling and Multi-Temperature Schemes.
Marcial Jesús Rodríguez-Irago, Juan J. Rodríguez-Andina, Fabian Vargas, Jorge Semião, Isabel C. Teixeira, João Paulo Teixeira
2006Efficient Deterministic Test Generation for BIST Schemes with LFSR Reseeding.
Stelios Neophytou, Maria K. Michael, Spyros Tragoudas
2006Embedded Borden 2-UED Code Checkers.
Steffen Tarnick
2006Embedded Scan Test with Diagnostic Features for Self-Testing SoCs.
Christian Galke, René Kothe, Sabine Schultke, K. Winkler, Jeanette Honko, Heinrich Theodor Vierhaus
2006Emulation-based Fault Injection in Circuits with Embedded Memories.
Mario García-Valderas, Marta Portela-García, Celia López-Ongil, Luis Entrena
2006Erratic Effects of Irradiation in Floating Gate Memory Cells.
G. Cellere, Alessandro Paccagnella, Angelo Visconti, Mauro Bonanomi
2006Error Correction in Arithmetic Operations by I/O Inversion.
Petros Oikonomakos, Paul Fox
2006Evaluating One-Hot Encoding Finite State Machines for SEU Reliability in SRAM-based FPGAs.
Maico Cassel, Fernanda Lima Kastensmidt
2006Evaluating SEU and Crosstalk Effects in Network-on-Chip Routers.
Arthur Pereira Frantz, Luigi Carro, Érika F. Cota, Fernanda Lima Kastensmidt
2006Extending Moore's Law into the next Decade - the SER Challenge.
Norbert Seifert
2006Factors That Impact the Critical Charge of Memory Elements.
Tino Heijmen, Damien Giot, Philippe Roche
2006Fault Tolerance Implementation within SRAM Based FPGA Design Based upon the Increased Level of Single Event Upset Susceptibility.
Melanie Berg
2006Fault Tolerant System Design Method Based on Self-Checking Circuits.
Pavel Kubalík, Petr Fiser, Hana Kubátová
2006Fault-Robust Microcontrollers for Automotive Applications.
Riccardo Mariani, Peter Fuhrmann, Boris Vittorelli
2006Floorplanning and Thermal Impact on Leakage Power and Proper Operation of Complex SOC Designs.
Magdy S. Abadir
2006From Nuclear Reaction to System Failures: Can We Address All Levels of Soft Errors Accurately?
Lorena Anghel, Michael Nicolaidis, Nadine Buard
2006Hardware-in-the-Loop-Based Dependability Analysis of Automotive Systems.
Matteo Sonza Reorda, Massimo Violante
2006Localization of Faults in Radix-n Signed Digit Adders.
Gian Carlo Cardarilli, Marco Ottavi, Salvatore Pontarelli, Marco Re, Adelio Salsano
2006On-Line Error Detection in Wireless RF Transmitters Using Real-time Streaming Data.
Vishwanath Natarajan, Ganesh Srinivasan, Abhijit Chatterjee
2006On-line Fault Detection and Location for NoC Interconnects.
Cristian Grecu, André Ivanov, Res Saleh, Egor S. Sogomonyan, Partha Pratim Pande
2006Online Testing by Protocol Decomposition.
Deepali Koppad, Danil Sokolov, Alexandre V. Bystrov, Alexandre Yakovlev
2006Path (Min) Delay Faults and Their Impact on Self-Checking Circuits' Operation.
Cecilia Metra, Martin Omaña, Daniele Rossi, José Manuel Cazeaux, T. M. Mak
2006Phase-Locked Loop Automatic Layout Generation and Transient Fault Injection Analysis: A Case Study.
Cristiano Lazzari, Ricardo A. L. Reis, Lorena Anghel
2006Power Attacks on Secure Hardware Based on Early Propagation of Data.
Konrad J. Kulikowski, Mark G. Karpovsky, Alexander Taubin
2006Practical Evaluation of Fault Countermeasures on an Asynchronous DES Crypto Processor.
Yannick Monnet, Marc Renaudin, Régis Leveugle, Nathalie Feyt, Pascal Moitrel, F. M'Buwa Nzenguet
2006Prediction of Transient Induced by Neutron/Proton in CMOS Combinational Logic Cells.
Guillaume Hubert, Antonin Bougerol, Florent Miller, Nadine Buard, Lorena Anghel, Thierry Carrière, Frederic Wrobel, Rémi Gaillard
2006Real Time Fault Injection Using a Modified Debugging Infrastructure.
André V. Fidalgo, Gustavo R. Alves, José M. Ferreira
2006Reliability Issues for Embedded SRAM at 90nm and Below.
Robert C. Aitken
2006Secure Scan Techniques: A Comparison.
David Hély, Frédéric Bancel, Marie-Lise Flottes, Bruno Rouzeyre
2006Should Logic SER be Solved at the Circuit Level?
T. M. Mak, Subhasish Mitra
2006Soft Error Rates in Deep-Submicron CMOS Technologies.
Tino Heijmen
2006Test Challenges for 3D Circuits.
T. M. Mak
2006The Challenge of Reliability in Future Complex Systems.
Andrea Cuomo
2006The Consequences of Variability in Software.
Isaac Levendel
2006The Problem of On-Line Testing Methods In Approximate Data Processing.
Alexander V. Drozd, M. V. Lobachev, Julia V. Drozd
2006Towards The Methodology of On-line Diagnosis.
Rochit Rajsuman
2006Trend in DRAM Soft Errors.
Günter Schindlbeck
2006Trends and Trade-offs in Designing Highly Robust Throughput on Chip Communication Network.
Marcello Coppola