| 2002 | SOC Design Methodologies, IFIP TC10/WG10.5 Eleventh International Conference on Very Large Scale Integration of Systems-on/Chip (VLSI-SOC'01), December 3-5, 2001, Montpellier, France Michel Robert, Bruno Rouzeyre, Christian Piguet, Marie-Lise Flottes |
| 2001 | 64×64 Pixels General Purpose Digital Vision Chip. Takashi Komuro, Masatoshi Ishikawa |
| 2001 | A Dynamically Reconfigurable Architecture for Low-Power Multimedia Terminals. Raphaël David, Daniel Chillet, Sébastien Pillement, Olivier Sentieys |
| 2001 | A New Efficient VLSI Architecture for Full Search Block Matching Motion Estimation. Nuno Roma, Leonel Sousa |
| 2001 | A Standardized Co-simulation Backbone. Braulio Adriano de Mello, Flávio Rech Wagner |
| 2001 | A VHDL-AMS Case Study: The Incremental Design of an Efficient 3 Christophe Lallement, François Pêcheux, Yannick Hervé |
| 2001 | A Vision System on Chip for Industrial Control. Eric Senn, Eric Martin |
| 2001 | Abstract Communication Model and Automatic Interface generation for IP integration in Hardware/Software Co-design. Cristiano C. de Araújo, Edna Barros |
| 2001 | An Evolutionary Approach for Pareto-optimal Configurations in SOC Platforms. Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi |
| 2001 | An Industrial Approach to Core-Based System Chip Testing. Erik Jan Marinissen |
| 2001 | An Object-Oriented Methodology for Modeling the Precise Behavior of Processor Architectures. João Cláudio Soares Otero, Flávio Rech Wagner |
| 2001 | Automatic Code-Transformation and Architecture Refinement for Application-Specific Multiprocessor SoCs with Shared Memory. Samy Meftali, Ferid Gharsalli, Frédéric Rousseau, Ahmed Amine Jerraya |
| 2001 | Built-in Test of Analog Non-Linear Circuits in a SOC Environment. Luigi Carro, André C. Nácul, Daniel Janner, Marcelo Lubaszewski |
| 2001 | CMOS Mixed-signal Circuits Design on a Digital Array Using Minimum Transistors. Jung Hyun Choi, Sergio Bampi |
| 2001 | Design Considerations of a Low-Complexity, Low-Power Integer Turbo Decoder. Stephen M. Pisuk, Peter Hsin-Yu Wu |
| 2001 | Design Technology for Systems-on-Chip. Raul Camposano, Don MacMillen |
| 2001 | Design of a Branch-Based Carry-Select Adder IP Portable in 0.25 µm Bulk and Silicon-On-Insulator CMOS Technologies. Amaury Nève, Denis Flandre |
| 2001 | Design of a Fast CMOS APS Imager for High Speed Laser Detections. Bruno Casadei, Jean-Piere Le Normand, Yann Hu, Bernard Cunin |
| 2001 | Distributed Collaborative Design over Cave2 Framework. Leandro Soares Indrusiak, Jürgen Becker, Manfred Glesner, Ricardo Augusto da Luz Reis |
| 2001 | Dynamically Reconfigurable Architectures for Digital Signal Processing Applications. Gilles Sassatelli, Lionel Torres, Pascal Benoit, Gaston Cambon, Michel Robert, Jérôme Galy |
| 2001 | Fast Recursive Implementation of the Gaussian Filter. Didier Demigny, Lounis Kessal, J. Pons |
| 2001 | Feasible Delay Bound Definition. Nadine Azémard, M. Aline, Philippe Maurine, Daniel Auvergne |
| 2001 | Functional Test Generation using Constraint Logic Programming. Zhihong Zeng, Maciej J. Ciesielski, Bruno Rouzeyre |
| 2001 | Gate Sizing for Low Power Design. Philippe Maurine, Nadine Azémard, Daniel Auvergne |
| 2001 | High Performance Java Hardware Engine and Software Kernel for Embedded Systems. Morgan Hirosuke Miki, Motoki Kimura, Takao Onoye, Isao Shirakawa |
| 2001 | Impact of Technology Spreading on MEMS design Robustness. Vincent Beroulle, Laurent Latorre, M. Dardalhon, Coumar Oudéa, Guy Perez, Francis Pressecq, Pascal Nouet |
| 2001 | Integration of Robustness in the Design of a Cell. Jean-Max Dutertre, F. M. Roche, Guy Cathébras |
| 2001 | Interconnect Capacitance Modelling in a VDSM CMOS Technology. David Bernard, Christian Landrault, Pascal Nouet |
| 2001 | Low-Voltage 0, 25 µm CMOS Improved Power Adaptive Issue Queue for Embedded Microprocessors. Brian W. Curran, Mary Gifaldi, Jason Martin, Alper Buyuktosunoglu, Martin Margala, David H. Albonesi |
| 2001 | Low-Voltage Embedded-RAM Technology: Present and Future. Kiyoo Itoh, Hiroyuki Mizuno |
| 2001 | Modeling Power Dynamics for an Embedded DSP Processor Core. An Empirical Model. Catherine H. Gebotys, Radu Muresan |
| 2001 | Modeling and Design of Asynchronous Priority Arbiters for On-Chip Communication Systems. Jean-Baptiste Rigaud, Jerome Quartana, Laurent Fesquet, Marc Renaudin |
| 2001 | Noise optimisation of a piezoresistive CMOS MEMS for magnetic field sensing. Vincent Beroulle, Yves Bertrand, Laurent Latorre, Pascal Nouet |
| 2001 | On-chip Generator of a Saw-Tooth Test Stimulus for ADC BIST. Florence Azaïs, Serge Bernard, Yves Bertrand, Michel Renovell |
| 2001 | Power Consumption Model for the DSP OAK Processor. Patricia Guitton-Ouhamou, Cécile Belleudy, Michel Auguin |
| 2001 | Power-Constrained Test Scheduling for SoCs Under a "no session" Scheme. Marie-Lise Flottes, Julien Pouget, Bruno Rouzeyre |
| 2001 | Random Adjacent Sequences: An Efficient Solution for Logic BIST. René David, Patrick Girard, Christian Landrault, Serge Pravossoudovitch, Arnaud Virazel |
| 2001 | Reconfigurable Architecture Using High Speed FPGA. Lounis Kessal, R. Bourguiba, Didier Demigny, N. Boudouani, Si Mahmoud Karabernou |
| 2001 | Speeding Up Verification of RTL Designs by Computing One-to-one Abstractions with Reduced Signal Widths. Peer Johannsen, Rolf Drechsler |
| 2001 | Two ASIC for Low and Middle Levels of Real Time Image Processing. P. Lamaty, B. Mazar, Didier Demigny, Lounis Kessal, Si Mahmoud Karabernou |