| 1997 | A 400MHz, 144Kb CMOS ROM Macro for an IBM S/390-Class Microprocessor. Arthur Tuminaro |
| 1997 | A Brief History of the Future of Semiconductor Electronic Design Automation. Ronald A. Rohrer |
| 1997 | A Comparative Evaluation of Hierarchical Network Architecture of the HP-Convex Exemplar. Robert Castañeda, Xiaodong Zhang, James M. Hoover Jr. |
| 1997 | A Data Alignment Technique for Improving Cache Performance. Preeti Ranjan Panda, Hiroshi Nakamura, Nikil D. Dutt, Alexandru Nicolau |
| 1997 | A Double-Latched Asynchronous Pipeline. Rakefet Kol, Ran Ginosar |
| 1997 | A Floating Point Divider using Redundant Binary Circuits and an Asynchronous Clock Scheme. Hiroaki Suzuki, Hiroshi Makino, Koichiro Mashiko, Hisanori Hamano |
| 1997 | A High-Frequency Custom CMOS S/390 Microprocessor. Charles F. Webb, John S. Liptay |
| 1997 | A Low Power Approach to Floating Point Adder Design. R. V. K. Pillai, Dhamin Al-Khalili, Asim J. Al-Khalili |
| 1997 | A Low Power Smart Vision System Based on Active Pixel Sensor Integrated with Programmable Neural Processor. Wai-Chi Fang, Guang Yang, Bedabrata Pain, Bing J. Sheu |
| 1997 | A New Processor Architecture for Digital Signal Transport Systems. Minoru Inamori, Kenji Ishii, Akihiro Tsutsui, Kazuhiro Shirakawa, Hiroshi Nakada, Toshiaki Miyazaki |
| 1997 | A Novel Test Set Design for Parametric Testing of Analog and Mixed-Signal Circuits. Jin Chen, Akhileswaran Ramachandran |
| 1997 | A Parallel Circuit-Partitioned Algorithm for Timing Driven Cell Placement. John A. Chandy, Prithviraj Banerjee |
| 1997 | A Pulse-To-Static Conversion Latch with a Self-Timed Control Circuit. Wei Hwang, Rajiv V. Joshi, Walter H. Henkels |
| 1997 | A Repeater Optimization Methodology for Deep Sub-Micron, High Performance Processors. David Li, Andrew Pua, Pranjal Srivastava, Uming Ko |
| 1997 | A Survey of Techniques for Formal Verification of Combinational Circuits. Jawahar Jain, Amit Narayan, Masahiro Fujita, Alberto L. Sangiovanni-Vincentelli |
| 1997 | A TSC Evaluation Function for Combinational Circuits. Cristiana Bolchini, Donatella Sciuto, Fabio Salice |
| 1997 | A Universal Pezaris Array Multiplier Generator for SRAM-Based FPGAs. Jörn Stohmann, Erich Barke |
| 1997 | A new Approach for Initialization Sequences Computation for Synchronous Sequential Circuits. Fulvio Corno, Paolo Prinetto, Maurizio Rebaudengo, Matteo Sonza Reorda, Giovanni Squillero |
| 1997 | Allocation and Data Arrival Design of Hard Real-time Systems. David L. Rhodes, Wayne H. Wolf |
| 1997 | An Approach to Network Caching for Multimedia Objects. Michael Kozuch, Wayne H. Wolf, Andrew Wolfe |
| 1997 | An Architectural Power Optimization Case Study using High-level Synthesis. Chih-Tung Chen, Kayhan Küçükçakar |
| 1997 | An Efficient Multi-Way Algorithm for Balanced Partitioning of VLSI Circuits. X. Tan, J. Tong, P. Tan, Nohpill Park, Fabrizio Lombardi |
| 1997 | An Evaluation of Asynchronous and Synchronous Design for Superscalar Architectures. Andrew Davey, David Lloyd |
| 1997 | An Integrated Placement and Synthesis Approach for Timing Closure of PowerPC Microprocessors. Shervin Hojat, Paul Villarrubia |
| 1997 | Application of a Testing Framework to VHDL Descriptions at Different Abstraction Levels. M. Bacis, Giacomo Buonanno, Fabrizio Ferrandi, Franco Fummi, Luca Gerli, Donatella Sciuto |
| 1997 | Architectural Adaptation for Application-Specific Locality Optimization. Xingbin Zhang, Ali Dasdan, Martin Schulz, Rajesh K. Gupta, Andrew A. Chien |
| 1997 | Asnchronous Wrapper for Heterogeneous Systems. David S. Bormann, Peter Y. K. Cheung |
| 1997 | Asynchronous Transpose-Matrix Architectures. José A. Tierno, Prabhakar Kudva |
| 1997 | BIST-Based Fault Diagnosis in the Presence of Embedded Memories. Jacob Savir |
| 1997 | Benchmarking and Analysis of Architectures for CAD Applications. Amit Mehrotra, Shaz Qadeer, Rajeev K. Ranjan, Randy H. Katz |
| 1997 | Built-In Temperature Sensors for On-line Thermal Monitoring of Microelectronic Structures. Karim Arabi, Bozena Kaminska |
| 1997 | Built-in Self Test for Contect Addressable Memories. Yong Seok Kang, Jong Cheol Lee, Sungho Kang |
| 1997 | CMOS Gate Delay Models for General RLC Loading. Ravishankar Arunachalam, Florentin Dartu, Lawrence T. Pileggi |
| 1997 | Channel Segmentation Design for Symmentrical FPGAs. Wai-Kei Mak, D. F. Wong |
| 1997 | Checking Formal Specifications under Simulation. William Canfield, E. Allen Emerson, Avijit Saha |
| 1997 | Circuit-Based Description and Modeling of Electromagnetic Noise Effects in Packaged Low-Power Electronics. Andreas C. Cangellaris, W. Pinello, Albert E. Ruehli |
| 1997 | Clustering and Load Balancing for Buffered Clock Tree Synthesis. Ashih D. Mehta, Yao-Ping Chen, Noel Menezes, D. F. Wong, Lawrence T. Pileggi |
| 1997 | Comparison between nMos Pass Transistor logic style vs. CMOS Complementary Cells. Rakesh Mehrotra, Massoud Pedram, Xunwei Wu |
| 1997 | Continuous Retiming: Algorithms and Applications. Peichen Pan |
| 1997 | Critical Voltage Transition Logic: An Ultrafast CMOS Logic Family. Zhang Zhu, Bradley S. Carlson |
| 1997 | Crosstalk-Constrained Maze Routing Based on Lagrangian Relaxation. Hai Zhou, D. F. Wong |
| 1997 | Design Methodology for the High-Performance G4 S/390. Kenneth L. Shepard, Sean M. Carey, Daniel K. Beece, Robert F. Hatch, Gregory A. Northrop |
| 1997 | Design Optimization for High-speed Per-address Two-level Branch Predictors. I-Cheng K. Chen, Chih-Chieh Lee, Matt Postiff, Trevor N. Mudge |
| 1997 | Design and Implementation of Low-Power Digit-Serial Multipliers. Yun-Nan Chang, Janardhan H. Satyanarayana, Keshab K. Parhi |
| 1997 | Design and Performance Evaluation of a Cache Assist to implement Selective Caching. Lizy Kurian John, Akila Subramanian |
| 1997 | Design and Test: The Lost World. William H. Joyner Jr. |
| 1997 | Development of Hierarchical Testability Design Methodologies for Analog/Mixed-Signal Integrated Circuits. Cheng-Ping Wang, Chin-Long Wey |
| 1997 | Development of a High Bandwidth Merged Logic/DRAM Multimedia Chip. W. K. Luk, Yasunao Katayama, Wei Hwang, Matthew R. Wordeman, Toshiaki Kirihata, Akashi Satoh, Seiji Munetoh, Hing Wong, B. El-Kareh, P. Xiao, Rajiv V. Joshi |
| 1997 | Discrete Drive Selection for Continuous Sizing. Ramsey W. Haddad, Lukas P. P. P. van Ginneken, Narendra V. Shenoy |
| 1997 | Divide & Conquer: A Strategy for Synthesis of Low Power Finite State Machines. Aurobindo Dasgupta, Shantanu Ganguly |
| 1997 | Dynamic Bounding of Successor Force Computations in the Force Directed List Scheduling Algorithms. Sriram Govindarajan, Ranga Vemuri |
| 1997 | Dynamic Reordering in a Breadth-First Manipulation Based BDD Package: Challenges and Solutions. Rajeev K. Ranjan, Wilsin Gosti, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli |
| 1997 | Effect of Message Length and Processor Speed on the Performance of the Bidirectional Ring-Based Multiprocessor. Hitoshi Oi, N. Ranganathan |
| 1997 | Elastic History Buffer: A Low-Cost Method to Improve Branch Prediction Accuracy. Maria-Dana Tarlescu, Kevin B. Theobald, Guang R. Gao |
| 1997 | Enhanced Compression Techniques to Simplify Programm Decompression and Execution. Maurício Breternitz Jr., Roger Smith |
| 1997 | Equivalence Checking Using Abstract BDDs. Somesh Jha, Yuan Lu, Marius Minea, Edmund M. Clarke |
| 1997 | Estimation of Maximum Power for Sequential Circuits Considering Spurious Transitions. Chuan-Yu Wang, Kaushik Roy |
| 1997 | Fast Cache Access with Full-Map Block Directory. Jih-Kwon Peir, Windsor W. Hsu |
| 1997 | Fast Generation of Statistically-based Worst-Case Modeling of On-Chip Interconnect. Norman Chang, Valery Kanevsky, O. Sam Nakagawa, Khalid Rahmat, Soo-Young Oh |
| 1997 | Fast Low-Energy VLSI Binary Addition. Keshab K. Parhi |
| 1997 | First Test Results of System Level Fault Tolerant Design Validation Through Laser Fault Injection. Wilfrido Alejandro Moreno, Fernando J. Falquez, John R. Samson Jr., Thomas Smith |
| 1997 | Formal Implementation Verification of the Bus Interface Unit for the Alpha 21264 Microprocessor. Gabriel P. Bischoff, Karl S. Brace, Samir Jain, Rahul Razdan |
| 1997 | Formal Verification of the HAL S1 System Cache Coherence Protocol. Alan J. Hu, Masahiro Fujita, Chris Wilson |
| 1997 | Formally Specifying and Mechanically Verifying Programs for the Motorola Complex Arithmetic Processor DSP. Bishop Brock, Warren A. Hunt Jr. |
| 1997 | High Level Test Synthesis Across the Boundary of Behavioral and Structural Domains. Kowen Lai, Christos A. Papachristou, Mikhail Baklashov |
| 1997 | High-Level Design Synthesis of a Low Power, VLIW Processor for the IS-54 VSELP Speech Encoder. Russell E. Henning, Chaitali Chakrabarti |
| 1997 | High-Performance CMOS Circuit Techniques for the G-4 S/390 Microprocessor. James D. Warnock, Leon J. Sigal, Brian W. Curran, Yuen H. Chan |
| 1997 | Improving Design Turnaround Time via Two-Levels Hw/Sw Co-Simulation. Alberto Allara, S. Filipponi, William Fornaciari, Fabio Salice, Donatella Sciuto |
| 1997 | Instruction Prefetching Using Branch Prediction Information. I-Cheng K. Chen, Chih-Chieh Lee, Trevor N. Mudge |
| 1997 | Integrated Diagnostics for Embedded Memory Built-in Self Test on Power PC Craig Hunter |
| 1997 | Intelligent RAM (IRAM): The Industrial Setting, Applications and Architectures. David A. Patterson, Krste Asanovic, Aaron B. Brown, Richard Fromm, Jason Golbus, Benjamin Gribstad, Kimberly Keeton, Christoforos E. Kozyrakis, David R. Martin, Stylianos Perissakis, Randi Thomas, Noah Treuhaft, Katherine A. Yelick |
| 1997 | Intertwined Development and Formal Verification of a 60x Bus Model. Matt Kaufmann, Carl Pixley |
| 1997 | Is Wireless Data Dead? Randy H. Katz |
| 1997 | Memory Traffic and Data Cache Behavior of an MPEG-2 Software Decoder. Peter Soderquist, Miriam Leeser |
| 1997 | Multi-Column Implementations for Cache Associativity. Chenxi Zhang, Xiaodong Zhang, Yong Yan |
| 1997 | Nonenumerative Path Delay Fault Coverage Estimation with Optimal Algorithms. Dimitrios Kagaris, Spyros Tragoudas, Dimitrios Karayiannis |
| 1997 | Novel Simulation of Deep-Submicron MOSFET Circuits. Serban Bruma, Ralph H. J. M. Otten |
| 1997 | On Complexity Reduction of FIR Digital Filters Using Constrained Least Squares Solution. Khurram Muhammad, Kaushik Roy |
| 1997 | On Effective Data Supply For Multi-Issue Processors. Jude A. Rivers, Edward S. Tam, Edward S. Davidson |
| 1997 | On the Construction of Universal Series-Parallel Functions for Logic Module Design. Fung Yu Young, D. F. Wong |
| 1997 | Optimal Clock Period Clustering for Sequential Circuits with Retiming. Arvind K. Karandikar, Peichen Pan, C. L. Liu |
| 1997 | Optimizing CMOS Implementations of the C-element. Maitham Shams, Jo C. Ebergen, Mohamed I. Elmasry |
| 1997 | PA-8000: A Case Study of Static and Dynamic Branch Prediction. Carl Burch |
| 1997 | PROPHID: A Heterogeneous Multi-Processor Architecture for Multimedia. Jeroen A. J. Leijten, Jef L. van Meerbergen, Adwin H. Timmer, Jochen A. G. Jess |
| 1997 | Parallel-Array Implementations of a Non-Restoring Square Root Algorithm. Yamin Li, Wanming Chu |
| 1997 | Partitioning Under Timing and Area Constraints. Gregory Tumbush, Dinesh Bhatia |
| 1997 | Post Layout Speed-up by Event Elimination. Hirendu Vaishnav, Chi-Keung Lee, Massoud Pedram |
| 1997 | Power Compiler: A Gate-Level Power Optimization and Synthesis System. Benjamin Chen, Ivailo M. Nedelchev |
| 1997 | Power Constrained Design of Multiprocessor Interconnection Networks. Chirag S. Patel, Sek M. Chai, Sudhakar Yalamanchili, David E. Schimmel |
| 1997 | Power Driven Partial Scan. Jing-Yang Jou, Ming-Chang Nien |
| 1997 | Practical Advances in Asynchronous Design. Erik Brunvand, Steven M. Nowick, Kenneth Y. Yun |
| 1997 | Practical Issues of Interconnect Analysis in Deep Submicron Integrated Circuits. Kenneth L. Shepard |
| 1997 | Proceedings 1997 International Conference on Computer Design: VLSI in Computers & Processors, ICCD '97, Austin, Texas, USA, October 12-15, 1997 |
| 1997 | Properties of the Input Pattern Fault Model. Ronald D. Blanton, John P. Hayes |
| 1997 | Pseudo-Random Pattern Testing of Bridging Faults. Nur A. Touba, Edward J. McCluskey |
| 1997 | Real-Time Operating Systems for Embedded Computing. Yanbing Li, Miodrag Potkonjak, Wayne H. Wolf |
| 1997 | Speeding up Variable Reordering of OBDDs. Christoph Meinel, Anna Slobodová |
| 1997 | Synthesis of Delay Verifiable Sequential Circuits using Partial Enhanced Scan. Ramesh C. Tekumalla, Premachandran R. Menon |
| 1997 | Synthesizing Iterative Functions into Delay-Insensitive Tree Circuits. Fu-Chiung Cheng |
| 1997 | TITAC-2: An asynchronous 32-bit microprocessor based on Scalable-Delay-Insensitive model. Akihiro Takamura, Masashi Kuwako, Masashi Imai, Taro Fujii, Motokazu Ozawa, Izumi Fukasaku, Yoichiro Ueno, Takashi Nanya |
| 1997 | Time-Stamped Transition Density for the Estimation of Delay Dependent Switching Activities. Hoon Choi, Seung Ho Hwang |
| 1997 | Timed Binary Decision Diagrams. Zhongcheng Li, Yuhong Zhao, Yinghua Min, Robert K. Brayton |
| 1997 | Transistor-level Sizing and Timing Verification of Domino Circuits in the Power PC Microprocessor. Abhijit Dharchoudhury, David T. Blaauw, Joe Norton, Satyamurthy Pullela, J. Dunning |
| 1997 | Vector Restoration Based Static Compaction of Test Sequences for Synchronous Sequential Circuits. Irith Pomeranz, Sudhakar M. Reddy |