ICCD C

108 papers

YearTitle / Authors
2016"Stubborn" strategy to mitigate remaining cache misses.
Hayato Nomura, Hiroyuki Katchi, Hidetsugu Irie, Shuichi Sakai
201634th IEEE International Conference on Computer Design, ICCD 2016, Scottsdale, AZ, USA, October 2-5, 2016
2016A 64 kb differential single-port 12T SRAM design with a bit-interleaving scheme for low-voltage operation in 32 nm SOI CMOS.
Samira Ataei, James E. Stine, Matthew R. Guthaus
2016A fast, fully verifiable, and hardware predictable ASIC design methodology.
Ping-Lin Yang, Malgorzata Marek-Sadowska
2016A heterogeneous low-cost and low-latency Ring-Chain network for GPGPUs.
Xia Zhao, Sheng Ma, Chen Li, Lieven Eeckhout, Zhiying Wang
2016A model for Application Slowdown Estimation in on-chip networks and its use for improving system fairness and performance.
Xi-Yue Xiang, Saugata Ghose, Onur Mutlu, Nian-Feng Tzeng
2016A new coding scheme for fault tolerant 4-phase delay-insensitive codes.
Florian Huemer, Jakob Lechner, Andreas Steininger
2016A novel approach to parameterized verification of cache coherence protocols.
Yongjian Li, Kaiqiang Duan, Yi Lv, Jun Pang, Shaowei Cai
2016A novel hardware hash unit design for modern microprocessors.
Abbas A. Fairouz, Monther Abusultan, Sunil P. Khatri
2016A novel simulation based approach for trace signal selection in silicon debug.
Prabanjan Komari, Ranga Vemuri
2016A readback based general debugging framework for soft-core processors.
Changgong Li, Alexander Schwarz, Christian Hochberger
2016A single-inductor-cascaded-stage topology for high conversion ratio boost regulator.
Khondker Zakir Ahmed, Saibal Mukhopadhyay
2016A statistical critical path monitor in 14nm CMOS.
Bruce M. Fleischer, Christos Vezyrtzis, Karthik Balakrishnan, Keith A. Jenkins
2016A strong arbiter PUF using resistive RAM within 1T-1R memory architecture.
Rekha Govindaraj, Swaroop Ghosh
2016AIBA: An Automated Intra-cycle Behavioral Analysis for SystemC-based design exploration.
Mehran Goli, Jannis Stoppe, Rolf Drechsler
2016Accelerating pointer chasing in 3D-stacked memory: Challenges, mechanisms, evaluation.
Kevin Hsieh, Samira Manabi Khan, Nandita Vijaykumar, Kevin K. Chang, Amirali Boroumand, Saugata Ghose, Onur Mutlu
2016Adaptive and flexible key-value stores through soft data partitioning.
Byungchul Hong, Yongkee Kwon, Jung Ho Ahn, John Kim
2016Algorithms for CPU and DRAM DVFS under inefficiency constraints.
Rizwana Begum, Mark Hempstead, Guru Prasad Srinivasa, Geoffrey Challen
2016An adaptive Non-Uniform Loop Tiling for DMA-based bulk data transfers on many-core processor.
Keni Qiu, Yuanhui Ni, Weigong Zhang, Jing Wang, Xiaoqiang Wu, Chun Jason Xue, Tao Li
2016BADGR: A practical GHR implementation for TAGE branch predictors.
David J. Schlais, Mikko H. Lipasti
2016BDR: A Balanced Data Redistribution scheme to accelerate the scaling process of XOR-based Triple Disk Failure Tolerant arrays.
Yanbing Jiang, Chentao Wu, Jie Li, Minyi Guo
2016BEOL stack-aware routability prediction from placement using data mining techniques.
Wei-Ting Jonas Chan, Yang Du, Andrew B. Kahng, Siddhartha Nath, Kambiz Samadi
2016CCAS: Contention and congestion aware switch allocation for network-on-chips.
Cunlu Li, Dezun Dong, Xiangke Liao, Fei Lei, Ji Wu
2016CHARM: A checkpoint-based resource management framework for reliable multicore computing in the dark silicon era.
Venkata Yaswanth Raparti, Nishit Ashok Kapadia, Sudeep Pasricha
2016CNFET-based high throughput register file architecture.
Tianjian Li, Li Jiang, Naifeng Jing, Nam Sung Kim, Xiaoyao Liang
2016CNN-MERP: An FPGA-based memory-efficient reconfigurable processor for forward and backward propagation of convolutional neural networks.
Xushen Han, Dajiang Zhou, Shihao Wang, Shinji Kimura
2016Chain-based pseudorandom tests for pre-silicon verification of CMP memory systems.
Gabriel A. G. Andrade, Marleson Graf, Luiz C. V. dos Santos
2016CloudSocket: Smart grid platform for datacenters.
Seil Lee, Hanjoo Kim, Seongsik Park, Sei Joon Kim, Hyeokjun Choe, Chang-Sung Jeong, Sungroh Yoon
2016Concurrent Migration of Multiple Pages in software-managed hybrid main memory.
Santiago Bock, Bruce R. Childers, Rami G. Melhem, Daniel Mossé
2016Cryptographic vote-stealing attacks against a partially homomorphic e-voting architecture.
Nektarios Georgios Tsoutsos, Michail Maniatakos
2016Ctrl-C: Instruction-Aware Control Loop Based Adaptive Cache Bypassing for GPUs.
Shin-Ying Lee, Carole-Jean Wu
2016CyHOP: A generic framework for real-time power-performance optimization in networked wearable motion sensors.
Ramin Fallahzadeh, Hassan Ghasemzadeh
2016DLL: A dynamic latency-aware load-balancing strategy in 2.5D NoC architecture.
Chen Li, Sheng Ma, Lu Wang, Zicong Wang, Xia Zhao, Yang Guo
2016DOART: A low-power and low-latency Network-on-Chip.
Wen Zong, Qiang Xu
2016DSCNN: Hardware-oriented optimization for Stochastic Computing based Deep Convolutional Neural Networks.
Zhe Li, Ao Ren, Ji Li, Qinru Qiu, Yanzhi Wang, Bo Yuan
2016Data placement across the cache hierarchy: Minimizing data movement with reuse-aware placement.
Andreas Sembrant, Erik Hagersten, David Black-Schaffer
2016Data-Pattern enabled Self-Recovery multimedia storage system for near-threshold computing.
Na Gong, Jonathon Edstrom, Dongliang Chen, Jinhui Wang
2016Design automation of multiple-demand mixture preparation using a K-array rotary mixer on digital microfluidic biochips.
Satendra Kumar, Ankur Gupta, Sudip Roy, Bhargab B. Bhattacharya
2016Design techniques of eNVM-enabled neuromorphic computing systems.
Chang Song, Beiye Liu, Chenchen Liu, Hai Li, Yiran Chen
2016Dynamic converter reconfiguration for near-threshold non-volatile processors using in-door energy harvesting.
Caiwen Ding, Hongjia Li, Jingtong Hu, Yongpan Liu, Yanzhi Wang
2016Dynamic prefetcher reconfiguration for diverse memory architectures.
Junghoon Lee, Taehoon Kim, Jaehyuk Huh
2016Dynamic single and Dual Rail spin transfer torque look up tables with enhanced robustness under CMOS and MTJ process variations.
Aliyar Attaran, Hassan Salmani, Houman Homayoun, Hamid Mahmoodi
2016Efficient mode changes in multi-mode systems.
Akramul Azim, Sebastian Fischmeister
2016Efficient processor allocation in a reconfigurable CMP architecture for dark silicon era.
Fatemeh Aghaaliakbari, Mohaddeseh Hoveida, Mohammad Arjomand, Majid Jalili, Hamid Sarbazi-Azad
2016Enabling technologies for memory compression: Metadata, mapping, and prediction.
Arjun Deb, Paolo Faraboschi, Ali Shafiee, Naveen Muralimanohar, Rajeev Balasubramonian, Robert Schreiber
2016Energy aware routing of multi-level Network-on-Chip traffic.
Vasil Pano, Isikcan Yilmaz, Ankit More, Baris Taskin
2016Energy-aware scheduling of conditional task graphs with deadlines on MPSoCs.
Umair Ullah Tariq, Hui Wu
2016Error behaviors testing with temperature and magnetism dependency for MRAM.
Xin Shi, Fei Wu, Xidong Guan, Changsheng Xie
2016Exploiting cache coherence for effective on-the-fly data tracing in multicores.
Mounika Ponugoti, Aleksandar Milenkovic
2016Exploring static and dynamic flash-based FPGA design topologies.
Monther Abusultan, Sunil P. Khatri
2016Extending On-chip Interconnects for rack-level remote resource access.
Yisong Chang, Ke Zhang, Sally A. McKee, Lixin Zhang, Mingyu Chen, Liqiang Ren, Zhiwei Xu
2016FPGA Trust Zone: Incorporating trust and reliability into FPGA designs.
Vinayaka Jyothi, Manasa Thoonoli, Richard Stern, Ramesh Karri
2016Fast register consolidation and migration for heterogeneous multi-core processors.
Elliott Forbes, Eric Rotenberg
2016Fluid Pipelines: Elastic circuitry meets Out-of-Order execution.
Rafael Trapani Possignolo, Elnaz Ebrahimi, Haven Blake Skinner, Jose Renau
2016Frame-based and thread-based power management for mobile games on HMP platforms.
Nadja Peters, Dominik Fuss, Sangyoung Park, Samarjit Chakraborty
2016Generating efficient and high-quality pseudo-random behavior on Automata Processors.
Jack Wadden, Nathan Brunelle, Ke Wang, Mohamed El-Hadedy, Gabriel Robins, Mircea Stan, Kevin Skadron
2016Guided lightweight Software test qualification for IP integration using Virtual Prototypes.
Daniel Große, Hoang M. Le, Muhammad Hassan, Rolf Drechsler
2016HS-BAS: A hybrid storage system based on band awareness of Shingled Write Disk.
Wenjian Xiao, Huanqing Dong, Liuying Ma, Zhenjun Liu, Qiang Zhang
2016Hardware thread reordering to boost OpenCL throughput on FPGAs.
Amir Momeni, Hamed Tabkhi, Gunar Schirner, David R. Kaeli
2016Hardware-based attacks to compromise the cryptographic security of an election system.
Mohammad-Mahdi Bidmeshki, Gaurav Rajavendra Reddy, Liwei Zhou, Jeyavijayan Rajendran, Yiorgos Makris
2016Hippogriff: Efficiently moving data in heterogeneous computing systems.
Yang Liu, Hung-Wei Tseng, Mark Gahagan, Jing Li, Yanqin Jin, Steven Swanson
2016How logic masking can improve path delay analysis for Hardware Trojan detection.
Arash Nejat, David Hély, Vincent Beroulle
2016IACM: Integrated adaptive cache management for high-performance and energy-efficient GPGPU computing.
Kyu Yeun Kim, Jinsu Park, Woongki Baek
2016Implementing low power digital circuits using flash devices.
Monther Abusultan, Sunil P. Khatri
2016Improving performance per Watt of non-monotonic Multicore Processors via bottleneck-based online program phase classification.
Sudarshan Srinivasan, Israel Koren, Sandip Kundu
2016Isolation-based decorrelation of stochastic circuits.
Pai-Shun Ting, John P. Hayes
2016Luminescent solar concentrator-based photovoltaic reconfiguration for hybrid and plug-in electric vehicles.
Caiwen Ding, Hongjia Li, Weiwei Zheng, Yanzhi Wang, Naehyuck Chang, Xue Lin
2016Lumos+: Rapid, pre-RTL design space exploration on accelerator-rich heterogeneous architectures with reconfigurable logic.
Liang Wang, Kevin Skadron
2016MASkIt: Soft error rate estimation for combinational circuits.
Martí Anglada, Ramon Canal, Juan L. Aragón, Antonio González
2016MFAP: Fair Allocation between fully backlogged and non-fully backlogged applications.
Yan Sui, Chun Yang, Dong Tong, Xianhua Liu, Xu Cheng
2016Machine learning classifiers using stochastic logic.
Yin Liu, Hariharasudhan Venkataraman, Zisheng Zhang, Keshab K. Parhi
2016Memos: A full hierarchy hybrid memory management framework.
Lei Liu, Hao Yang, Yong Li, Mengyao Xie, Lian Li, Chenggang Wu
2016Novel approximate synthesis flow for energy-efficient FIR filter.
Yesung Kang, Jaewoo Kim, Seokhyeong Kang
2016ONAC: Optimal number of active cores detector for energy efficient GPU computing.
Xian Zhu, Mihir Awatramani, Diane T. Rover, Joseph Zambreno
2016Parallelizing Latent Semantic Indexing using an FPGA-based architecture.
Xinying Wang, Joseph Zambreno
2016Power-aware virtual machine mapping in the data-center-on-a-chip paradigm.
Xue Lin, Yuankun Xue, Paul Bogdan, Yanzhi Wang, Siddharth Garg, Massoud Pedram
2016Process variations-aware resistive associative processor design.
Hasan Erdem Yantir, Mohammed E. Fouda, Ahmed M. Eltawil, Fadi J. Kurdahi
2016Pull-off buffer: Borrowing cache space to avoid deadlock for fault-tolerant NoC routing.
Airan Shao, Dongsheng Wang, Haixia Wang
2016Quantifying the difference in resource demand among classic and modern NoC workloads.
Amirhossein Mirhosseini, Mohammad Sadrosadati, Maryam Zare, Hamid Sarbazi-Azad
2016Refresh-aware loop scheduling for high performance low power volatile STT-RAM.
Keni Qiu, Junpeng Luo, Zhiyao Gong, Weigong Zhang, Jing Wang, Yuanchao Xu, Tao Li, Chun Jason Xue
2016Relinquishment coherence for enhancing directory efficiency in chip multiprocessors.
Wei Shu, Nian-Feng Tzeng
2016SPMario: Scale up MapReduce with I/O-Oriented Scheduling for the GPU.
Yang Liu, Hung-Wei Tseng, Steven Swanson
2016SRAM memory margin probability failure estimation using Gaussian Process regression.
Manish Rana, Ramon Canal, Jie Han, Bruce F. Cockburn
2016SRAM stability analysis for different cache configurations due to Bias Temperature Instability and Hot Carrier Injection.
Taizhi Liu, Chang-Chih Chen, Jiadong Wu, Linda S. Milor
2016Scalable memory architecture for soft-core processors.
Tiago T. Jost, Gabriel L. Nazar, Luigi Carro
2016Scalable memory fabric for silicon interposer-based multi-core systems.
Itir Akgun, Jia Zhan, Yuangang Wang, Yuan Xie
2016Shuffling across rounds: A lightweight strategy to counter side-channel attacks.
Sikhar Patranabis, Debapriya Basu Roy, Praveen Kumar Vadnala, Debdeep Mukhopadhyay, Santosh Ghosh
2016Speculative path power estimation using trace-driven simulations during high-level design phase.
Saumya Chandra, Ramkumar Jayaseelan, Ravi Bhargava
2016Stochastic neuromorphic learning machines for weakly labeled data.
Emre Neftci
2016Strategies for optimal operating point selection in timing speculative processors.
Omid Assare, Rajesh K. Gupta
2016Synthesis design strategies for energy-efficient microprocessors.
Ching Zhou, Yu-Shiang Lin, Pong-Fei Lu, Bruce M. Fleischer, David J. Frank, Leland Chang
2016TESLA: Using microfluidics to thermally stabilize 3D stacked STT-RAM caches.
Majed Valad Beigi, Gokhan Memik
2016The power play: Security-energy trade-offs in the IoT regime.
Sandip Ray, Tamzidul Hoque, Abhishek Basak, Swarup Bhunia
2016Thermal-aware 3D design for side-channel information leakage.
Peng Gu, Dylan C. Stow, Russell Barnes, Eren Kursun, Yuan Xie
2016Tolerating more hard errors in MLC PCMs using compression.
Majid Jalili, Hamid Sarbazi-Azad
2016Towards a timing attack aware high-level synthesis of integrated circuits.
Steffen Peter, Tony Givargis
2016Tuning Stencil codes in OpenCL for FPGAs.
Qi Jia, Huiyang Zhou
2016Ultra-low energy security circuits for IoT applications.
Sudhir Satpathy, Sanu Mathew, Vikram B. Suresh, Ram Krishnamurthy
2016Understanding and alleviating intra-die and intra-DIMM parameter variation in the memory system.
Meysam Taassori, Ali Shafiee, Rajeev Balasubramonian
2016Unveiling difficult bugs in address translation caching arrays for effective post-silicon validation.
George Papadimitriou, Dimitris Gizopoulos, Athanasios Chatzidimitriou, Tom Kolan, Anatoly Koyfman, Ronny Morad, Vitali Sokhin
2016Using Provenance to boost the Metadata Prefetching in distributed storage systems.
Guojin Wu, Yuhui Deng, Xiao Qin
2016VARIUS-TC: A modular architecture-level model of parametric variation for thin-channel switches.
S. Karen Khatamifard, Michael Resch, Nam Sung Kim, Ulya R. Karpuzcu
2016Voting system design pitfalls: Vulnerability analysis and exploitation of a model platform.
Kelvin Ly, Orlando Arias, Jacob Wurm, Khoa Hoang, Kaveh Shamsi, Yier Jin
2016WILD: A workload-based learning model to predict dynamic delay of functional units.
Xun Jiao, Yu Jiang, Abbas Rahimi, Rajesh K. Gupta
2016What does ultra low power requirements mean for side-channel secure cryptography?
Monodeep Kar, Arvind Singh, Anand Rajan, Vivek De, Saibal Mukhopadhyay
2016Wireless Network-on-Chip analysis of propagation technique for on-chip communication.
Vasil Pano, Isikcan Yilmaz, Yuqiao Liu, Baris Taskin, Kapil R. Dandekar
2016nOS: A nano-sized distributed operating system for many-core embedded systems.
Simon J. Hollis, Edward Ma, Radu Marculescu
2016×86 computer architecture simulators: A comparative study.
Ayaz Akram, Lina Sawalha