ICCD C

100 papers

YearTitle / Authors
201230th International IEEE Conference on Computer Design, ICCD 2012, Montreal, QC, Canada, September 30 - Oct. 3, 2012
20123D-NoC: Reconfigurable 3D photonic on-chip interconnect for multicores.
Randy Morris, Avinash Karanth Kodi, Ahmed Louri
2012A 3D stacked high performance scalable architecture for 3D Fourier Transform.
George Razvan Voicu, Marius Enachescu, Sorin Dan Cotofana
2012A PRET microarchitecture implementation with repeatable timing and competitive performance.
Isaac Liu, Jan Reineke, David Broman, Michael Zimmer, Edward A. Lee
2012A case for small row buffers in non-volatile main memories.
Justin Meza, Jing Li, Onur Mutlu
2012A comparative study of wearout mechanisms in state-of-art microprocessors.
Chang-Chih Chen, Fahad Ahmed, Linda Milor
2012A flexible structure of standard cell and its optimization method for near-threshold voltage operation.
Shinichi Nishizawa, Tohru Ishihara, Hidetoshi Onodera
2012A high-performance, low-overhead microarchitecture for secure program execution.
Arun K. Kanuparthi, Ramesh Karri, Gaston Ormazabal, Sateesh Addepalli
2012A novel profiled side-channel attack in presence of high Algorithmic Noise.
Mostafa M. I. Taha, Patrick Schaumont
2012A novel variation-tolerant 4T-DRAM cell with enhanced soft-error tolerance.
Shrikanth Ganapathy, Ramon Canal, Dan Alexandrescu, Enrico Costenaro, Antonio González, Antonio Rubio
2012A physical unclonable function based on setup time violation.
David Hély, Maurin Augagneur, Yves Clauzel, Jeremy Dubeuf
2012A polynomial time flow for implementing free-choice Petri-nets.
Pavlos M. Mattheakis, Christos P. Sotiriou, Peter A. Beerel
2012A retrospective look at xpipes: The exciting ride from a design experience to a design platform for nanoscale networks-on-chip.
Davide Bertozzi, Luca Benini
2012A spectral transform approach to stochastic circuits.
Armin Alaghi, John P. Hayes
2012A stochastic reconfigurable architecture for fault-tolerant computation with sequential logic.
Peng Li, Weikang Qian, David J. Lilja
2012Acceleration of Monte-Carlo molecular simulations on hybrid computing architectures.
Claus Braun, Stefan Holst, Hans-Joachim Wunderlich, Juan Manuel Castillo-Sanchez, Joachim Gross
2012Adaptable intrusion detection using partial runtime reconfiguration.
Mehryar Rahmatian, Hessam Kooti, Ian G. Harris, Elaheh Bozorgzadeh
2012Adaptive Backpressure: Efficient buffer management for on-chip networks.
Daniel U. Becker, Nan Jiang, George Michelogiannakis, William J. Dally
2012Adaptive memory architecture for real-time image warping.
Andy Motten, Luc Claesen, Yun Pan
2012An efficient arithmetic Sum-of-Product (SOP) based multiplication approach for FIR filters and DFT.
Rajeev Kumar, Ayan Mandal, Sunil P. Khatri
2012An efficient reliability simulation flow for evaluating the hot carrier injection effect in CMOS VLSI circuits.
Mehdi Kamal, Qing Xie, Massoud Pedram, Ali Afzali-Kusha, Saeed Safari
2012Analyzing the optimal ratio of SRAM banks in hybrid caches.
Alejandro Valero, Julio Sahuquillo, Salvador Petit, Pedro López, José Duato
2012Architectural impact of secure socket layer on Internet servers.
Krishna Kant, Ravishankar K. Iyer, Prasant Mohapatra
2012Architectural impact of secure socket layer on Internet servers: A retrospect.
Krishna Kant, Ravishankar K. Iyer, Prasant Mohapatra
2012Architectural simulations of a fast, source-synchronous ring-based Network-on-Chip design.
Ayan Mandal, Sunil P. Khatri, Rabi N. Mahapatra
2012Architecture and design flow for a debug event distribution interconnect.
Arnaldo Azevedo, Bart Vermeulen, Kees Goossens
2012Aurora: A thermally resilient photonic network-on-chip architecture.
Amer Qouneh, Zhongqi Li, Madhura Joshi, Wangyuan Zhang, Xin Fu, Tao Li
2012Automatic assertion extraction in gate-level simulation using GPGPUs.
Shohei Ono, Takeshi Matsumoto, Masahiro Fujita
2012BIXBAR: A low cost solution to support dynamic link reconfiguration in networks on chip.
Pablo Abad Fidalgo, Pablo Prieto, Valentin Puente, José-Ángel Gregorio
2012Balancing performance and fault detection for GPGPU workloads.
Jerry Backer, Ramesh Karri
2012Clock mesh synthesis method using the Earth Mover's Distance under transformations.
Ying Teng, Baris Taskin
2012Cloud computing: Virtualization and resiliency for data center computing.
Valentina Salapura
2012CoNA: Dynamic application mapping for congestion reduction in many-core systems.
Mohammad Fattah, Marco Ramírez, Masoud Daneshtalab, Pasi Liljeberg, Juha Plosila
2012DIPLOMA: Consistent and coherent shared memory over mobile phones.
Jason H. Gao, Anirudh Sivaraman, Niket Agarwal, Haoqi Li, Li-Shiuan Peh
2012DOC: Fast and accurate congestion analysis for global routing.
Yiding Han, Koushik Chakraborty, Sanghamitra Roy
2012Design and evaluation of a delay-based FPGA Physically Unclonable Function.
Aaron Mills, Sudhanshu Vyas, Michael Patterson, Christopher Sabotta, Phillip H. Jones, Joseph Zambreno
2012Design and evaluation of a four-port data cache for high instruction level parallelism reconfigurable processors.
Kiyeon Lee, Moo-Kyoung Chung, Soojung Ryu, Yeon-Gon Cho, Sangyeun Cho
2012Design methodology for sample preparation on digital microfluidic biochips.
Yi-Ling Hsieh, Tsung-Yi Ho, Krishnendu Chakrabarty
2012Designing pipelined delay lines with dynamically-adaptive granularity for low-energy applications.
Christos Vezyrtzis, Yannis P. Tsividis, Steven M. Nowick
2012Distributed thermal-aware task scheduling for 3D Network-on-Chip.
Yingnan Cui, Wei Zhang, Hao Yu
2012DuSCA: A multi-channeling strategy for doubling communication capacity in wireless NoC.
Yi Wang, Dan Zhao, Jian Li
2012Dynamic phase-based tuning for embedded systems using phase distance mapping.
Tosiron Adegbija, Ann Gordon-Ross, Arslan Munir
2012Dynamic warp resizing: Analysis and benefits in high-performance SIMT.
Ahmad Lashgar, Amirali Baniasadi, Ahmad Khonsari
2012ECC string: Flexible ECC management for low-cost error protection of L2 caches.
Jeongkyu Hong, Soontae Kim
2012Efficient code compression for coarse grained reconfigurable architectures.
Moo-Kyoung Chung, Yeon-Gon Cho, Soojung Ryu
2012Efficient verification of out-of-order behaviors with relaxed scoreboards.
Leandro S. Freitas, Gabriel A. G. Andrade, Luiz C. V. dos Santos
2012Embedded way prediction for last-level caches.
Faissal M. Sleiman, Ronald G. Dreslinski, Thomas F. Wenisch
2012Energy modelling of embedded multimedia streaming applications with GStreamer on heterogeneous MPSoC.
Mickael Lanoe, Eric Senn
2012Engineering crossbar based emerging memory technologies.
Sachhidh Kannan, Jeyavijayan Rajendran, Ramesh Karri, Ozgur Sinanoglu
2012Enhancing 3T DRAMs for SRAM replacement under 10nm tri-gate SOI FinFETs.
Zoran Jaksic, Ramon Canal
2012Exploiting microarchitectural redundancy for defect tolerance.
Premkishore Shivakumar, Stephen W. Keckler, Charles R. Moore, Doug Burger
2012Exploiting multi-level scratchpad memories for time-predictable multicore computing.
Yu Liu, Wei Zhang
2012Exposing vulnerabilities of untrusted computing platforms.
Yier Jin, Michail Maniatakos, Yiorgos Makris
2012Fast development of hardware-based run-time monitors through architecture framework and high-level synthesis.
Mohamed Ismail, G. Edward Suh
2012Fast error aware model for arithmetic and logic circuits.
Samy Zaynoun, Muhammed S. Khairy, Ahmed M. Eltawil, Fadi J. Kurdahi, Amin Khajeh
2012Flash correct-and-refresh: Retention-aware error management for increased flash memory lifetime.
Yu Cai, Gulay Yalcin, Onur Mutlu, Erich F. Haratsch, Adrián Cristal, Osman S. Ünsal, Ken Mai
2012FlexRAM: Toward an advanced Intelligent Memory system.
Yi Kang, Wei Huang, Seung-Moon Yoo, Diana Keen, Zhenzhou Ge, Vinh Vi Lam, Pratap Pattnaik, Josep Torrellas
2012FlexRAM: Toward an advanced Intelligent Memory system: A retrospective paper.
Josep Torrellas
2012HPRA: A pro-active Hotspot-Preventive high-performance routing algorithm for Networks-on-Chips.
Elena Kakoulli, Vassos Soteriou, Theocharis Theocharides
2012Hierarchical modeling of Phase Change memory for reliable design.
Zihan Xu, Ketul Sutaria, Chengen Yang, Chaitali Chakrabarti, Yu Cao
2012Improving inclusive cache performance with two-level eviction priority.
Lingda Li, Dong Tong, Zichao Xie, Junlin Lu, Xu Cheng
2012Integration of correct-by-construction BIP models into the MetroII design space exploration flow.
Alena Simalatsar, Liangpeng Guo, Marius Bozga, Roberto Passerone
2012Interface design for synthesized structural hybrid microarchitectural simulators.
Zhuo Ruan, David A. Penry
2012Locating faults in application-dependent interconnects of SRAM based FPGAs.
T. Nandha Kumar, Haider A. F. Almurib, Fabrizio Lombardi
2012MSE minimization and fault-tolerant data fusion for multi-sensor systems.
Atena Roshan Fekr, Majid Janidarmian, Omid Sarbishei, Benjamin Nahill, Katarzyna Radecka, Zeljko Zilic
2012Malicious key emission via hardware Trojan against encryption system.
David Hély, Maurin Augagneur, Yves Clauzel, Jeremy Dubeuf
2012Mamba: A scalable communication centric multi-threaded processor architecture.
Gregory A. Chadwick, Simon W. Moore
2012Maximizing crosstalk-induced slowdown during path delay test.
Dibakar Gope, D. M. H. Walker
2012Memory module-level testing and error behaviors for phase change memory.
Zhe Zhang, Weijun Xiao, Nohhyun Park, David J. Lilja
2012Mitigating NBTI in the physical register file through stress prediction.
Saurabh Kothawade, Dean Michael Ancajas, Koushik Chakraborty, Sanghamitra Roy
2012Modeling economics of LSI design and manufacturing for test design selection.
Hideyuki Ichihara, Noboru Shimizu, Tsuyoshi Iwagaki, Tomoo Inoue
2012Multi-voltage domain clock mesh design.
Can Sitik, Baris Taskin
2012Non-enumerative generation of statistical path delays for ATPG.
Ahish Mysore Somashekar, Spyros Tragoudas, Sreenivas Gangadhar, Rathish Jayabharathi
2012Oblivious routing design for mesh networks to achieve a new worst-case throughput bound.
Guang Sun, Chia-Wei Chang, Bill Lin, Lieguang Zeng
2012Parameterized free space redistribution for engineering change in placement of integrated circuits.
Taraneh Taghavi, Shyam Ramji, Frank Musante, Suhasini Rege
2012Parametric throughput analysis of scenario-aware dataflow graphs.
Morteza Damavandpeyma, Sander Stuijk, Marc Geilen, Twan Basten, Henk Corporaal
2012Phase-based passive stereovision systems dedicated to cortical visual stimulators.
Firas Hawi, Mohamad Sawan
2012Post-layout OPE-predicted redundant wire insertion for clock skew minimization.
Jin-Tai Yan, Zhi-Wei Chen
2012Power-sensitive multithreaded architecture.
John S. Seng, Dean M. Tullsen, George Z. N. Cai
2012Protecting pipelined asynchronous communication channels against single event upsets.
Jakob Lechner, Martin Lampacher
2012Providing cost-effective on-chip network bandwidth in GPGPUs.
Hanjoon Kim, John Kim, Woong Seo, Yeon-Gon Cho, Soojung Ryu
2012RFiop: RF-memory path to address on-package I/O pad and memory controller scalability.
Mario Donato Marino
2012Reinforcement learning based dynamic power management with a hybrid power supply.
Siyu Yue, Di Zhu, Yanzhi Wang, Massoud Pedram
2012Retrospective on "Power-Sensitive Multithreaded Architecture".
John S. Seng, Dean M. Tullsen, George Z. N. Cai
2012Ring oscillator physical unclonable function with multi level supply voltages.
Shohreh Sharif Mansouri, Elena Dubrova
2012Robust optimization of a Chip Multiprocessor's performance under power and thermal constraints.
Mohammad Ghasemazar, Hadi Goudarzi, Massoud Pedram
2012Row buffer locality aware caching policies for hybrid memories.
HanBin Yoon, Justin Meza, Rachata Ausavarungnirun, Rachael Harding, Onur Mutlu
2012SECRET: Selective error correction for refresh energy reduction in DRAMs.
Chung-Hsiang Lin, De-Yu Shen, Yi-Jung Chen, Chia-Lin Yang, Cheng-Yuan Michael Wang
2012SOLE: Speculative one-cycle load execution with scalability, high-performance and energy-efficiency.
Zhen-Hao Zhang, Dong Tong, Xiaoyin Wang, Jiangfang Yi, Keyi Wang
2012Stealth assessment of hardware Trojans in a microcontroller.
Trey Reece, Daniel B. Limbrick, Xiaowen Wang, Bradley T. Kiddie, William H. Robinson
2012System level modeling of real-time embedded software.
Richard Lee, Samar Abdi, Doug Regehr, Frederic Risacher
2012Task model suitable for dynamic load balancing of real-time applications in NoC-based MPSoCs.
Sergio Johann Filho, Alexandra Aguiar, Felipe Gohring de Magalhaes, Oliver B. Longhi, Fabiano Hessel
2012The performance of hypermesh NoCs in FPGAs.
M. Binesh Marvasti, Ted H. Szymanski
2012Thermal characterization of cloud workloads on a power-efficient server-on-chip.
Dragomir Milojevic, Sachin Idgunji, Djordje Jevdjic, Emre Ozer, Pejman Lotfi-Kamran, Andreas Panteli, Andreas Prodromou, Chrysostomos Nicopoulos, Damien Hardy, Babak Falsafi, Yiannakis Sazeides
2012Timing aware partitioning for multi-FPGA based logic simulation using top-down selective hierarchy flattening.
Subramanian Poothamkurissi Swaminathan, Pey-Chang Kent Lin, Sunil P. Khatri
2012Timing-test scheduling for constraint-graph based post-silicon skew tuning.
Mineo Kaneko
2012Track assignment considering crosstalk-induced performance degradation.
Qiong Zhao, Jiang Hu
2012Understanding variance propagation in stochastic computing systems.
Chengguang Ma, Shun'an Zhong, Hua Dang
2012WaveSync: A low-latency source synchronous bypass network-on-chip architecture.
Yoon Seok Yang, Reeshav Kumar, Gwan Choi, Paul Gratz
2012Xpipes: A latency insensitive parameterized network-on-chip architecture for multi-processor SoCs.
Matteo Dall'Osso, Gianluca Biccari, Luca Giovannini, Davide Bertozzi, Luca Benini