| 2003 | 21st International Conference on Computer Design (ICCD 2003),VLSI in Computers and Processors, 13-15 October 2003, San Jose, CA, USA, Proceedings |
| 2003 | A Compact Model for Analysis and Design of On-chip Power Network with Decoupling Capacitors. Payman Zarkesh-Ha, Ken Doniger, William Loh, Dechang Sun, Rick Stephani, Gordon Priebe |
| 2003 | A Dependence Driven Efficient Dispatch Scheme. Sriram Nadathur, Akhilesh Tyagi |
| 2003 | A Method to Find Don't Care Values in Test Sequences for Sequential Circuits. Yoshinobu Higami, Shin-ya Kobayashi, Yuzo Takamatsu, Seiji Kajihara, Irith Pomeranz |
| 2003 | A Microeconomic Model for Simultaneous Gate Sizing and Voltage Scaling for Power Optimization. N. Ranganathan, Ashok K. Murugavel |
| 2003 | A Mixed-Mode Delay-Locked-Loop Architecture. Daniel Eckerbert, Lars J. Svensson, Per Larsson-Edefors |
| 2003 | A Novel Synthesis Strategy Driven by Partial Evaluation Based Circuit Reduction for Application Specific DSP Circuits. Madhubanti Mukherjee, Ranga Vemuri |
| 2003 | A Physical Design Methodology for 1.3GHz SPARC64 Microprocessor. Noriyuki Ito, Hiroaki Komatsu, Yoshiyasu Tanamura, Ryoichi Yamashita, Hiroyuki Sugiyama, Yaroku Sugiyama, Hirofumi Hamamura |
| 2003 | A Simple Yet Effective Merging Scheme for Prescribed-Skew Clock Routing. Rishi Chaturvedi, Jiang Hu |
| 2003 | A Study of Hardware Techniques That Dynamically Exploit Frequent Operands to Reduce Power Consumption in Integer Function Units. Kaushal R. Gandhi, Nihar R. Mahapatra |
| 2003 | A Transparent Voltage Conversion Method and Its Application to a Dual-Supply-Voltage Register File. Nestoras Tzartzanis, William W. Walker |
| 2003 | Advanced EDA Tools for High-Performance Design. Ted Vucurevich |
| 2003 | Aggressive Test Power Reduction Through Test Stimuli Transformation. Ozgur Sinanoglu, Alex Orailoglu |
| 2003 | An Efficient Algorithm for Calculating the Worst-case Delay due to Crosstalk. Venkatesan Rajappan, Sachin S. Sapatnekar |
| 2003 | An Efficient VLIW DSP Architecture for Baseband Processing. Tay-Jyi Lin, Chin-Chi Chang, Chen-Chia Lee, Chein-Wei Jen |
| 2003 | An Energy-Aware Simulation Model and Transaction Protocol for Dynamic Workload Distribution in Mobile Ad Hoc Networks. Farhad Ghasemi-Tari, Peng Rong, Massoud Pedram |
| 2003 | An Improved method for Fast Noise Estimation based on Net Segmentation. Chih-Liang Huang, Aurobindo Dasgupta |
| 2003 | Automatic Generation of Critical-Path Tests for a Partial-Scan Microprocessor. Joel Grodstein, Dilip K. Bhavsar, Vijay Bettada, Richard A. Davies |
| 2003 | Boolean Decomposition Based on Cyclic Chains. Elena Dubrova, Maxim Teslenko, Johan Karlsson |
| 2003 | Bus Architecture Synthesis for Hardware-Software Co-Design of Deep Submicron Systems on Chip. Nattawut Thepayasuwan, Vaishali Damle, Alex Doboli |
| 2003 | CMOS High-Speed I/Os - Present and Future. Ming-Ju Edward Lee, William J. Dally, Ramin Farjad-Rad, Hiok-Tiaq Ng, Ramesh Senthinathan, John H. Edmondson, John W. Poulton |
| 2003 | Care Bit Density and Test Cube Clusters: Multi-Level Compression Opportunities. Bernd Könemann |
| 2003 | Charge-Recycling Voltage Domains for Energy-Efficient Low-Voltage Operation of Digital CMOS Circuits. Saravanan Rajapandian, Zheng Xu, Kenneth L. Shepard |
| 2003 | Cost-Effective Graceful Degradation in Speculative Processor Subsystems: The Branch Prediction Case. Sobeeh Almukhaizim, Thomas Verdel, Yiorgos Makris |
| 2003 | Cost-Efficient Memory Architecture Design of NAND Flash Memory Embedded Systems. Chanik Park, Jaeyu Seo, Dongyoung Seo, Shinhan Kim, Bumsoo Kim |
| 2003 | Design Flow Enhancements for DNA Arrays. Andrew B. Kahng, Ion I. Mandoiu, Sherief Reda, Xu Xu, Alexander Zelikovsky |
| 2003 | Design and Performance of Compressed Interconnects for High Performance Servers. Krishna Kant, Ravishankar K. Iyer |
| 2003 | Design of Resonant Global Clock Distributions. Steven C. Chan, Kenneth L. Shepard, Phillip J. Restle |
| 2003 | Detection of Biological Molecules: From Self-Assembled Films to Self-Integrated Devices. Rastislav Levicky |
| 2003 | Distributed Reorder Buffer Schemes for Low Power. Gurhan Kucuk, Oguz Ergin, Dmitry Ponomarev, Kanad Ghose |
| 2003 | Dynamic Cluster Resizing. José González, Antonio González |
| 2003 | Dynamic Thread Resizing for Speculative Multithreaded Processors. Mohamed M. Zahran, Manoj Franklin |
| 2003 | Dynamically Optimized Synchronous Communication for Low Power System on Chip Designs. Vikas Chandra, Gary D. Carpenter, Jeffrey L. Burns |
| 2003 | Efficient Synthesis of Networks On Chip. Alessandro Pinto, Luca P. Carloni, Alberto L. Sangiovanni-Vincentelli |
| 2003 | Energy Efficient Asymmetrically Ported Register Files. Aneesh Aggarwal, Manoj Franklin |
| 2003 | Enhanced QMM-BEM Solver for 3-D Finite-Domain Capacitance Extraction with Multilayered Dielectrics. Wenjian Yu, Zeyi Wang, Xianlong Hong |
| 2003 | Event-Centric Simulation of Crosstalk Pulse Faults in Sequential Circuits. Marong Phadoongsidhi, Kewal K. Saluja |
| 2003 | Exploiting Microarchitectural Redundancy For Defect Tolerance. Premkishore Shivakumar, Stephen W. Keckler, Charles R. Moore, Doug Burger |
| 2003 | Flow-Based Cell Moving Algorithm for Desired Cell Distribution. Bo-Kyung Choi, Huaiyu Xu, Maogang Wang, Majid Sarrafzadeh |
| 2003 | Fully Differential Receiver Chipset for 40 Gb/s Applications Using GaInAs/InP Single Heterojunction Bipolar Transistors. Kursad Kiziloglu, Shivakumar Seetharaman, K. W. Glass, C. Bil, H. V. Duong, G. Asmanis |
| 2003 | Hardware-Only Compression of Underutilized Address Buses: Design and Performance, Power, and Cost Analysis. Nihar R. Mahapatra, Jiangjiang Liu, Krishnan Sundaresan |
| 2003 | Hardware-based Pointer Data Prefetcher. Shih-Chang Lai, Shih-Lien Lu |
| 2003 | High-Speed Link Design, Then and Now. Mark Horowitz |
| 2003 | Improving Branch Prediction Accuracy in Embedded Processors in the Presence of Context Switches. Sudeep Pasricha, Alexander V. Veidenbaum |
| 2003 | Independent Test Sequence Compaction through Integer Programming. Petros Drineas, Yiorgos Makris |
| 2003 | Interconnect Estimation for FPGAs under Timing Driven Domains. PariVallal Kannan, Dinesh Bhatia |
| 2003 | Interface Synthesis using Memory Mapping for an FPGA Platform. Manev Luthra, Sumit Gupta, Nikil D. Dutt, Rajesh K. Gupta, Alexandru Nicolau |
| 2003 | KnapBind: An Area-Efficient Binding Algorithm for Low-leakage Datapaths. Chandramouli Gopalakrishnan, Srinivas Katkoori |
| 2003 | Low Power Adder with Adaptive Supply Voltage. Hiroaki Suzuki, Woopyo Jeong, Kaushik Roy |
| 2003 | Low Power Multiplication Algorithm for Switching Activity Reduction through Operand Decomposition. Masayuki Ito, David G. Chinnery, Kurt Keutzer |
| 2003 | Low-Density Parity-Check Decoder Architecture for High Throughput Optical Fiber Channels. Anand Selvarathinam, Euncheol Kim, Gwan Choi |
| 2003 | Modeling and Mitigation of Jitter in Multi-Gbps Source-Synchronous I/O Links. Ganesh Balamurugan, Naresh R. Shanbhag |
| 2003 | Multiple Fault Diagnosis Using n-Detection Tests. Zhiyuan Wang, Malgorzata Marek-Sadowska, Kun-Han Tsai, Janusz Rajski |
| 2003 | Multiple Transition Model and Enhanced Boundary Scan Architecture to Test Interconnects for Signal Integrity. Mohammad H. Tehranipour, Nisar Ahmed, Mehrdad Nourani |
| 2003 | Multiple-Vdd Scheduling/Allocation for Partitioned Floorplan. Dongku Kang, Mark C. Johnson, Kaushik Roy |
| 2003 | Non-Crossing OBDDs for Mapping to Regular Circuit Structures. Aiqun Cao, Cheng-Kok Koh |
| 2003 | NpBench: A Benchmark Suite for Control plane and Data plane Applications for Network Processors. Byeong Kil Lee, Lizy Kurian John |
| 2003 | On Combining Pinpoint Test Set Relaxation and Run-Length Codes for Reducing Test Data Volume. Seiji Kajihara, Yasumi Doi, Lei Li, Krishnendu Chakrabarty |
| 2003 | On Reducing Register Pressure and Energy in Multiple-Banked Register Files. Jaume Abella, Antonio González |
| 2003 | Optimal Inductance for On-chip RLC Interconnections. Shidhartha Das, Kanak Agarwal, David T. Blaauw, Dennis Sylvester |
| 2003 | Paradigm Shift For Jitter and Noise In Design and Test > GB/s Communication Systems. Mike Peng Li, Jan B. Wilstrup |
| 2003 | Physical Design of the "2.5D" Stacked System. Yangdong Deng, Wojciech Maly |
| 2003 | Pipelined Multiplicative Division with IEEE Rounding. Guy Even, Peter-Michael Seidel |
| 2003 | Power Efficient Data Cache Designs. Jaume Abella, Antonio González |
| 2003 | Power Fluctuation Minimization During Behavioral Synthesis using ILP-Based Datapath Scheduling. Saraju P. Mohanty, N. Ranganathan, Sunil K. Chappidi |
| 2003 | Power-Time Tradeoff in Test Scheduling for SoCs. Mehrdad Nourani, James Chin |
| 2003 | Precomputation-based Guarding for Dynamic and Leakage Power Reduction. Afshin Abdollahi, Massoud Pedram, Farzan Fallah, Indradeep Ghosh |
| 2003 | Procedures for Identifying Untestable and Redundant Transition Faults in Synchronous Sequential Circuits. Gang Chen, Sudhakar M. Reddy, Irith Pomeranz |
| 2003 | Profiling Interrupt Handler Performance through Kernel Instrumentation. Branden J. Moore, Thomas Slabach, Lambert Schaelicke |
| 2003 | ROAD : An Order-Impervious Optimal Detailed Router for FPGAs. Hasan Arslan, Shantanu Dutt |
| 2003 | Reducing Compilation Time Overhead in Compiled Simulators. Mehrdad Reshadi, Nikil D. Dutt |
| 2003 | Reducing Multimedia Decode Power using Feedback Control. Zhijian Lu, John C. Lach, Mircea R. Stan, Kevin Skadron |
| 2003 | Reducing Operand Transport Complexity of Superscalar Processors using Distributed Register Files. Santithorn Bunchua, D. Scott Wills, Linda M. Wills |
| 2003 | Reducing dTLB Energy Through Dynamic Resizing. Victor Delaluz, Mahmut T. Kandemir, Anand Sivasubramaniam, Mary Jane Irwin, Narayanan Vijaykrishnan |
| 2003 | Routed Inter-ALU Networks for ILP Scalability and Performance. Karthikeyan Sankaralingam, Vincent Ajay Singh, Stephen W. Keckler, Doug Burger |
| 2003 | SAT-Based Algorithms for Logic Minimization. Samir Sapra, Michael Theobald, Edmund M. Clarke |
| 2003 | SCATOMi: Scheduling Driven Circuit Partitioning Algorithm for Multiple FPGAs using Time-multiplexed, Off-chip, Multicasting Interconnection Architecture. Young-Su Kwon, Bong-Il Park, Chong-Min Kyung |
| 2003 | Simplifying SoC design with the Customizable Control Processor Platform. C. Ross Ogilvie, Richard Ray, Robert Devins, Mark Kautzman, Michael Hale, Reinaldo A. Bergamaschi, Bob Lynch, Santosh Gaur |
| 2003 | Spec Based Flip-Flop And Buffer Insertion. Nataraj Akkiraju, Mosur Mohan |
| 2003 | Specifying and Verifying Systems with Multiple Clocks. Edmund M. Clarke, Daniel Kroening, Karen Yorav |
| 2003 | Static Test Compaction for Multiple Full-Scan Circuits. Irith Pomeranz, Sudhakar M. Reddy |
| 2003 | Structural Detection of Symmetries in Boolean Functions. Guoqiang Wang, Andreas Kuehlmann, Alberto L. Sangiovanni-Vincentelli |
| 2003 | Structured ASICs: Opportunities and Challenges. Behrooz Zahiri |
| 2003 | Symbolic Failure Analysis of Custom Circuits due to Excessive Leakage Current. Hui-Yuan Song, S. Bohidar, R. Iris Bahar, Joel Grodstein |
| 2003 | System LSI Implementation Fabrics for the Future (special panel discussion). Sinan Kaptanoglu |
| 2003 | Terascale Computing and BlueGene. William R. Pulleyblank |
| 2003 | Test Data Compression and Compaction for Embedded Test of Nanometer Technology Designs. Janusz Rajski, Jerzy Tyszer |
| 2003 | Test Generation for Non-separable RTL Controller-datapath Circuits using a Satisfiability based Approach. Loganathan Lingappan, Srivaths Ravi, Niraj K. Jha |
| 2003 | Verification of Timed Circuits with Failure Directed Abstractions. Hao Zheng, Chris J. Myers, David Walter, Scott Little, Tomohiro Yoneda |
| 2003 | Virtual Page Tag Reduction for Low-power TLBs. Peter Petrov, Alex Orailoglu |
| 2003 | XMAX: X-Tolerant Architecture for MAXimal Test Compression. Subhasish Mitra, Kee Sup Kim |
| 2003 | xpipes: a Latency Insensitive Parameterized Network-on-chip Architecture For Multi-Processor SoCs. Matteo Dall'Osso, Gianluca Biccari, Luca Giovannini, Davide Bertozzi, Luca Benini |