ICCD C

90 papers

YearTitle / Authors
200220th International Conference on Computer Design (ICCD 2002), VLSI in Computers and Processors, 16-18 September 2002, Freiburg, Germany, Proceedings
2002A 10 Gbps Full-AES Crypto Design with a Twisted-BDD S-Box Architecture.
Sumio Morioka, Akashi Satoh
2002A CAD Tool for System-on-Chip Placement and Routing with Free-Space Optical Interconnect.
Chung-Seok (Andy) Seo, Abhijit Chatterjee
2002A Circuit-Level Implementation of Fast, Energy-Efficient CMOS Comparators for High-Performance Microprocessors.
Oguz Ergin, Kanad Ghose, Gurhan Kucuk, Dmitry Ponomarev
2002A Design Methodology for Application-Specific Real-Time Interfaces.
Stefan Ihmor, Markus Visarius, Wolfram Hardt
2002A Distributed Computation Platform for Wireless Embedded Sensing.
Andreas Savvides, Mani B. Srivastava
2002A Framework for Data Prefetching Using Off-Line Training of Markovian Predictors.
Jinwoo Kim, Krishna V. Palem, Weng-Fai Wong
2002A Low Energy Set-Associative I-Cache with Extended BTB.
Koji Inoue, Vasily G. Moshnyaga, Kazuaki J. Murakami
2002A Low Power Pseudo-Random BIST Technique.
Nadir Z. Basturkmen, Sudhakar M. Reddy, Irith Pomeranz
2002A New Architecture for Signed Radix-2m Pure Array Multipliers.
Eduardo A. C. da Costa, Sergio Bampi, José Monteiro
2002A Standard-Cell Placement Tool for Designs with High Row Utilization.
Xiaojian Yang, Bo-Kyung Choi, Majid Sarrafzadeh
2002A Stream Processor Development Platform.
Ben Serebrin, John D. Owens, Chen H. Chen, Stephen P. Crago, Ujval J. Kapasi, Peter R. Mattson, Jinyung Namkoong, Scott Rixner, William J. Dally
2002A System-Level Solution to Domino Synthesis with 2 GHz Application.
B. Chappell, Xinning Wang, Priyadarsan Patra, Prashant Saxena, J. Vendrell, Satyanarayan Gupta, S. Varadarajan, W. Gomes, S. Hussain, H. Krishnamurthy, M. Venkateshmurthy, S. Jain
2002A Test Processor Concept for Systems-on-a-Chip.
Christian Galke, Matthias Pflanz, Heinrich Theodor Vierhaus
2002Accelerated SAT-based Scheduling of Control/Data Flow Graphs.
Seda Ogrenci Memik, Farzan Fallah
2002Accurate and Efficient Static Timing Analysis with Crosstalk.
I-De Huang, Sandeep K. Gupta, Melvin A. Breuer
2002Adaptive Balanced Computing (ABC) Microprocessor Using Reconfigurable Functional Caches (RFCs).
Huesung Kim, Arun K. Somani, Akhilesh Tyagi
2002Adaptive Pipeline Depth Control for Processor Power-Management.
Aristides Efthymiou, Jim D. Garside
2002An Efficient External-Memory Implementation of Region Query with Application to Area Routing.
Stan Y. Liao, Narendra V. Shenoy, William Nicholls
2002An Extended Class of Sequential Circuits with Combinational Test Generation Complexity.
Michiko Inoue, Chikateru Jinno, Hideo Fujiwara
2002Analysis of Blocking Dynamic Circuits.
Tyler Thorp, Dean Liu
2002Analysis of the Tradeoffs for the Implementation of a High-Radix Logarithm.
José-Alejandro Piñeiro, Milos D. Ercegovac, Javier D. Bruguera
2002Application Specific Embedded Processors for Next Generation Communication Systems.
Ulrich Ramacher
2002Applying Decay Strategies to Branch Predictors for Leakage Energy Savings.
Zhigang Hu, Philo Juang, Kevin Skadron, Douglas W. Clark, Margaret Martonosi
2002Automotive Virtual Integration Platforms: Why's, What's, and How's.
Paolo Giusto, Jean-Yves Brunel, Alberto Ferrari, Eliane Fourgeau, Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli
2002Balancing the Interconnect Topology for Arrays of Processors between Cost and Power.
Esther Y. Cheng, Feng Zhou, Bo Yao, Chung-Kuan Cheng, Ronald L. Graham
2002Branch Behavior of a Commercial OLTP Workload on Intel IA32 Processors.
Murali Annavaram, Trung A. Diep, John Paul Shen
2002Branch Predictor Prediction: A Power-Aware Branch Predictor for High-Performance Processors.
Amirali Baniasadi, Andreas Moshovos
2002Cache Design for Eliminating the Address Translation Bottleneck and Reducing the Tag Area Cost.
Yen-Jen Chang, Feipei Lai, Shanq-Jang Ruan
2002Checking Equivalence for Circuits Containing Incompletely Specified Boxes.
Christoph Scholl, Bernd Becker
2002Combining Dual-Supply, Dual-Threshold and Transistor Sizing for Power Reduction.
Stephanie Augsburger, Borivoje Nikolic
2002Cost-Effective Concurrent Test Hardware Design for Linear Analog Circuits.
Sule Ozev, Alex Orailoglu
2002Data Cache Design Considerations for the Itanium
Terry Lyon, Eric DeLano, Cameron McNairy, Dean Mulla
2002Design Methodology and System for a Configurable Media Embedded Processor Extensible to VLIW Architecture.
Atsushi Mizuno, Kazuyoshi Kohno, Ryuichiro Ohyama, Takahiro Tokuyoshi, Hironori Uetani, Hans Eichel, Takashi Miyamori, Nobu Matsumoto, Masataka Matsui
2002Design of Delay-Insensitive Three Dimension Pipeline Array Multiplier for Image Processing.
Alexander Taubin, Karl Fant, John McCardle
2002Designing an Asynchronous Microcontroller Using Pipefitter.
Ivan Blunno, Luciano Lavagno
2002Don't-Care Identification on Specific Bits of Test Patterns.
Kohei Miyase, Seiji Kajihara, Irith Pomeranz, Sudhakar M. Reddy
2002Dynamic Loop Caching Meets Preloaded Loop Caching - A Hybrid Approach.
Ann Gordon-Ross, Frank Vahid
2002Efficient PEEC-Based Inductance Extraction Using Circuit-Aware Techniques.
Haitian Hu, Sachin S. Sapatnekar
2002Embedded Operating System Energy Analysis and Macro-Modeling.
Tat Kee Tan, Anand Raghunathan, Niraj K. Jha
2002Embedded Protocol Processor for Fast and Efficient Packet Reception.
Tomas Henriksson, Ulf Nordqvist, Dake Liu
2002Environment Synthesis for Compositional Model Checking.
Hong Peng, Yassine Mokhtari, Sofiène Tahar
2002Exact Closed Form Formula for Partial Mutual Inductances of On-Chip Interconnects.
Guoan Zhong, Cheng-Kok Koh
2002Fault Dictionary Size Reduction through Test Response Superposition.
Baris Arslan, Alex Orailoglu
2002Fitted Elmore Delay: A Simple and Accurate Interconnect Delay Model.
Arif Ishaq Abou-Seido, Brian Nowak, Chris C. N. Chu
2002Floating-Point Fused Multiply-Add with Reduced Latency.
Tomás Lang, Javier D. Bruguera
2002From ASIC to ASIP: The Next Design Discontinuity.
Kurt Keutzer, Sharad Malik, A. Richard Newton
2002From IP to Platforms.
Raul Camposano
2002Functional Verification of the IBM zSeries eServer z900 System.
Joerg Walter
2002GPE: A New Representation for VLSI Floorplan Problem.
Chang-Tzu Lin, De-Sheng Chen, Yiwen Wang
2002High Level Functional Verification Closure.
Surrendra Dudani, Jayant Nagda
2002Impact of Scaling on the Effectiveness of Dynamic Power Reduction Schemes.
David Duarte, Narayanan Vijaykrishnan, Mary Jane Irwin, Hyun Suk Kim, Grant McFarland
2002Improving Processor Performance by Simplifying and Bypassing Trivial Computations.
Joshua J. Yi, David J. Lilja
2002Improving the Efficiency of Circuit-to-BDD Conversion by Gate and Input Ordering.
Fadi A. Aloul, Igor L. Markov, Karem A. Sakallah
2002JMA: The Java-Multithreading Architecture for Embedded Processors.
Panit Watcharawitch, Simon W. Moore
2002Legacy SystemC Co-Simulation of Multi-Processor Systems-on-Chip.
Luca Benini, Davide Bertozzi, Davide Bruni, Nicola Drago, Franco Fummi, Massimo Poncino
2002Locating Tiny Sensors in Time and Space: A Case Study.
Lewis Girod, Vladimir Bychkovskiy, Jeremy Elson, Deborah Estrin
2002Low Power Design Methodologies for Mobile Communication.
Ralf Kakerow
2002Low Power Mixed-Mode BIST Based on Mask Pattern Generation Using Dual LFSR Re-Seeding.
Paul M. Rosinger, Bashir M. Al-Hashimi, Nicola Nicolici
2002Low-Power, High-Speed CMOS VLSI Design.
Tadahiro Kuroda
2002Media Processing Applications on the Imagine Stream Processor.
John D. Owens, Scott Rixner, Ujval J. Kapasi, Peter R. Mattson, Brian Towles, Ben Serebrin, William J. Dally
2002Methodologies and Tools for Pipelined On-Chip Interconnect.
Louis Scheffer
2002Modeling Switching Activity Using Cascaded Bayesian Networks for Correlated Input Streams.
Sanjukta Bhanja, N. Ranganathan
2002Models of IP's for Automotive Virtual Integration Platforms.
Paolo Giusto, Jean-Yves Brunel, Alberto Ferrari, Eliane Fourgeau, Luciano Lavagno, Barry O'Rourke, Alberto L. Sangiovanni-Vincentelli, Emanuele Guasto
2002On The Impact of Technology Scaling On Mixed PTL/Static Circuits.
Geun Rae Cho, Tom Chen
2002On the Coverage of Delay Faults in Scan Designs with Multiple Scan Chains.
Irith Pomeranz, Sudhakar M. Reddy
2002On the Detectability of Parametric Faults in Analog Circuits.
Jacob Savir, Zhen Guo
2002Parallel Multiple-Symbol Variable-Length Decoding.
Jari Nikara, Stamatis Vassiliadis, Jarmo Takala, Mihai Sima, Petri Liuha
2002Performance Enhancements to the Active Memory System.
Witawas Srisa-an, Chia-Tien Dan Lo, J. Morris Chang
2002Physical Design Challenges for Billion Transistor Chips.
Patrick Groeneveld
2002Physical Planning Of On-Chip Interconnect Architectures.
Hongyu Chen, Bo Yao, Feng Zhou, Chung-Kuan Cheng
2002Power Analysis of Bipartition and Dual-Encoding Architecture for Pipelined Circuits.
Shanq-Jang Ruan, Edwin Naroska, Chia-Lin Ho, Feipei Lai
2002Power-Constrained Microprocessor Design.
H. Peter Hofstee
2002Power-Performance Trade-Offs for Energy-Efficient Architectures: A Quantitative Study.
Hongbo Yang, Ramaswamy Govindarajan, Guang R. Gao, Kevin B. Theobald
2002Register Binding Based Power Management for High-level Synthesis of Control-Flow Intensive Behaviors.
Lin Zhong, Jiong Luo, Yunsi Fei, Niraj K. Jha
2002Requirements for Automotive System Engineering Tools.
Joachim Schlosser
2002SIMD Extension to VLIW Multicluster Processors for Embedded Applications.
Domenico Barretta, William Fornaciari, Mariagiovanna Sami, Danilo Pau
2002Speculative Trace Scheduling in VLIW Processors.
Manvi Agarwal, S. K. Nandy, Jos T. J. van Eijndhoven, Srinivasan Balakrishnan
2002Subword Sorting with Versatile Permutation Instructions.
Zhijie Shi, Ruby B. Lee
2002Supercomputing on a Chip: Evolution and Challenges.
Justin R. Rattner
2002System-Architectures for Sensor Networks Issues, Alternatives, and Directions.
Jessica Feng, Farinaz Koushanfar, Miodrag Potkonjak
2002TAXI: Trace Analysis for X86 Interpretation.
Stevan A. Vlaovic, Edward S. Davidson
2002TTA-C2, A Single Chip Communication Controller for the Time-Triggered-Protocol.
Manfred Ley, Herbert Grünbacher
2002The Imagine Stream Processor.
Ujval J. Kapasi, William J. Dally, Scott Rixner, John D. Owens, Brucek Khailany
2002Timing Window Applications in UltraSPARC-IIIi? Microprocessor Design.
Rita Yu Chen, Paul Yip, Georgios K. Konstadinidis, Andrew Demas, Fabian Klass, Robert E. Mains, Margaret Schmitt, Dina Bistry
2002Trace Cache Performance Parameters.
Afzal Hossain, Daniel J. Pease, James S. Burns, Nasima Parveen
2002Trace-Level Speculative Multithreaded Architecture.
Carlos Molina, Antonio González, Jordi Tubella
2002Using Offline and Online BIST to Improve System Dependability - The TTPC-C Example.
Andreas Steininger, Johann Vilanek
2002VLSI Design and Verification of the Imagine Processor.
Brucek Khailany, William J. Dally, Andrew Chang, Ujval J. Kapasi, Jinyung Namkoong, Brian Towles
2002k-time Forced Simulation: A Formal Verification Technique for IP Reuse.
Partha S. Roop, Arcot Sowmya, S. Ramesh