ICCD C

97 papers

YearTitle / Authors
1998A 690 ps read-access latency register file for a GHz integer microprocessor.
Osamu Takahashi, Joel Silberman, Sang H. Dhong, H. Peter Hofstee, Naoaki Aoki
1998A fast global gate collapsing technique for high performance designs using static CMOS and pass transistor logic.
Yanbin Jiang, Sachin S. Sapatnekar, Cyrus Bamji
1998A fine-grain, current mode scheme for VLSI proximity search engine.
Seiji Takeuchi, Takayasu Sakurai
1998A fractal compaction algorithm for efficient power estimation.
Radj Radjassamy, Jo Dale Carothers
1998A low-power logic optimization methodology based on a fast power-driven mapping.
Sumit Roy, Harm Arts, Prithviraj Banerjee
1998A minimized hardware architecture of fast Phong shader using Taylor series approximation in 3D graphics.
Hyunchul Shin, Jin-Aeon Lee, Lee-Sup Kim
1998A reduction scheme to optimize the Wallace multiplier.
Moises E. Robinson, Earl E. Swartzlander Jr.
1998A self-timed real-time sorting network.
Kenneth Y. Yun, Supratik Chakraborty, Kevin W. James, Robert H. Fairlie-Cuninghame, Rene L. Cruz
1998A simple adaptive wormhole routing algorithm for MIMD systems.
Raju D. Venkataramana, N. Ranganathan
1998AMULET3: a high-performance self-timed ARM microprocessor.
Stephen B. Furber, Jim D. Garside, D. A. Gilbert
1998Accuracy sensitive word-length selection for algorithm optimization.
Suhrid A. Wadekar, Alice C. Parker
1998Adaptive synchronization.
Ran Ginosar, Rakefet Kol
1998An approach to verify a large scale system-on-a-chip using symbolic model checking.
Koichiro Takayama, Taizo Satoh, Tsuneo Nakata, Fumiyasu Hirose
1998An effective datapath design methodology for high-frequency design.
Carina Ben-Zvi, Patrick McGuinness, Franklin Lassandro
1998An eight-issue tree-VLIW processor for dynamic binary translation.
Kemal Ebcioglu, Jason Fritts, Stephen Kosonocky, Michael Gschwind, Erik R. Altman, Krishnan Kailas, Terry Bright
1998An exact solution to the minimum size test pattern problem.
Paulo F. Flores, Horácio C. Neto, João P. Marques Silva
1998Analysis of ×86 instruction set usage for DOS/Windows applications and its implication on superscalar design.
Ing-Jer Huang, Tzu-Chin Peng
1998Antirandom vs. pseudorandom testing.
Shen Hui Wu, Yashwant K. Malaiya, Anura P. Jayasumana
1998Area minimization of redundant CORDIC pipeline architectures.
Andreas Wassatsch, Steffen Dolling, Dirk Timmermann
1998Area-oriented synthesis for pass-transistor logic.
Rajat Chaudhry, Tai-Hung Liu, Adnan Aziz, Jeffrey L. Burns
1998Automatic VHDL restructuring for RTL synthesis optimization and testability improvement.
D. Corvino, Italo Epicoco, Fabrizio Ferrandi, Franco Fummi, Donatella Sciuto
1998Automatic data path abstraction for verification of large scale designs.
Viresh Paruthi, Nazanin Mansouri, Ranga Vemuri
1998Branch assertion and elimination.
Afshin Ganjoo
1998Buffer size driven partitioning for HW/SW co-design.
Ta-Cheng Lin, Sadiq M. Sait, Walling R. Cyre
1998Circuit design techniques for a gigahertz integer microprocessor.
Kevin J. Nowka, Tibi Galambos
1998Circuit implementation of a 600 MHz superscalar RISC microprocessor.
Mark Matson, Dan Bailey, Shane L. Bell, Larry L. Biro, Steve Butler, John Clouser, Jim Farrell, Mike Gowan, Donald A. Priore, Kathryn Wilcox
1998Circular buffered switch design with wormhole routing and virtual channels.
Nan Ni, Marius Pirvu, Laxmi N. Bhuyan
1998Clock-skew constrained placement for row based designs.
Natesan Venkateswaran, Dinesh Bhatia
1998Code coalescing unit: a mechanism to facilitate load store data communication.
J. John, Yin Teh, Francis Matus, Craig Chase
1998Combining technology mapping with post-placement resynthesis for performance optimization.
Aiguo Lu, Hans Eisenmann, Guenter Stenz, Frank M. Johannes
1998Comparative analysis of latches and flip-flops for high-performance systems.
Vladimir Stojanovic, Vojin G. Oklobdzija, Raminder Singh Bajwa
1998Current-based testing for analog and mixed-signal circuits.
Jaime Velasco-Medina, Michael Nicolaidis
1998DCP: an algorithm for datapath/control partitioning of synthesizable RTL models.
Victor J. Lam, Kunle Olukotun
1998Data cache parameter measurements.
Enyou Li, Clark D. Thomborson
1998Deep submicron design techniques for the 500 MHz IBM S/390 G5 custom microprocessor.
Dale E. Hoffman, Robert M. Averill III, Brian W. Curran, Yuen H. Chan, Allan H. Dansky, Robert F. Hatch, Timothy G. McNamara, Thomas J. McPherson, Gregory A. Northrop, Leon J. Sigal, Anthony Pelella, Patrick M. Williams
1998Design issues in mixed static-domino circuit implementations.
Ruchir Puri
1998Design methodology for a 1.0 GHz microprocessor.
Stephen D. Posluszny, Naoaki Aoki, David Boerstler, Jeffrey L. Burns, Sang H. Dhong, Uttam Ghoshal, H. Peter Hofstee, David P. LaPotin, Kyung T. Lee, David Meltzer, Hung C. Ngo, Kevin J. Nowka, Joel Silberman, Osamu Takahashi, Ivan Vo
1998Dynamic fault diagnosis for sequential circuits on reconfigurable hardware.
Fatih Kocan, Daniel G. Saab
1998Efficient BIST TPG design and test set compaction for delay testing via input reduction.
Chih-Ang Chen, Sandeep K. Gupta
1998Efficient exact and heuristic minimization of hazard-free logic.
J. W. J. M. Rutten, Michel R. C. M. Berkelaar
1998Enhancing topological ATPG with high-level information and symbolic techniques.
Fulvio Corno, Janak H. Patel, Elizabeth M. Rudnick, Matteo Sonza Reorda, Roberto Vietti
1998Evaluating the performance of active cache management schemes.
Edward S. Tam, Jude A. Rivers, Vijayalakshmi Srinivasan, Gary S. Tyson, Edward S. Davidson
1998Extension of the working-zone-encoding method to reduce the energy on the microprocessor data bus.
Tomás Lang, Enric Musoll, Jordi Cortadella
1998FPGA-based Internet Protocol Version 6 router.
Mohammad M. Mansour, Ayman I. Kayssi
1998Fast low-power shared division and square-root architecture.
Martin Kuhlmann, Keshab K. Parhi
1998Fault detection and automated fault diagnosis for embedded integrated electrical passives.
Heebyung Yoon, Junwei Hou, Abhijit Chatterjee, Madhavan Swaminathan
1998Fault-tolerant architecture for high performance embedded system applications.
Gul N. Khan
1998Finding the longest simple path in cyclic combinational circuits.
Yaun-Chung Hsu, Shangzhi Sun, David Hung-Chang Du
1998Hardware/software co-verification, an IP vendors viewpoint.
T. Hopes
1998Hierarchical pipelining for behaviors, loops, and operations.
Smita Bakshi, Daniel D. Gajski
1998High-performance digit-serial complex-number multiplier-accumulator.
Yun-Nan Chang, Keshab K. Parhi
1998How many logic levels does floating-point addition require?
Peter-Michael Seidel, Guy Even
1998Improved built-in test pattern generators based on comparison units for synchronous sequential circuits.
Irith Pomeranz, Sudhakar M. Reddy
1998Incorporating timing constraints in the efficient memory model for symbolic ternary simulation.
Miroslav N. Velev, Randal E. Bryant
1998Integrated partitioning and scheduling for hardware/software co-design.
Huiqun Liu, D. F. Wong
1998International Conference on Computer Design: VLSI in Computers and Processors, ICCD 1998, Proceedings, 5-7 October, 1998, Austin, TX, USA
1998Leading-one prediction scheme for latency improvement in single datapath floating-point adders.
Javier D. Bruguera, Tomás Lang
1998Learning as applied to stochastic optimization for standard cell placement.
Lixin Su, Wray L. Buntine, A. Richard Newton, Bradley S. Peters
1998Low power SRAM design using hierarchical divided bit-line approach.
Ashish Karandikar, Keshab K. Parhi
1998Low-power radix-8 divider.
Alberto Nannarelli, Tomás Lang
1998Methods for calculating coupling noise in early design: a comparative analysis.
Khalid Rahmat, José Neves, Jin-Fuw Lee
1998Model checking of a real ATM switch.
Jianping Lu, Sofiène Tahar, Dan Voicu, Xiaoyu Song
1998New compact representation of multiple-valued functions, relations, and non-deterministic state machines.
Stan Grygiel, Marek A. Perkowski
1998On finding undetectable and redundant faults in synchronous sequential circuits.
Xijiang Lin, Irith Pomeranz, Sudhakar M. Reddy
1998On short circuit power estimation of CMOS inverters.
Qi Wang, Sarma B. K. Vrudhula
1998On thin Boolean functions and related optimum OBDD ordering.
Yu-Liang Wu, Hongbing Fan, C. K. Wong
1998Optimal design of synchronous circuits using software pipelining techniques.
François R. Boyer, El Mostapha Aboulhamid, Yvon Savaria, Imed Eddine Bennour
1998Parallel ultra large scale engine SIMD architecture for real-time digital signal processing applications.
Paul Marriott, Ivan C. Kraljic, Yvon Savaria
1998Partitioning in time: a paradigm for reconfigurable computing.
Karthikeya M. Gajjala Purna, Dinesh Bhatia
1998Performance-driven board-level routing for FPGA-based logic emulation.
Wai-Kei Mak, D. F. Wong
1998Pipelined computation of LNS addition/subtraction with very small lookup tables.
Chichyang Chen, Chih-Huan Yang
1998Practical design and performance evaluation of completion detection circuits.
Fu-Chiung Cheng
1998Practical use of transition mode delay to solve the problems of floating mode delay under highly correlated input streams.
Hoon Choi, Seung Ho Hwang
1998Profiling for input predictable threads.
Lucian Codrescu, D. Scott Wills
1998Pulse-mode macromodular systems.
Luis A. Plana, Stephen H. Unger
1998Rapid prototyping of self-timed circuits.
Simon W. Moore, Peter Robinson
1998Re-synthesis in technology mapping for heterogeneous FPGAs.
Maurice Kilavuka Inuani, Jonathan Saul
1998Scheduling under data and control dependencies for heterogeneous architectures.
Alex Doboli, Petru Eles
1998Silicon microsystems merging sensors, circuits and systems.
Yiannos Manoli, W. Mokwa
1998Software power estimation and optimization for high performance, 32-bit embedded processors.
Jeffry T. Russell, Margarida F. Jacome
1998Static race verification for networks with reconvergent clocks.
Joel Grodstein, Nick Rethman, Nevine Nassif
1998System-level performance estimation strategy for sw and hw.
Alberto Allara, Carlo Brandolese, William Fornaciari, Fabio Salice, Donatella Sciuto
1998Test points selection process and diagnosability analysis of analog integrated circuits.
Wei-Hsing Huang, Chin-Long Wey
1998Testing digital to analog converters based on oscillation-test strategy using sigma-delta modulation.
Hassan Ihs, Karim Arabi, Bozena Kaminska
1998The ARM9 family-high performance microprocessors for embedded applications.
Simon Segars
1998The Alpha 21264 microprocessor architecture.
Richard E. Kessler, Edward J. McLellan, D. A. Webb
1998The Microcore development system: a unified environment for designing new microprocessors.
Rolf Hakenes, Yiannos Manoli
1998The effects of explicitly parallel mechanisms on the multi-ALU processor cluster pipeline.
Andrew Chang, William J. Dally, Stephen W. Keckler, Nicholas P. Carter, Whay Sing Lee
1998The system design of a Windows CE ARM based micro-controller.
Keith S. P. Clarke, Danny Kershaw
1998Theorem proving guided development of formal assertions in a resource-constrained scheduler for high-level synthesis.
Naren Narasimhan, Elena Teica, Rajesh Radhakrishnan, Sriram Govindarajan, Ranga Vemuri
1998Timing analysis of combinational circuits containing complex gates.
Yaun-Chung Hsu, Hsi-Chuan Chen, Shangzhi Sun, David Hung-Chang Du
1998Timing verification of the 21264: A 600 MHz full-custom microprocessor.
Emily J. Shriver, Dale H. Hall, Nevine Nassif, Nadir E. Rahman, Nick L. Rethman, Gill Watt, Jim A. Farrell
1998Timing-driven routing for symmetrical-array-based FPGAs.
Kai Zhu, Yao-Wen Chang, D. F. Wong
1998To model check or not to model check.
Nina Saxena, Jason Baumgartner, Avijit Saha, Jacob A. Abraham
1998Using regression analysis for GA-based ATPG parameter optimization.
William E. Dougherty, R. D. (Shawn) Blanton
1998VEGA: a verification tool based on genetic algorithms.
Fulvio Corno, Matteo Sonza Reorda, Giovanni Squillero
1998Zen and the art of Alpha verification.
Nathan Dohm, Carl Ramey, Darren Brown, Scot Hildebrandt, James Huggins, Michael Quinn, Scott A. Taylor