ICCD C

84 papers

YearTitle / Authors
19961996 International Conference on Computer Design (ICCD '96), VLSI in Computers and Processors, October 7-9, 1996, Austin, TX, USA, Proceedings
1996A Better ATPG Algorithm and Its Design Principles.
Li-C. Wang, M. Ray Mercer, Thomas W. Williams
1996A CAM-Based VLSI Architecture for Shared Buffer ATM Switch with Fuzzy Controlled Buffer Management.
Chie Dou, Ming-Der Shieh
1996A Compact Neural Network Based CDMA Receiver for Multimedia Wireless Communication.
David C. Chen, Bing J. Sheu, Theodore W. Berger
1996A Design For Test Perspective on I/O Management.
Kamran Zarrineh, Vivek Chickermane, Gareth Nicholls, Mike Palmer
1996A Method for Analog Circuits Visualization.
Bogdan G. Arsintescu
1996A New Non-Restoring Square Root Algorithm and its VLSI Implementation.
Yamin Li, Wanming Chu
1996A Practical Algorithm for Retiming Level-Clocked Circuits.
Naresh Maheshwari, Sachin S. Sapatnekar
1996A Scalable Resistor-less PLL Design for PowerPCTM Microprocessors.
Jose Alvarez, Hector Sanchez, Roger Countryman, Mike Alexander, Carmine Nicoletta, Gianfranco Gerosa
1996A Scaling Scheme and Optimization Methodology for Deep Sub-Micron Interconnect.
Soo-Young Oh, Khalid Rahmat, O. Sam Nakagawa, John Moll
1996A VLSI array architecture with dynamic frequency clocking.
N. Ranganathan, Narayanan Vijaykrishnan, N. Bhavanishankar
1996A VLSI chip for image compression using variable block size segmentation.
S. B. Aruru, N. Ranganathan, Kameswara Rao Namuduri
1996A formal verification technique for embedded software.
Olivier Thiry, Luc J. M. Claesen
1996A multiseed counter TPG with performance guarantee.
Dimitrios Kagaris, Spyros Tragoudas
1996An Improved Algorithm for Performance Optimal Technology Mapping with Retiming in LUT-Based FPGA Desig.
Jason Cong, Chang Wu
1996An integrated microspacecraft avionics architecture using 3D multichip module building blocks.
Leon Alkalai, Wai-Chi Fang
1996An output-shared buffer ATM switch.
Jin Li
1996Arithmetic Pattern Generators for Built-In Self-Test.
Albrecht P. Stroele
1996Autocircuit: a clock edge general behavioral synthesis system with a direct path to physical datapath.
H. Fatih Ugurdag, Thomas E. Fuhrman
1996Behavioral Verification of an ATM Switch Fabric using Implicit Abstract State Enumeration.
Michel Langevin, Sofiène Tahar, Zijian Zhou, Xiaoyu Song, Eduard Cerny
1996Binary decision diagrams on network of workstation.
Rajeev K. Ranjan, Jagesh V. Sanghavi, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
1996Boolean Function Representation Based on Disjoint-Support Decompositions.
Valeria Bertacco, Maurizio Damiani
1996Branch-Directed and Stride-Based Data Cache Prefetching.
Yue Liu, David R. Kaeli
1996Can Trace-Driven Simulators Accurately Predict Superscalar Performance?
Bryan Black, Andrew S. Huang, Mikko H. Lipasti, John Paul Shen
1996Clock-Delayed Domino for Adder and Combinational Logic Desig.
Gin Yee, Carl Sechen
1996Cycle-Based Timing Simulations Using Event-Stream.
Kei-Yong Khoo, Alan N. Willson Jr.
1996DNA computations can have global memory.
Richard J. Lipton
1996Design Methodologies for Tolerating Cell and Interconnect Faults in FPGAs.
Fran Hancheck, Shantanu Dutt
1996Design Tradeoffs and Experience with Motorola PowerPC? Migration Tool.
Maurício Breternitz Jr., A. Manikonda, M. Ommerman, W. Su, A. Thornto
1996Design and Implementation of a new Synchronization Method for High-Speed Cell-based Network Interfaces.
Alex Maniatopoulos, Theodore Antonakopoulos, Vassilios Makios
1996Design for testability of integrated operational amplifiers using oscillation-test strategy.
Karim Arabi, Bozena Kaminska, Stephen K. Sunter
1996Design issues for distributed shared-memory systems.
Daniel Lenoski
1996Dichotomy-based Model for FSM Power Minimization.
Lakshmikant Bhupathi, Liang-Fang Chao
1996Distributed Binary Decision Diagrams for Verification of Large Circuit.
Prakash Arunachalam, Craig M. Chase, Dinos Moundanos
1996Distributed EDA Tool Integration: The PPP Paradigm.
Luca Benini, Alessandro Bogliolo, Giovanni De Micheli
1996Early Quantification and Partitioned Transition Relations.
Ramin Hojati, Sriram C. Krishnan, Robert K. Brayton
1996Early Zero Detection.
David Raymond Lutz, Doddaballapur Narasimha-Murthy Jayasimha
1996Efficient Delay-Insensitive RSFQ Circuits.
Priyadarsan Patra, Donald S. Fussell
1996Embedded System Design Issues (The Rest of the Story).
Philip Koopman
1996Embedded Systems Design with Frontend Compilers.
C. Alba, Luigi Carro, A. Lima, Altamiro Amadeu Susin
1996Enhancing FSM Traversal by Temporary Re-Encoding.
Gianpiero Cabodi, Luciano Lavagno, Enrico Macii, Massimo Poncino, Stefano Quer, Paolo Camurati, Ellen Sentovich
1996Evaluation of high speed LAN protocols as multimedia carriers .
W. Melody Moh, Yu-Feng Chung, Teng-Sheng Moh, Joanna Wang
1996Exact Dichotomy-based Constrained Encodi.
Olivier Coudert, C.-J. Richard Shi
1996FPGA Module Minimization.
D. Kuguris, Spyros Tragoudas
1996Fault Location Based on Circuit Partitioning.
Irith Pomeranz, Sudhakar M. Reddy
1996Future Challenges of Deep Sub-Micron Processer Design.
Mark Dermott
1996Global Bus Design of a Bus-Based COMA Multiprocessor DICE.
Gyungho Lee, Bland Quattlebaum, Sangyeun Cho, Larry L. Kinney
1996High Speed Video Board as a Case Study for Hardware-Software Co-Design.
Dirk Herrmann
1996Implicit Test Sequences Compaction for Decreasing Test Application Cos.
Roberto Bevacqua, Luca Guerrazzi, Fabrizio Ferrandi, Franco Fummi
1996Issues on the architecture and the design of distributed shared memory systems.
Nian-Feng Tzeng, Steven J. Wallach
1996Large Standard Cell Libraries and Their Impact on Layout Area and Circuit Performanc.
Bingzhong Guan, Carl Sechen
1996Latch Redundancy Removal Without Global Reset.
Shaz Qadeer, Robert K. Brayton, Vigyan Singhal
1996MMPacking: A Load and Storage Balancing Algorithm for Distributed Multimedia Servers.
Dimitrios N. Serpanos, Leonidas Georgiadis, Tasos Bouloutas
1996Memory Hierarchy Synthesis of a Multimedia Embedded Processor.
Steve Fu
1996Microarchitectural synthesis of gracefully degradable, dynamically reconfigurable ASICs.
Alex Orailoglu
1996Microarchitecture Support for Reducing Branch Penalty in a Supercscaler Processor.
Mamoru Sakamoto, Toyohiko Yoshida, Yasuhiro Nunomura, Yukihiko Shimazu
1996Modeling the Difficulty of Sequential Automatic Test Pattern Generation.
Thomas E. Marchok, Wojciech Maly
1996Modeling the Technology Impact on the Design of a Two-Level Multicomputer Interconnection Network.
José Cruz-Rivera, D. Scott Wills, Thomas K. Gaylord, Elias N. Glytsis
1996Module Generators for a Regular Analog Layout.
J. Kampe, C. Wisser, G. Scarbata
1996Multimodal query support in database servers.
William O'Connell, Grace Au, David Schrader
1996Multiplexor Network Generation in High Level Synthesis.
Yung-Ming Fang, D. F. Wong
1996Multiway Partitioner for High Performance FPGA Based Board Architecture.
Vijayanand Sankarasubramanian, Dinesh Bhatia
1996New Challenges for Video Servers: Performance of Non-Linear Applications under User Choice.
Michael Kozuch, Wayne H. Wolf, Andrew Wolfe
1996On Design of Efficient Square Generator.
Chin-Long Wey
1996On the Nature and Inadequacies of Transport Timing Delay Constructs in VHDL Descriptions.
Peter A. Walker, Sumit Ghosh
1996Opportunities and pitfalls in HDL-based system design.
Rajesh K. Gupta, Daniel Gajski, Randy Allen, Yatin Trivedi
1996Optimal Selection of Supply Voltages and Level Conversions During Data Path Scheduling Under Resource Constraints.
Mark C. Johnson, Kaushik Roy
1996Optimal single probe traversal algorithm for testing of MCM substrat.
Rajesh Pendurkar, Abhijit Chatterjee, Craig A. Tovey
1996Parallel Algorithms for Force Directed Scheduling of Flattened and Hierarchical Signal Flow Graphs.
Pradeep Prabhakaran, Prithviraj Banerjee
1996Pausible Clocking: A First Step Toward Heterogeneous Systems.
Kenneth Y. Yun, Ryan P. Donohue
1996Profile-Driven Generation of Trace Samples.
Pradeep K. Dubey, Ravi Nair
1996Pulse-Driven Delay-Insensitive Circuits using Single-Flux-Quantum Devices.
Yoshio Kameda
1996RSFQ: What We Know and What We Don't.
Stas Polonsky
1996Reducing State Loss For Effective Trace Sampling of Superscalar Processors.
Thomas M. Conte, Mary Ann Hirsch, Kishore N. Menezes
1996Space Cutting Approaches for Repairing Memories.
Yinan N. Shen, Nohpill Park, Fabrizio Lombardi
1996Synthesis of Multi-Dimensional Applications in VHDL.
Nelson L. Passos, Edwin Hsing-Mean Sha
1996Systematic analysis of bounds on power consumption in pipelined and non-pipelined multipliers.
Janardhan H. Satyanarayana, Keshab K. Parhi, Leilei Song, Yun-Nan Chang
1996Testing of embedded A/D converters in mixed-signal circuit.
Naim Ben-Hamida, Bechir Ayari, Bozena Kaminska
1996The Augmint multiprocessor simulation toolkit for Intel x86 architectures.
Anthony-Trung Nguyen, Maged M. Michael, Arun Sharma, Josep Torrellas
1996The Tempest approach to distributed shared memory.
David A. Wood, Mark D. Hill, James R. Larus
1996The use of random simulation in formal verification.
Florian Krohm, Andreas Kuehlmann, Arjen Mets
1996Using Functional Information and Strategy Switching in Sequential ATPG.
Jaehong Park, M. Ray Mercer
1996Using Genetic Algorithms to Automate System Implementation in a Novel Three-Dimensional Packaging Technolog.
Steven P. Larcombe, David J. Prendergast, Neil A. Thacker, Peter A. Ivey
1996VLIW-Processors under Periodic Real Time Constraints.
Jean-Paul Theis, Lothar Thiele