ICCD C

120 papers

YearTitle / Authors
1992A CRegs Implementation Study Based on the MIPS-X RISC Processor.
Steve Nowakowski, Matthew T. O'Keefe
1992A Comparison of Self-Timed Design Using FPGA, CMOS, and GaAs Technologies.
Erik Brunvand, Nick Michell, Kent F. Smith
1992A New Approach to Fault-Tolerance in Linear Analog Systems Based on Checksum-Coded State Space Representations.
Abhijit Chatterjee
1992A Synthesis Algorithm for Two-Level XOR Based Circuits.
Mark A. Heap, William A. Rogers, M. Ray Mercer
1992A Tool for Automatic Generation of BISTed and Transparent BISTed Rams.
O. Kebichi, Michael Nicolaidis
1992A Universal Testability Strategy for Multi-Chip Modules Based on BIST and Boundary-Scan.
Yervant Zorian
1992AC++ Based Environment for Analog Circuit Simulation.
Bob Melville, Peter Feldmann, Shahriar Moinian
1992ALMP: A Shifting Memory Architecture for Loop Pipelining.
H. Fatih Ugurdag, Christos A. Papachristou
1992Addressing the Tradeoff Between Standard and Custom ICs in System Level Design.
Jay K. Adams, Donald E. Thomas
1992Algorithms for Interface Timing Verification.
Kenneth L. McMillan, David L. Dill
1992Alpha Architecture: Hardware Implementation and Software Programming Implications.
Derrick Meyer
1992An Application Specific Processor for a Multi-System Navigation Receiver.
Eric Aardoom, Paul Stravers
1992An Area Minimizer for Floorplans with L-Shaped Regions.
Yachyang Sun, C. L. Liu
1992An Efficient Logic Emulation System.
Michael Butts, Jon Batcheller, Joseph Varghese
1992An IEEE 1149.1 Compliant Testability Architecture with Internal Scan.
Robert C. Zak Jr., Jeffrey V. Hill
1992An Improved Graph-Based FPGA Techology Mapping Algorithm For Delay Optimization.
Jason Cong, Yuzheng Ding, Andrew B. Kahng, Peter Trajmar, Kuang-Chien Chen
1992An Ultra-Large Capacity Single-Chip Memory Architecture With Self-Testing and Self-Repairing.
Tom Chen, Glen Sunada
1992Analysis of Asynchronous Binary Arbitration on Digital-Transmission-Line Busses.
Shlomo Kipnis
1992Archimedes: An Approach to Architecutre-Independent Modeling for High-Level Simulation.
Miyako Odawara, Kazunori Kuriyama, Tadaaki Bandoh
1992Arithmetic Error Analysis of a new Reciprocal Cell.
Vijay K. Jain, Gibert E. Perez, Earl E. Swartzlander Jr.
1992Automatic Synthesis and Verification of Hazard-Free Control Circuits from Asynchronous Finite State Machine Specifications.
Tam-Anh Chu
1992Autonomous-Tol for Hardware Partitioning in a Built-in Self-Test Environment.
Chien-In Henry Chen, Joel T. Yuen, Ji-Der Lee
1992BIST Generators for Sequential Faults.
Shujian Zhang, Rod Byrne, D. Michael Miller
1992Behavioral Synthesis for Easy Testability in Data Path Allocation.
Tien-Chien Lee, Wayne H. Wolf, Niraj K. Jha, John M. Acken
1992Boolean Matching Using Binary Decision Diagrams with Applications to Logic Synthesis and Verification.
Yung-Te Lai, Sarma Sastry, Massoud Pedram
1992Channel Density Minimization by Pin Permutation.
Yang Cai, D. F. Wong
1992Comparing Layouts with HDL Models: A Formal Verification Technique.
Timothy Kam, P. A. Subrahmanyam
1992Concurrent Test Scheduling in Built-In Self-Test Environment.
Chien-In Henry Chen, Joel T. Yuen
1992Constraint Slving for Test Case Generation.
Ashok K. Chandra, Vijay S. Iyengar
1992DACCT - Dynamic ACCess Testing of IBM Large Systems.
Jeffrey I. Alter
1992Delay Models for Verifying Speed-Dependent Asynchronous Circuits.
Jerry R. Burch
1992Delay Prediction for Technology-Independent Logic Equations.
Paul T. Gutwin, Patrick C. McGeer, Robert K. Brayton
1992Design Methodology and CAD Tools for the NVAX Microprocessor.
Victor Peng, Dale R. Donchin, Yao-Tsung Yen
1992Design and Implementation of a Robot Control System Using a Unified Hardware-Software Rapid Prototyping Framework.
Mani B. Srivastava, Trevor I. Blumenau, Robert W. Brodersen
1992Design and Scaling of BiCMOS Circuits.
Prasad Raje
1992Design and Test - The Next Problems.
Gordon D. Robinson
1992Design of Concurrent Error-Detectable VLSI-Based Array Dividers.
Thou-Ho Chen, Liang-Gee Chen, Yi-Shing Chang
1992Design of Robust-Path-Delay-Fault-Testable Combinational Circuits by Boolean Space Expansion.
Xiaodong Xie, Alexander Albicki, Andrzej Krasniewski
1992Designing ASICs for Use with Multichip Modules.
Jeffery Banker
1992Desktop Wars - The PC Versus the Workstation.
Nick Tredennick
1992Directions in Futrue High End Processors.
George A. Sai-Halasz
1992Distributed VLSI Simulation on a Network of Workstations.
Sankaran Karthik, Jacob A. Abraham
1992Dynamic Reordering of Hgh Latency Transactions Using a Modified a Micropipeline.
Gernot Armin Liebchen, Ganesh Gopalakrishnan
1992Electromagnetic Modeling and Simulation of Electronic Packages.
Raj Mittra
1992Estimating Lower-Bound Performance of Schedules Using a Relaxation Technique.
Minjoong Rim, Rajiv Jain
1992FPGA and Rapid Prototyping Technology Use in a Special Purpose Computer for Molecular Genetics.
Barry S. Fagin, J. Gill Watt
1992Fanin Ordering in Multi-Slot Timing Analysis.
Lukas P. P. P. van Ginneken
1992Fast Minimization of Mixed-Polarity AND/XOR Canonical Networks.
Marek A. Perkowski, Laszlo Csanky, Andisheh Sarabi, Ingo Schäfer
1992Fault Simulation and Test Generation by Fault Sampling Techniques.
Sami A. Al-Arian, Musaed A. Al-Kharji
1992Field-Programmable Integrted Circuits - Overview and Future Trends.
Abbas El Gamal
1992Finite State Machine Decomposition Using Multiway Partitioning.
Maya K. Yajnik, Maciej J. Ciesielski
1992Fully Differential Optical Interconnects for High-Speed Digital Systems.
C.-S. Li, Harold S. Stone, C. M. Olsen
1992Functional VLSI Design Verification Methodology for the CM-5 Massively Parallel Supercomputer.
Margaret A. St. Pierre, Shaw-Wen Yang, Dan Cassiday
1992Hierarchical Simulation of MOS Circuits Using Extracted Functional Models.
Jalal A. Wehbeh, Daniel G. Saab
1992High Level Design: A Design Vision for the 90's.
Aart J. de Geus
1992High-Level State Machine Specification and Synthesis.
Andreas Kuehlmann, Reinaldo A. Bergamaschi
1992High-Level Synthesis of Self-Recovering MicroArchitectures.
Alex Orailoglu, Ramesh Karri
1992IBM Single Chip RISC Processor (RSC).
Charles R. Moore, D. M. Balser, John S. Muhich, R. E. East
1992Identification of Single Gate Delay Fault Redundancies.
Daniel Brand, Vijay S. Iyengar
1992Implementing a High-Frequency Pattern Generator Based on Combinational Merging.
Charles A. Zukowski, Ying-Wen Bai
1992Improving FPGA Routing Architectures Using Architecture and CAD Interactions.
Benjamin Tseng, Jonathan Rose, Stephen Brown
1992Interconnect Modeling and Design in High-Speed VLSI/ULSI Systems.
Soo-Young Oh, Keh-Jeng Chang, Norman Chang, Ken Lee
1992Just in Time Scheduling.
Karl van Rompaey, Ivo Bolsens, Hugo De Man
1992Library Mapping of CMOS-Switch-Level-Circuits by Extraction of Isomorphic Subgraphs.
Ursula Westerholz, Heinrich Theodor Vierhaus
1992Linear Programming for Optimum Hazard Elimination in Asynchronous Circuits.
Luciano Lavagno, Alberto L. Sangiovanni-Vincentelli
1992Logical Verification of the NVAX CPU Chip Design.
Walker Anderson
1992MARVLE: A VLSI Chip for Variable Length Encoding and Decoding.
Amar Mukherjee, Jeffrey W. Flieder, N. Ranganathan
1992MDP Design Tools and Methods.
Richard A. Lethin, William J. Dally
1992Modeling and Simulation of Design Errors.
Sungho Kang, Stephen A. Szygenda
1992Modified Booth Algorithm for High Radix Multiplication.
Philip E. Madrid, Brian Millar, Earl E. Swartzlander Jr.
1992Multiple Fault Detection in CMOS Logic Circuits.
Ding Lu, Carol Q. Tong
1992Multiple Input Bridging Fault Detection in CMOS Sequential Circuits.
Niraj K. Jha, Sying-Jyan Wang, Phillip C. Gripka
1992MxN Booth Encoded Multiplier Generator Using Optimized Wallace Trees.
Jalil Fadavi-Ardekani
1992NSC's Digital Answering Machine Solution.
Ohad Falik, Gideon D. Intrater
1992NVAX and NVAX + Single-Chip CMOS VAX Microprocessors.
Debra Bernstein, John F. Brown III, Rebecca L. Stamm, G. Michael Uhler
1992On Limitations and Extensions of STG Model for Designing Asynchronous Control Circuits.
Alexandre Yakovlev
1992On Minimizing Hardware Overhead for Pseudoexhaustive Circuit Testability.
Dimitrios Kagaris, Fillia Makedon, Spyros Tragoudas
1992On Relationship Between ITE and BDD.
William K. C. Lam, Robert K. Brayton
1992One-Chip System Integration for GSM with the DSP KISS-16V2.
Gisela Mahlich, G.-H. Huaman-Bollo, Joachim Preißner, Johannes Schuck, Hans Sahm, P. Weingart, Dirk Weinsziehr, J. Yeandel
1992Placement-Based Partitioning for Lookup-Table-Based FPGAs.
Steven Trimberger, Mon-Ren Chene
1992Practical Asynchronous Controller Design.
Steven M. Nowick, Kenneth Y. Yun, David L. Dill
1992Proceedings 1992 IEEE International Conference on Computer Design: VLSI in Computer & Processors, ICCD '92, Cambridge, MA, USA, October 11-14, 1992
1992ProperCAd: A Portable Object-Oriented Parallel Environment for VLSI CAD.
Balkrishna Ramkumar, Prithviraj Banerjee
1992Protocol Verification as a Hardware Design Aid.
David L. Dill, Andreas J. Drexler, Alan J. Hu, C. Han Yang
1992RTL Design Verification by Making Use of Datapath Information.
Masahiro Fujita
1992Register Locking in an Asynchronous Microprocessor.
N. C. Paver, Paul Day, Stephen B. Furber, Jim D. Garside, John V. Woods
1992Reliable Floating-Point Arithmetic Algorithms for Berger Encoded Operands.
Jien-Chung Lo
1992Repair of RAMs With Clustered Faults.
Bapiraju Vinnakota, Jason Andrews
1992Routability-Driven Techology Mapping for LookUp-Table-Based FPGAs.
Martine D. F. Schlag, Jackson Kong, Pak K. Chan
1992Routable Technologie Mapping for LUT FPGAs.
Narasimha B. Bhat, Dwight D. Hill
1992SYCLOP: Synthesis of CMOS Logic for Low Power Applications.
Kaushik Roy, Sharat Prasad
1992Sampling of Cache Congruence Classes.
Lishing Liu, Jih-Kwon Peir
1992Sequential Circuit Design Using Synthesis and Optimization.
Ellen Sentovich, Kanwar Jit Singh, Cho W. Moon, Hamid Savoj, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli
1992Some Techniques for Efficient Symbolic Simulation-Based Verification.
Prabhat Jain, Ganesh Gopalakrishnan
1992State Assignment Algorithms for Parallel Controller Synthesis.
James Pardey, Tomasz Kozlowski, Jonathan Saul, Martin Bolton
1992Statistical Timing Analysis of Combinational Circuits.
Srinivas Devadas, Horng-Fei Jyu, Kurt Keutzer, Sharad Malik
1992Synthesis of 3D Asynchronous State Machines.
Kenneth Y. Yun, David L. Dill, Steven M. Nowick
1992Synthesis of Multiple Bus/Functional Unit Architectures Implementing Neural Networks.
Baher Haroun, Elie Torbey
1992Synthesis of Timed Asynchronous Circuits.
Chris J. Myers, Teresa H.-Y. Meng
1992Synthesis on Multiplexer-Based F.P.G.A. Using Binary Decision Diagrams.
T. Besson, H. Bouzouzou, M. Crastes, Ion Floricica, Gabriele Saucier
1992System Level Verification of Large Scale Computer.
T. Okabayashi, K. Kubo, Z. Hirose, K. Suzuki
1992Technology Mapping via Transformations of Function Graphs.
Shih-Chieh Chang, Malgorzata Marek-Sadowska
1992The Architecture of the LR33020 GraphX Processor: A MIPS-RISC Based X-Terminal Controller.
Sanjay Desai
1992The ETCA Data-Flow Functional Computer for Real-Time Image Processing.
Georges Quénot, Bertrand Y. Zavidovique
1992The Formal Definition of a Synchronous Hardware-Description Language in Higher Order Logic.
Andrew D. Gordon
1992The Future of Embedded System Design.
James H. Aylor, Raul Camposano, Michael A. Schuette, Wayne H. Wolf, Nam Sung Woo
1992The J-Machine Network.
Peter R. Nuth, William J. Dally
1992The Message Driven Processor: An Integrated Multicomputer Processing Element.
William J. Dally, Andrew A. Chien, Stuart Fiske, Gregory A. Fyler, Waldemar Horwat, John S. Keen, Richard A. Lethin, Michael D. Noakes, Peter R. Nuth, D. Scott Wills
1992The Role of Prime Compatibles in the Minimization of Finite State Machines.
June-Kyung Rho, Fabio Somenzi
1992The Selective Extra-Stage Butterfly.
Smaragda Konstantinidou
1992The T9000 Transputer.
David May, Roger Shepherd, Peter Thompson
1992Theory and Design of Two-Rail Totally Self-Checking Basic Building Blocks.
Zhi-Jian Jiang, R. Venkatesen
1992Three Dimensional Circuit Oriented Electromagnetic Modeling for VLSI Interconnects.
Hansruedi Heeb, Albert E. Ruehli, J. Eric Bracken, Ronald A. Rohrer
1992Time Domain Simulation of Multiconductor Transmission Lines with Frequency-Dependent Losses.
Colin Gordon
1992Trends in Computer-Based Systems Engineering.
Stephanie White, Mack W. Alford, Brian McCay, David Oliver, Colin Tully, Julian Holtzman, C. Stephen Kuehl, David Owens, Allan Willey
1992Tutorial on Embedded System Design.
Wayne H. Wolf, Ernest Frey
1992VLSI Design of Modulo Adders/Subtractors.
Gopal Lakhani
1992Verification of I/O Trace Set Inclusion for a Class of Non-Deterministic Finite State Machines.
Eduard Cerny
1992Versioning and Concurrency Control in a Distributed Design Environment.
Atsushi Takahara
1992Workload-Driven Floorplanning for MIPS Optimization.
Pradip Bose, David LaPotin, Gopalakrishnan Vijayan, Sungho Kim