| 2011 | 2011 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2011, San Jose, California, USA, November 7-10, 2011 Joel R. Phillips, Alan J. Hu, Helmut Graeb |
| 2011 | 2011 TAU power grid simulation contest: Benchmark suite and results. Zhuo Li, Raju Balasubramanian, Frank Liu, Sani R. Nassif |
| 2011 | A SimPLR method for routability-driven placement. Myung-Chul Kim, Jin Hu, Dongjin Lee, Igor L. Markov |
| 2011 | A corner stitching compliant B Hui-Fang Tsao, Pang-Yen Chou, Shih-Lun Huang, Yao-Wen Chang, Mark Po-Hung Lin, Duan-Ping Chen, Dick Liu |
| 2011 | A framework for accelerating neuromorphic-vision algorithms on FPGAs. Michael DeBole, Ahmed Al-Maashri, Matthew Cotter, Chi-Li Yu, Chaitali Chakrabarti, Vijaykrishnan Narayanan |
| 2011 | A framework for double patterning-enabled design. Rani S. Ghaida, Kanak B. Agarwal, Sani R. Nassif, Xin Yuan, Lars Liebmann, Puneet Gupta |
| 2011 | A heterogeneous accelerator platform for multi-subject voxel-based brain network analysis. Yu Wang, Mo Xu, Ling Ren, Xiaorui Zhang, Di Wu, Yong He, Ningyi Xu, Huazhong Yang |
| 2011 | A jumper insertion algorithm under antenna ratio and timing constraints. Xin Gao, Luca Macchiarulo |
| 2011 | A low-power memory architecture with application-aware power management for motion & disparity estimation in Multiview Video Coding. Bruno Zatt, Muhammad Shafique, Sergio Bampi, Jörg Henkel |
| 2011 | A low-swing crossbar and link generator for low-power networks-on-chip. Chia-Hsin Owen Chen, Sunghyun Park, Tushar Krishna, Li-Shiuan Peh |
| 2011 | A methodology for local resonant clock synthesis using LC-assisted local clock buffers. Walter James Condley, Xuchu Hu, Matthew R. Guthaus |
| 2011 | A new method for multiparameter robust stability distribution analysis of linear analog circuits. Changhao Yan, Sheng-Guo Wang, Xuan Zeng |
| 2011 | A robust architecture for post-silicon skew tuning. Mac Y. C. Kao, Kun-Ting Tsai, Shih-Chieh Chang |
| 2011 | A theoretical probabilistic simulation framework for dynamic power estimation. Lei Wang, Markus Olbrich, Erich Barke, Thomas Büchner, Markus Bühler, Philipp V. Panitz |
| 2011 | A trace compression algorithm targeting power estimation of long benchmarks. Andrey Ayupov, Steven M. Burns |
| 2011 | ATree-based topology synthesis for on-chip network. Jason Cong, Yuhui Huang, Bo Yuan |
| 2011 | Accelerated statistical simulation via on-demand Hermite spline interpolations. Rouwaida Kanj, Tong Li, Rajiv V. Joshi, Kanak Agarwal, Ali Sadigh, David Winston, Sani R. Nassif |
| 2011 | Accelerating RTL simulation with GPUs. Hao Qian, Yangdong Deng |
| 2011 | Accelerating aerial image simulation with GPU. Hongbo Zhang, Tan Yan, Martin D. F. Wong, Sanjay J. Patel |
| 2011 | Algorithmic tuning of clock trees and derived non-tree structures. Igor L. Markov, Dongjin Lee |
| 2011 | Alternative design methodologies for the next generation logic switch. Davide Sacchetto, Michele De Marchi, Giovanni De Micheli, Yusuf Leblebici |
| 2011 | Application-aware deadlock-free oblivious routing based on extended turn-model. Ali Shafiee, Mahdy Zolghadr, Mohammad Arjomand, Hamid Sarbazi-Azad |
| 2011 | Assuring application-level correctness against soft errors. Jason Cong, Karthik Gururaj |
| 2011 | Automatic formal verification of multithreaded pipelined microprocessors. Miroslav N. Velev, Ping Gao |
| 2011 | Balanced reconfiguration of storage banks in a hybrid electrical energy storage system. Younghyun Kim, Sangyoung Park, Yanzhi Wang, Qing Xie, Naehyuck Chang, Massimo Poncino, Massoud Pedram |
| 2011 | Bandwidth-aware reconfigurable cache design with hybrid memory technologies. Jishen Zhao, Cong Xu, Yuan Xie |
| 2011 | CACTI-P: Architecture-level modeling for SRAM-based structures with advanced leakage reduction techniques. Sheng Li, Ke Chen, Jung Ho Ahn, Jay B. Brockman, Norman P. Jouppi |
| 2011 | CIPARSim: Cache intersection property assisted rapid single-pass FIFO cache simulation technique. Mohammad Shihabul Haque, Jorgen Peddersen, Sri Parameswaran |
| 2011 | Carbon nanotube imperfection-immune digital VLSI: Frequently asked questions updated. Hai Wei, Jie Zhang, Lan Wei, Nishant Patil, Albert Lin, Max M. Shulaker, Hong-Yu Chen, H.-S. Philip Wong, Subhasish Mitra |
| 2011 | Chemical-mechanical polishing aware application-specific 3D NoC design. Wooyoung Jang, Ou He, Jae-Seok Yang, David Z. Pan |
| 2011 | Clocking design automation in Intel's Core i7 and future designs. Ali M. El-Husseini, Matthew Morrise |
| 2011 | Co-design of channel buffers and crossbar organizations in NoCs architectures. Avinash Karanth Kodi, Randy Morris, Dominic DiTomaso, Ashwini Sarathy, Ahmed Louri |
| 2011 | Combined loop transformation and hierarchy allocation for data reuse optimization. Jason Cong, Peng Zhang, Yi Zou |
| 2011 | Congestion analysis for global routing via integer programming. Hamid Shojaei, Azadeh Davoodi, Jeffrey T. Linderoth |
| 2011 | Cooperative parallelization. Praveen Yedlapalli, Emre Kultursay, Mahmut T. Kandemir |
| 2011 | Debugging with dominance: On-the-fly RTL debug solution implications. Hratch Mangassarian, Andreas G. Veneris, Duncan Exon Smith, Sean Safarpour |
| 2011 | Defect-tolerant logic implementation onto nanocrossbars by exploiting mapping and morphing simultaneously. Yehua Su, Wenjing Rao |
| 2011 | Delay optimization using SOP balancing. Alan Mishchenko, Robert K. Brayton, Stephen Jang, Victor N. Kravets |
| 2011 | Detecting stability faults in sub-threshold SRAMs. Chen-Wei Lin, Hao-Yu Yang, Chin-Yuan Huang, Hung-Hsin Chen, Mango Chia-Tso Chao |
| 2011 | Device-architecture co-optimization of STT-RAM based memory for low power embedded systems. Cong Xu, Dimin Niu, Xiaochun Zhu, Seung-Hyuk Kang, Matt Nowak, Yuan Xie |
| 2011 | Doppler: DPL-aware and OPC-friendly gridless detailed routing with mask density balancing. Yen-Hung Lin, Yongchan Ban, David Z. Pan, Yih-Lang Li |
| 2011 | Efficient analytical macromodeling of large analog circuits by Transfer Function Trajectories. Dimitri de Jonghe, Georges G. E. Gielen |
| 2011 | Electromigration modeling and full-chip reliability analysis for BEOL interconnect in TSV-based 3D ICs. Mohit Pathak, Jiwoo Pak, David Z. Pan, Sung Kyu Lim |
| 2011 | Escape routing for staggered-pin-array PCBs. Yuan-Kai Ho, Hsu-Chieh Lee, Yao-Wen Chang |
| 2011 | Exploring heterogeneous NoC design space. Hui Zhao, Mahmut T. Kandemir, Wei Ding, Mary Jane Irwin |
| 2011 | Exploring high throughput computing paradigm for global routing. Yiding Han, Dean Michael Ancajas, Koushik Chakraborty, Sanghamitra Roy |
| 2011 | Failure diagnosis of asymmetric aging under NBTI. Jyothi Bhaskarr Velamala, Venkatesa Ravi, Yu Cao |
| 2011 | Fast analog layout prototyping for nanometer design migration. Yi-Peng Weng, Hung-Ming Chen, Tung-Chieh Chen, Po-Cheng Pan, Chien-Hung Chen, Wei-Zen Chen |
| 2011 | Fast poisson solver preconditioned method for robust power grid analysis. Jianlei Yang, Yici Cai, Qiang Zhou, Jin Shi |
| 2011 | Fast static analysis of power grids: Algorithms and implementations. Zhiyu Zeng, Tong Xu, Zhuo Feng, Peng Li |
| 2011 | Fast statistical model of TiO2 thin-film memristor and design implication. Miao Hu, Hai Li, Robinson E. Pino |
| 2011 | Fast statistical timing analysis for circuits with Post-Silicon Tunable clock buffers. Bing Li, Ning Chen |
| 2011 | Feedback control based cache reliability enhancement for emerging multicores. Hui Zhao, Akbar Sharifi, Shekhar Srikantaiah, Mahmut T. Kandemir |
| 2011 | Formal verification of phase-locked loops using reachability analysis and continuization. Matthias Althoff, Soner Yaldiz, Akshay Rajhans, Xin Li, Bruce H. Krogh, Larry T. Pileggi |
| 2011 | Full-chip runtime error-tolerant thermal estimation and prediction for practical thermal management. Hai Wang, Sheldon X.-D. Tan, Guangdeng Liao, Rafael Quintanilla, Ashish Gupta |
| 2011 | Full-chip through-silicon-via interfacial crack analysis and optimization for 3D IC. Moongon Jung, Xi Liu, Suresh K. Sitaraman, David Z. Pan, Sung Kyu Lim |
| 2011 | GPU programming for EDA with OpenCL. Rasit Onur Topaloglu, Benedict R. Gaster |
| 2011 | Gate sizing and device technology selection algorithms for high-performance industrial designs. Muhammet Mustafa Ozdal, Steven M. Burns, Jiang Hu |
| 2011 | Heterogeneous B Pang-Yen Chou, Hung-Chih Ou, Yao-Wen Chang |
| 2011 | High-level synthesis with distributed controller for fast timing closure. Seokhyun Lee, Kiyoung Choi |
| 2011 | High-quality global routing for multiple dynamic supply voltage designs. Wen-Hao Liu, Yih-Lang Li, Kai-Yuan Chao |
| 2011 | Hybrid CMOS/Magnetic Process Design Kit and application to the design of high-performances non-volatile logic circuits. Guillaume Prenat, Bernard Dieny, Jean-Pierre Nozieres, Gregory di Pendina, Kholdoun Torki |
| 2011 | Identifying the optimal energy-efficient operating points of parallel workloads. Ryan Cochran, Can Hankendi, Ayse K. Coskun, Sherief Reda |
| 2011 | Implementation of pulsed-latch and pulsed-register circuits to minimize clocking power. Seungwhun Paik, Gi-Joon Nam, Youngsoo Shin |
| 2011 | Improving dual Vt technology by simultaneous gate sizing and mechanical stress optimization. Junjun Gu, Gang Qu, Lin Yuan, Cheng Zhuo |
| 2011 | Improving shared cache behavior of multithreaded object-oriented applications in multicores. Mahmut T. Kandemir, Shekhar Srikantaiah, Seung Woo Son |
| 2011 | In-system and on-the-fly clock tuning mechanism to combat lifetime performance degradation. Zahra Lak, Nicola Nicolici |
| 2011 | Inferring assertion for complementary synthesis. Shengyu Shen, Ying Qin, Jianmin Zhang |
| 2011 | Keynote address: Design of secure systems - Where are the EDA tools? Georg Sigl |
| 2011 | Layout decomposition for triple patterning lithography. Bei Yu, Kun Yuan, Boyang Zhang, Duo Ding, David Z. Pan |
| 2011 | Low-power multiple-bit upset tolerant memory optimization. Seokjoong Kim, Matthew R. Guthaus |
| 2011 | MACACO: Modeling and analysis of circuits for approximate computing. Rangharajan Venkatesan, Amit Agarwal, Kaushik Roy, Anand Raghunathan |
| 2011 | MGR: Multi-level global router. Yue Xu, Chris Chu |
| 2011 | Massively parallel programming models used as hardware description languages: The OpenCL case. Muhsen Owaida, Nikolaos Bellas, Christos D. Antonopoulos, Konstantis Daloukas, Charalambos Antoniadis |
| 2011 | Match and replace - A functional ECO engine for multi-error circuit rectification. Shao-Lun Huang, Wei-Hsun Lin, Chung-Yang (Ric) Huang |
| 2011 | Mitigating FPGA interconnect soft errors by in-place LUT inversion. Naifeng Jing, Ju-Yueh Lee, Weifeng He, Zhigang Mao, Lei He |
| 2011 | ModSpec: An open, flexible specification framework for multi-domain device modelling. David Amsallem, Jaijeet S. Roychowdhury |
| 2011 | Model order reduction of fully parameterized systems by recursive least square optimization. Zheng Zhang, Ibrahim M. Elfadel, Luca Daniel |
| 2011 | Modeling and estimation of power supply noise using linear programming. Farshad Firouzi, Saman Kiamehr, Mehdi Baradaran Tahoori |
| 2011 | Modeling the computational efficiency of 2-D and 3-D silicon processors for early-chip planning. Matthew Grange, Axel Jantsch, Roshan Weerasekera, Dinesh Pamunuwa |
| 2011 | Multilevel tree fusion for robust clock networks. Dongjin Lee, Igor L. Markov |
| 2011 | Myth busters: Microprocessor clocking is from Mars, ASICs clocking is from Venus. Joseph N. Kozhaya, Phillip J. Restle, Haifeng Qian |
| 2011 | Neuromorphic modeling abstractions and simulation of large-scale cortical networks. Jeffrey L. Krichmar, Nikil D. Dutt, Jayram Moorkanikara Nageswaran, Micah Richert |
| 2011 | On proving the efficiency of alternative RF tests. Nathan Kupp, Haralampos-G. D. Stratigopoulos, Petros Drineas, Yiorgos Makris |
| 2011 | On rewiring and simplification for canonicity in threshold logic circuits. Pin-Yi Kuo, Chun-Yao Wang, Ching-Yi Huang |
| 2011 | On the preconditioner of conjugate gradient method - A power grid simulation perspective. Chung-Han Chou, Nien-Yu Tsai, Hao Yu, Che-Rung Lee, Yiyu Shi, Shih-Chieh Chang |
| 2011 | Online clock skew tuning for timing speculation. Rong Ye, Feng Yuan, Qiang Xu |
| 2011 | Optimal layout decomposition for double patterning technology. Xiaoping Tang, Minsik Cho |
| 2011 | Optimal statistical chip disposition. Vladimir Zolotov, Jinjun Xiong |
| 2011 | Optimizing data locality using array tiling. Wei Ding, Yuanrui Zhang, Jun Liu, Mahmut T. Kandemir |
| 2011 | PRICE: Power reduction by placement and clock-network co-synthesis for pulsed-latch designs. Yi-Lin Chuang, Hong-Ting Lin, Tsung-Yi Ho, Yao-Wen Chang, Diana Marculescu |
| 2011 | PTrace: Derivative-free local tracing of bicriterial design tradeoffs. Amith Singhee |
| 2011 | Post-silicon bug diagnosis with inconsistent executions. Andrew DeOrio, Daya Shanker Khudia, Valeria Bertacco |
| 2011 | Power grid analysis with hierarchical support graphs. Xueqian Zhao, Jia Wang, Zhuo Feng, Shiyan Hu |
| 2011 | PowerRush: A linear simulator for power grid. Jianlei Yang, Zuowei Li, Yici Cai, Qiang Zhou |
| 2011 | Progress and outlook for STT-MRAM. Yiming Huai, Yuchen Zhou, Ioan Tudosa, Roger Malmhall, Rajiv Ranjan, Jing Zhang |
| 2011 | Progress in CMOS-memristor integration. Gilberto Medeiros-Ribeiro, Janice H. Nickel, J. Joshua Yang |
| 2011 | Property-specific sequential invariant extraction for SAT-based unbounded model checking. Hu-Hsi Yeh, Cheng-Yin Wu, Chung-Yang Huang |
| 2011 | Pseudo-functional testing for small delay defects considering power supply noise effects. Feng Yuan, Xiao Liu, Qiang Xu |
| 2011 | REBEL and TDC: Two embedded test structures for on-chip measurements of within-die path delay variations. Charles Lamech, Jim Aarestad, Jim Plusquellic, Reza M. Rad, Kanak Agarwal |
| 2011 | Reliability-oriented broadcast electrode-addressing for pin-constrained digital microfluidic biochips. Tsung-Wei Huang, Tsung-Yi Ho, Krishnendu Chakrabarty |
| 2011 | Ripple: An effective routability-driven placer by iterative cell movement. Xu He, Tao Huang, Linfu Xiao, Haitong Tian, Guxin Cui, Evangeline F. Y. Young |
| 2011 | Robust passive hardware metering. Sheng Wei, Ani Nahapetian, Miodrag Potkonjak |
| 2011 | Routability-driven analytical placement for mixed-size circuit designs. Meng-Kai Hsu, Sheng Chou, Tzu-Hen Lin, Yao-Wen Chang |
| 2011 | STT-RAM cell design optimization for persistent and non-persistent error rate reduction: A statistical design view. Yaojun Zhang, Xiaobin Wang, Yiran Chen |
| 2011 | Simulation-based signal selection for state restoration in silicon debug. Debapriya Chatterjee, Calvin McCarter, Valeria Bertacco |
| 2011 | Statistical aging analysis with process variation consideration. Sangwoo Han, Joohee Choung, Byung-Su Kim, Bong Hyun Lee, Hungbok Choi, Juho Kim |
| 2011 | Statistical defect-detection analysis of test sets using readily-available tester data. Xiaochun Yu, R. D. (Shawn) Blanton |
| 2011 | Structure preserving reduced-order modeling of linear periodic time-varying systems. Ting Mei, Heidi Thornquist, Eric R. Keiter, Scott A. Hutchinson |
| 2011 | Synchronous elasticization at a reduced cost: Utilizing the ultra simple fork and controller merging. Eliyah Kilada, Kenneth S. Stevens |
| 2011 | Synthesis of parallel binary machines. Elena Dubrova |
| 2011 | System-level application-aware dynamic power management in adaptive pipelined MPSoCs for multimedia. Haris Javaid, Muhammad Shafique, Jörg Henkel, Sri Parameswaran |
| 2011 | Temperature aware statistical static timing analysis. Artem Rogachev, Lu Wan, Deming Chen |
| 2011 | Test-data volume and scan-power reduction with low ATE interface for multi-core SoCs. Vasileios Tenentes, Xrysovalantis Kavousianos |
| 2011 | The STeTSiMS STT-RAM simulation and modeling system. Clinton Wills Smullen IV, Anurag Nigam, Sudhanva Gurumurthi, Mircea R. Stan |
| 2011 | The approximation scheme for peak power driven voltage partitioning. Jia Wang, Xiaodao Chen, Chen Liao, Shiyan Hu |
| 2011 | The future of clock network synthesis. Cliff C. N. Sze |
| 2011 | The role of EDA in digital print automation and infrastructure optimization. Krishnendu Chakrabarty, Gary Dispoto, Rick Bellamy, Jun Zeng |
| 2011 | Timing ECO optimization via Bézier curve smoothing and fixability identification. Hua-Yu Chang, Iris Hui-Ru Jiang, Yao-Wen Chang |
| 2011 | Toward an extremely-high-throughput and even-distribution pattern generator for the constrained random simulation techniques. Bo-Han Wu, Chun-Ju Yang, Chia-Cheng Tso, Chung-Yang Huang |
| 2011 | Toward efficient spatial variation decomposition via sparse regression. Wangyang Zhang, Karthik Balakrishnan, Xin Li, Duane S. Boning, Rob A. Rutenbar |
| 2011 | Towards completely automatic decoder synthesis. Hsiou-Yuan Liu, Yen-Cheng Chou, Chen-Hsuan Lin, Jie-Hong R. Jiang |
| 2011 | Unequal-error-protection codes in SRAMs for mobile multimedia applications. Xuebei Yang, Kartik Mohanram |
| 2011 | Universal statistical cure for predicting memory loss. Rajiv V. Joshi, Rouwaida Kanj, Peiyuan Wang, Hai Li |
| 2011 | Useful-skew clock optimization for multi-power mode designs. Hsuan-Ming Chou, Hao Yu, Shih-Chieh Chang |
| 2011 | Variation-aware electromigration analysis of power/ground networks. Di-An Li, Malgorzata Marek-Sadowska |
| 2011 | Vectorless verification of RLC power grids with transient current constraints. Xuanxing Xiong, Jia Wang |