ICCAD A

134 papers

YearTitle / Authors
20102010 International Conference on Computer-Aided Design, ICCAD 2010, San Jose, CA, USA, November 7-11, 2010
Louis Scheffer, Joel R. Phillips, Alan J. Hu
20103D-ICE: Fast compact transient thermal modeling for 3D ICs with inter-tier liquid cooling.
Arvind Sridhar, Alessandro Vincenzi, Martino Ruggiero, Thomas Brunschwiler, David Atienza
20103POr - Parallel projection based parameterized order reduction for multi-dimensional linear models.
Jorge Fernandez Villena, Luís Miguel Silveira
2010A hierarchical matrix inversion algorithm for vectorless power grid verification.
Xuanxing Xiong, Jia Wang
2010A lower bound computation method for evaluation of statistical design techniques.
Vineeth Veetil, Dennis Sylvester, David T. Blaauw
2010A network-flow based pin-count aware routing algorithm for broadcast electrode-addressing EWOD chips.
Tsung-Wei Huang, Shih-Yuan Yeh, Tsung-Yi Ho
2010A robust functional ECO engine by SAT proof minimization and interpolation techniques.
Bo-Han Wu, Chun-Ju Yang, Chung-Yang Huang, Jie-Hong Roland Jiang
2010A scalable quantitative measure of IR-drop effects for scan pattern generation.
Meng-Fan Wu, Kun-Han Tsai, Wu-Tung Cheng, Hsin-Cheih Pan, Jiun-Lang Huang, Augusli Kifli
2010A self-evolving design methodology for power efficient multi-core systems.
Jin Sun, Rui Zheng, Jyothi Velamala, Yu Cao, Roman L. Lysecky, Karthik Shankar, Janet Meiling Wang Roveda
2010A simple implementation of determinant decision diagram.
Guoyong Shi
2010A synthesis flow for digital signal processing with biomolecular reactions.
Hua Jiang, Aleksandra P. Kharam, Marc D. Riedel, Keshab K. Parhi
2010Active learning framework for post-silicon variation extraction and test cost reduction.
Cheng Zhuo, Kanak Agarwal, David T. Blaauw, Dennis Sylvester
2010Aging analysis at gate and macro cell level.
Dominik Lorenz, Martin Barke, Ulf Schlichtmann
2010An algorithm for exploiting modeling error statistics to enable robust analog optimization.
Ashish Kumar Singh, Mario Lok, Kareem Ragab, Constantine Caramanis, Michael Orshansky
2010An auction based pre-processing technique to determine detour in global routing.
Yue Xu, Chris Chu
2010An energy and power-aware approach to high-level synthesis of asynchronous systems.
John Hansen, Montek Singh
2010Analog test metrics estimates with PPM accuracy.
Haralampos-G. D. Stratigopoulos, Salvador Mir
2010Analysis and optimization of SRAM robustness for double patterning lithography.
Vivek Joshi, Kanak Agarwal, David T. Blaauw, Dennis Sylvester
2010Analysis of circuit dynamic behavior with timed ternary decision diagram.
Lu Wan, Deming Chen
2010Analysis of precision for scaling the intermediate variables in fixed-point arithmetic circuits.
Omid Sarbishei, Katarzyna Radecka
2010Application specific processor design: Architectures, design methods and tools.
Achim Nohl, Frank Schirrmeister, Drew Taussig
2010Application-Aware diagnosis of runtime hardware faults.
Andrea Pellegrini, Valeria Bertacco
2010Bi-decomposition of large Boolean functions using blocking edge graphs.
Mihir R. Choudhury, Kartik Mohanram
2010Board driven I/O planning & optimization.
John F. Park
2010Boolean matching of function vectors with strengthened learning.
Chih-Fan Lai, Jie-Hong R. Jiang, Kuo-Hua Wang
2010Characterization of the worst-case current waveform excitations in general RLC-model power grid analysis.
Nestoras E. Evmorfopoulos, Maria-Aikaterini Rammou, George I. Stamoulis, John Moondanos
2010Characterizing the lifetime reliability of manycore processors with core-level redundancy.
Lin Huang, Qiang Xu
2010Clustering-based simultaneous task and voltage scheduling for NoC systems.
Yifang Liu, Yu Yang, Jiang Hu
2010Combining optimistic and pessimistic DVS scheduling: An adaptive scheme and analysis.
Simon Perathoner, Kai Lampka, Nikolay Stoimenov, Lothar Thiele, Jian-Jia Chen
2010Cost-effective integration of three-dimensional (3D) ICs emphasizing testing cost analysis.
Yibo Chen, Dimin Niu, Yuan Xie, Krishnendu Chakrabarty
2010Credit Borrow and Repay: Sharing DRAM with minimum latency and bandwidth guarantees.
Zefu Dai, Mark Jarvin, Jianwen Zhu
2010Cross-layer error resilience for robust systems.
Larkhoon Leem, Hyungmin Cho, Hsiao-Heng Lee, Young Moon Kim, Yanjing Li, Subhasish Mitra
2010Current shaping and multi-thread activation for fast and reliable power mode transition in multicore designs.
Hao Xu, Ranga Vemuri, Wen-Ben Jone
2010Design and manufacturing of organic RFID circuits: Coping with intrinsic parameter variations in organic devices by circuit design.
Jan Genoe, Kris Myny, Soeren Steudel, Paul Heremans
2010Design automation towards reliable analog integrated circuits.
Georges G. E. Gielen, Elie Maricau, Pieter De Wit
2010Design dependent process monitoring for back-end manufacturing cost reduction.
Tuck-Boon Chan, Aashish Pant, Lerong Cheng, Puneet Gupta
2010Design method and test structure to characterize and repair TSV defect induced signal degradation in 3D system.
Minki Cho, Chang Liu, Dae Hyun Kim, Sung Kyu Lim, Saibal Mukhopadhyay
2010Design of analog circuits using organic field-effect transistors.
Boris Murmann, Wei Xiong
2010Design of large area electronics with organic transistors.
Makoto Takamiya, Koichi Ishida, Tsuyoshi Sekitani, Takao Someya, Takayasu Sakurai
2010Design space exploration and performance evaluation at Electronic System Level for NoC-based MPSoC.
Sören Sonntag, Francisco Gilabert Villamón
2010Design-aware mask inspection.
Abde Ali Kagalwalla, Puneet Gupta, Christopher J. Progler, Steve McDonald
2010Design-hierarchy aware mixed-size placement for routability optimization.
Yi-Lin Chuang, Gi-Joon Nam, Charles J. Alpert, Yao-Wen Chang, Jarrod A. Roy, Natarajan Viswanathan
2010Digital microfluidic biochips: A vision for functional diversity and more than moore.
Tsung-Yi Ho, Jun Zeng, Krishnendu Chakrabarty
2010Digitalization of mixed-signal functionality in nanometer technologies.
Stephan Henzler
2010ESL solutions for low power design.
Sylvian Kaiser, Ilija Materic, Rabih Saade
2010Early P/G grid voltage integrity verification.
Mehmet Avci, Farid N. Najm
2010Efficient arithmetic sum-of-product (SOP) based Multiple Constant Multiplication (MCM) for FFT.
Vinay Karkala, Joseph Wanstrath, Travis Lacour, Sunil P. Khatri
2010Efficient state space exploration: Interleaving stateless and state-based model checking.
Malay K. Ganai, Chao Wang, Weihong Li
2010Efficient trace-driven metaheuristics for optimization of networks-on-chip configurations.
Andrew B. Kahng, Bill Lin, Kambiz Samadi, Rohit Sunkam Ramanujam
2010Electrical characterization of RF TSV for 3D multi-core and heterogeneous ICs.
Le Yu, Haigang Yang, Tom T. Jing, Min Xu, Robert E. Geer, Wei Wang
2010Engineering a scalable Boolean matching based on EDA SaaS 2.0.
Chun Zhang, Yu Hu, Lingli Wang, Lei He, Jiarong Tong
2010Evaluation of using inductive/capacitive-coupling vertical interconnects in 3D network-on-chip.
Jin Ouyang, Jing Xie, Matthew Poremba, Yuan Xie
2010Fast Poisson solvers for thermal analysis.
Haifeng Qian, Sachin S. Sapatnekar
2010Fast and lossless graph division method for layout decomposition using SPQR-tree.
Wai-Shing Luk, Huiping Huang
2010Fast performance evaluation of fixed-point systems with un-smooth operators.
Karthick Parashar, Daniel Ménard, Romuald Rocher, Olivier Sentieys, David Novo, Francky Catthoor
2010Fast statistical timing analysis of latch-controlled circuits for arbitrary clock periods.
Bing Li, Ning Chen, Ulf Schlichtmann
2010Fast thermal analysis on GPU for 3D-ICs with integrated microchannel cooling.
Zhuo Feng, Peng Li
2010Fidelity metrics for estimation models.
Haris Javaid, Aleksandar Ignjatovic, Sri Parameswaran
2010Flexible interpolation with local proof transformations.
Roberto Bruttomesso, Simone Rollini, Natasha Sharygina, Aliaksei Tsitovich
2010Formal deadlock checking on high-level SystemC designs.
Chun-Nan Chou, Chang-Hong Hsu, Yueh-Tung Chao, Chung-Yang Huang
2010Fuzzy control for enforcing energy efficiency in high-performance 3D systems.
Mohamed M. Sabry, Ayse K. Coskun, David Atienza
2010GLADE: A modern global router considering layer directives.
Yen-Jung Chang, Tsung-Hsien Lee, Ting-Chi Wang
2010Generalized nonlinear timing/phase macromodeling: Theory, numerical methods and applications.
Chenjie Gu, Jaijeet S. Roychowdhury
2010HW/SW co-design of parallel systems.
Enno Wein
2010Hierarchical memory scheduling for multimedia MPSoCs.
Ye-Jyun Lin, Chia-Lin Yang, Tay-Jyi Lin, Jiao-Wei Huang, Naehyuck Chang
2010High variation-tolerant obstacle-avoiding clock mesh synthesis with symmetrical driving trees.
Xin-Wei Shih, Hsu-Chieh Lee, Kuan-Hsien Ho, Yao-Wen Chang
2010In-place decomposition for robustness in FPGA.
Ju-Yueh Lee, Zhe Feng, Lei He
2010Local clock skew minimization using blockage-aware mixed tree-mesh clock network.
Linfu Xiao, Zigang Xiao, Zaichen Qian, Yan Jiang, Tao Huang, Haitong Tian, Evangeline F. Y. Young
2010Low-power clock trees for CPUs.
Dongjin Lee, Myung-Chul Kim, Igor L. Markov
2010MVP: Capture-power reduction with minimum-violations partitioning for delay testing.
Zhen Chen, Krishnendu Chakrabarty, Dong Xiang
2010Manufacturing and characteristics of low-voltage organic thin-film transistors.
Hagen Klauk, Ute Zschieschang
2010Mathematical yield estimation for two-dimensional-redundancy memory arrays.
Mango Chia-Tso Chao, Ching-Yu Chin, Chen-Wei Lin
2010Maximum-information storage system: Concept, implementation and application.
Xin Li
2010Memory access aware on-line voltage control for performance and energy optimization.
Xi Chen, Chi Xu, Robert P. Dick
2010Misleading energy and performance claims in sub/near threshold digital systems.
Yu Pu, Xin Zhang, Jim Huang, Atsushi Muramatsu, Masahiro Nomura, Koji Hirairi, Hidehiro Takata, Taro Sakurabayashi, Shinji Miyano, Makoto Takamiya, Takayasu Sakurai
2010Modeling and design for beyond-the-die power integrity.
Yiyu Shi, Lei He
2010Multi-Wafer Virtual Probe: Minimum-cost variation characterization by exploring wafer-to-wafer correlation.
Wangyang Zhang, Xin Li, Emrah Acar, Frank Liu, Rob A. Rutenbar
2010Native-conflict-aware wire perturbation for double patterning technology.
Szu-Yu Chen, Yao-Wen Chang
2010New placement prediction and mitigation techniques for local routing congestion.
Taraneh Taghavi, Zhuo Li, Charles J. Alpert, Gi-Joon Nam, Andrew D. Huber, Shyam Ramji
2010Novel binary linear programming for high performance clock mesh synthesis.
Minsik Cho, David Z. Pan, Ruchir Puri
2010Obstacle-avoiding rectilinear Steiner minimum tree construction: An optimal approach.
Tao Huang, Evangeline F. Y. Young
2010On behavioral model equivalence checking for large analog/mixed signal systems.
Amandeep Singh, Peng Li
2010On power and fault-tolerance optimization in FPGA physical synthesis.
Manu Jose, Yu Hu, Rupak Majumdar
2010On the escape routing of differential pairs.
Tan Yan, Pei-Ci Wu, Qiang Ma, Martin D. F. Wong
2010On timing-independent false path identification.
Feng Yuan, Qiang Xu
2010On-the-fly runtime adaptation for efficient execution of parallel multi-algorithm circuit simulation.
Xiaoji Ye, Peng Li
2010Online selection of effective functional test programs based on novelty detection.
Po-Hsien Chang, Dragoljub Gagi Drmanac, Li-C. Wang
2010Optimal algorithm for profile-based power gating: A compiler technique for reducing leakage on execution units in microprocessors.
Danbee Park, Jungseob Lee, Nam Sung Kim, Taewhan Kim
2010PEDS: Passivity enforcement for descriptor systems via Hamiltonian-symplectic matrix pencil perturbation.
Yuanzhe Wang, Zheng Zhang, Cheng-Kok Koh, Grantham K. H. Pang, Ngai Wong
2010Peak current reduction by simultaneous state replication and re-encoding.
Junjun Gu, Gang Qu, Lin Yuan, Qiang Zhou
2010Phase equations for quasi-periodic oscillators.
Alper Demir, Chenjie Gu, Jaijeet S. Roychowdhury
2010Polynomial datapath optimization using constraint solving and formal modelling.
Finn Haedicke, Bijan Alizadeh, Görschwin Fey, Masahiro Fujita, Rolf Drechsler
2010Post-placement power optimization with multi-bit flip-flops.
Yao-Tsung Chang, Chih-Cheng Hsu, Mark Po-Hung Lin, Yu-Wen Tsai, Sheng-Fong Chen
2010Power grid correction using sensitivity analysis.
Meric Aydonat, Farid N. Najm
2010Practical placement and routing techniques for analog circuit designs.
Linfu Xiao, Evangeline F. Y. Young, Xiao-Yong He, Kong-Pang Pun
2010Process variation aware performance modeling and dynamic power management for multi-core systems.
Siddharth Garg, Diana Marculescu, Sebastian Herbert
2010Recent research development in PCB layout.
Tan Yan, Martin D. F. Wong
2010Recent research development in flip-chip routing.
Hsu-Chieh Lee, Yao-Wen Chang, Po-Wei Lee
2010Reduction of interpolants for logic synthesis.
John D. Backes, Marc D. Riedel
2010Redundant-wires-aware ECO timing and mask cost optimization.
Shao-Yun Fang, Tzuo-Fan Chien, Yao-Wen Chang
2010Reliability, thermal, and power modeling and optimization.
Robert P. Dick
2010Resilient microprocessor design for improving performance and energy efficiency.
Keith A. Bowman, James W. Tschanz
2010SETS: Stochastic execution time scheduling for multicore systems by joint state space and Monte Carlo.
Nabeel Iqbal, Jörg Henkel
2010SMATO: Simultaneous mask and target optimization for improving lithographic process window.
Shayak Banerjee, Kanak B. Agarwal, Michael Orshansky
2010SPIRE: A retiming-based physical-synthesis transformation system.
David A. Papa, Smita Krishnaswamy, Igor L. Markov
2010Scalable segmentation-based malicious circuitry detection and diagnosis.
Sheng Wei, Miodrag Potkonjak
2010Scheduling of synchronous data flow models on scratchpad memory based embedded processors.
Weijia Che, Karam S. Chatha
2010Selective instruction set muting for energy-aware adaptive processors.
Muhammad Shafique, Lars Bauer, Jörg Henkel
2010Sequential importance sampling for low-probability and high-dimensional SRAM yield analysis.
Kentaro Katayama, Shiho Hagiwara, Hiroshi Tsutsui, Hiroyuki Ochi, Takashi Sato
2010SimPL: An effective placement algorithm.
Myung-Chul Kim, Dongjin Lee, Igor L. Markov
2010Simulation of random telegraph Noise with 2-stage equivalent circuit.
Yun Ye, Chi-Chao Wang, Yu Cao
2010Simultaneous antenna avoidance and via optimization in layer assignment of multi-layer global routing.
Tsung-Hsien Lee, Ting-Chi Wang
2010Standards for System Level Design.
Laurent Maillet-Contoz
2010Stress-driven 3D-IC placement with TSV keep-out zone and regularity study.
Krit Athikulwongse, Ashutosh Chakraborty, Jae-Seok Yang, David Z. Pan, Sung Kyu Lim
2010Stretching the limit of microarchitectural level leakage control with Adaptive Light-Weight Vth Hopping.
Hao Xu, Wen-Ben Jone, Ranga Vemuri
2010Structured analog circuit design and MOS transistor decomposition for high accuracy applications.
Bo Yang, Qing Dong, Jing Li, Shigetoshi Nakatake
2010Symbolic performance analysis of elastic systems.
Marc Galceran Oms, Jordi Cortadella, Michael Kishinevsky
2010Symbolic system level reliability analysis.
Michael Glaß, Martin Lukasiewycz, Felix Reimann, Christian Haubelt, Jürgen Teich
2010Synthesis of an efficient controlling structure for post-silicon clock skew minimization.
Yu-Chien Kao, Hsuan-Ming Chou, Kun-Ting Tsai, Shih-Chieh Chang
2010System-level impact of chip-level failure mechanisms and screens.
Anne Gattiker
2010Template-mask design methodology for double patterning technology.
Chin-Hsiung Hsu, Yao-Wen Chang, Sani R. Nassif
2010Testing methods for detecting stuck-open power switches in coarse-grain MTCMOS designs.
Szu-Pang Mu, Yi-Ming Wang, Hao-Yu Yang, Mango Chia-Tso Chao, Shi-Hao Chen, Chih-Mou Tseng, Tsung-Ying Tsai
2010The fast optimal voltage partitioning algorithm for peak power density minimization.
Jia Wang, Shiyan Hu
2010Through-silicon-via management during 3D physical design: When to add and how many?
Mohit Pathak, Young-Joon Lee, Thomas Moon, Sung Kyu Lim
2010Timing yield optimization via discrete gate sizing using globally-informed delay PDFs.
Shantanu Dutt, Huan Ren
2010Trace signal selection to enhance timing and logic visibility in post-silicon validation.
Hamid Shojaei, Azadeh Davoodi
2010Transaction level modeling in practice: Motivation and introduction.
Guido Stehr, Josef Eckmuuller
2010Unified analytical global placement for large-scale mixed-size circuit designs.
Meng-Kai Hsu, Yao-Wen Chang
2010Unified theory of real-time task scheduling and dynamic voltage/frequency Scaling on MPSoCs.
Hessam Kooti, Eli Bozorgzadeh
2010Variation tolerant sensing scheme of Spin-Transfer Torque Memory for yield improvement.
Zhenyu Sun, Hai Li, Yiran Chen, Xiaobin Wang
2010Variation-aware layout-driven scheduling for performance yield optimization.
Gregory Lucas, Deming Chen
2010WISDOM: Wire spreading enhanced decomposition of masks in Double Patterning Lithography.
Kun Yuan, David Z. Pan
2010Work-function variation induced fluctuation in bias-temperature-instability characteristics of emerging metal-gate devices and implications for digital design.
Seid Hadi Rasouli, Kazuhiko Endo, Kaustav Banerjee
2010Yield enhancement for 3D-stacked memory by redundancy sharing across dies.
Li Jiang, Rong Ye, Qiang Xu