| 2009 | 2009 International Conference on Computer-Aided Design, ICCAD 2009, San Jose, CA, USA, November 2-5, 2009 Jaijeet S. Roychowdhury |
| 2009 | A circuit-software co-design approach for improving EDP in reconfigurable frameworks. Somnath Paul, Subho Chatterjee, Saibal Mukhopadhyay, Swarup Bhunia |
| 2009 | A contamination aware droplet routing algorithm for digital microfluidic biochips. Tsung-Wei Huang, Chun-Hsien Lin, Tsung-Yi Ho |
| 2009 | A framework for early and systematic evaluation of design rules. Rani S. Ghaida, Puneet Gupta |
| 2009 | A hierarchical floating random walk algorithm for fabric-aware 3D capacitance extraction. Tarek A. El-Moselhy, Ibrahim M. Elfadel, Luca Daniel |
| 2009 | A hierarchy of subgraphs underlying a timing graph and its use in capturing topological correlation in SSTA. Jaeyong Chung, Jacob A. Abraham |
| 2009 | A hybrid local-global approach for multi-core thermal management. Ramkumar Jayaseelan, Tulika Mitra |
| 2009 | A method for calculating hard QoS guarantees for Networks-on-Chip. Dara Rahmati, Srinivasan Murali, Luca Benini, Federico Angiolini, Giovanni De Micheli, Hamid Sarbazi-Azad |
| 2009 | A methodology for robust, energy efficient design of Spin-Torque-Transfer RAM arrays at scaled technologies. Subho Chatterjee, Mitchelle Rasquinha, Sudhakar Yalamanchili, Saibal Mukhopadhyay |
| 2009 | A novel post-ATPG IR-drop reduction scheme for at-speed scan testing in broadcast-scan-based test compression environment. Kohei Miyase, Yuta Yamato, Kenji Noda, Hideaki Ito, Kazumi Hatayama, Takashi Aikyo, Xiaoqing Wen, Seiji Kajihara |
| 2009 | A parallel preconditioning strategy for efficient transistor-level circuit simulation. Heidi Thornquist, Eric R. Keiter, Robert J. Hoekstra, David M. Day, Erik G. Boman |
| 2009 | A performance analytical model for Network-on-Chip with constant service time routers. Nikita Nikitin, Jordi Cortadella |
| 2009 | A rigorous framework for convergent net weighting schemes in timing-driven placement. Tony F. Chan, Jason Cong, Eric Radke |
| 2009 | A scalable decision procedure for fixed-width bit-vectors. Roberto Bruttomesso, Natasha Sharygina |
| 2009 | A study of Through-Silicon-Via impact on the 3D stacked IC layout. Dae Hyun Kim, Krit Athikulwongse, Sung Kyu Lim |
| 2009 | A study of routability estimation and clustering in placement. Kalliopi Tsota, Cheng-Kok Koh, Venkataramanan Balakrishnan |
| 2009 | A variation-aware preferential design approach for memory based reconfigurable computing. Somnath Paul, Saibal Mukhopadhyay, Swarup Bhunia |
| 2009 | Active-passive co-synthesis of multi-GigaHertz radio frequency circuits with broadband parametric macromodels of on-chip passives. Ritochit Chakraborty, Arun V. Sathanur, Vikram Jandhyala |
| 2009 | Adaptive power management using reinforcement learning. Ying Tan, Wei Liu, Qinru Qiu |
| 2009 | Adaptive sampling for efficient failure probability analysis of SRAM cells. Javid Jaffari, Mohab Anis |
| 2009 | An accurate and efficient performance analysis approach based on queuing model for network on chip. Ming-Che Lai, Lei Gao, Nong Xiao, Zhiying Wang |
| 2009 | An algorithm for identifying dominant-edge metabolic pathways. Ehsan Ullah, Kyongbum Lee, Soha Hassoun |
| 2009 | An efficient algorithm for modeling spatially-correlated process variation in statistical full-chip leakage analysis. Zuochang Ye, Zhiping Yu |
| 2009 | An efficient pre-assignment routing algorithm for flip-chip designs. Po-Wei Lee, Chung-Wei Lin, Yao-Wen Chang, Chin-Fang Shen, Wei-Chih Tseng |
| 2009 | An efficient wakeup scheduling considering resource constraint for sensor-based power gating designs. Ming-Chao Lee, Yu-Ting Chen, Yo-Tzu Cheng, Shih-Chieh Chang |
| 2009 | An electrical-level superposed-edge approach to statistical serial link simulation. Michael J. Tsuk, Daniel Dvorscak, Chin Siong Ong, Jacob White |
| 2009 | An elegant hardware-corroborated statistical repair and test methodology for conquering aging effects. Rouwaida Kanj, Rajiv V. Joshi, Chad Adams, James D. Warnock, Sani R. Nassif |
| 2009 | Automatic memory partitioning and scheduling for throughput and power optimization. Jason Cong, Wei Jiang, Bin Liu, Yi Zou |
| 2009 | BIST design optimization for large-scale embedded memory cores. Tzuo-Fan Chien, Wen-Chi Chao, James Chien-Mo Li, Yao-Wen Chang, Kuan-Yu Liao, Ming-Tung Chang, Min-Hsiu Tsai, Chih-Mou Tseng |
| 2009 | Battery allocation for wireless sensor network lifetime maximization under cost constraints. Hengyu Long, Yongpan Liu, Yiqun Wang, Robert P. Dick, Huazhong Yang |
| 2009 | Binning optimization based on SSTA for transparently-latched circuits. Min Gong, Hai Zhou, Jun Tao, Xuan Zeng |
| 2009 | CRISP: Congestion reduction by iterated spreading during placement. Jarrod A. Roy, Natarajan Viswanathan, Gi-Joon Nam, Charles J. Alpert, Igor L. Markov |
| 2009 | CROP: Fast and effective congestion refinement of placement. Yanheng Zhang, Chris Chu |
| 2009 | Characterizing within-die variation from multiple supply port IDDQ measurements. Kanak Agarwal, Dhruva Acharyya, Jim Plusquellic |
| 2009 | Compacting test vector sets via strategic use of implications. Nuno Alves, Jennifer Dworak, R. Iris Bahar, Kundan Nepal |
| 2009 | Computing quadratic approximations for the isochrons of oscillators: A general theory and advanced numerical methods. Onder Suvak, Alper Demir |
| 2009 | Consistency-based characterization for IC Trojan detection. Yousra Alkabani, Farinaz Koushanfar |
| 2009 | Decoupling capacitance efficient placement for reducing transient power supply noise. Xiaoyi Wang, Yici Cai, Qiang Zhou, Sheldon X.-D. Tan, Thom Jefferson A. Eguia |
| 2009 | DeltaSyn: An efficient logic difference optimizer for ECO synthesis. Smita Krishnaswamy, Haoxing Ren, Nilesh Modi, Ruchir Puri |
| 2009 | DynaTune: Circuit-level optimization for timing speculation considering dynamic path behavior. Lu Wan, Deming Chen |
| 2009 | Energy reduction for STT-RAM using early write termination. Ping Zhou, Bo Zhao, Jun Yang, Youtao Zhang |
| 2009 | Energy-optimal dynamic thermal management for green computing. Donghwa Shin, Jihun Kim, Naehyuck Chang, Jinhang Choi, Sung Woo Chung, Eui-Young Chung |
| 2009 | Enhanced reliability-aware power management through shared recovery technique. Baoxian Zhao, Hakan Aydin, Dakai Zhu |
| 2009 | Exact route matching algorithms for analog and mixed signal integrated circuits. Muhammet Mustafa Ozdal, Renato Fernandes Hentschke |
| 2009 | Fast 3-D thermal analysis of complex interconnect structures using electrical modeling and simulation methodologies. Chuan Xu, Lijun Jiang, Seshadri K. Kolluri, Barry J. Rubin, Alina Deutsch, Howard H. Smith, Kaustav Banerjee |
| 2009 | Fast and reliable passivity assessment and enforcement with extended Hamiltonian pencil. Zuochang Ye, Luís Miguel Silveira, Joel R. Phillips |
| 2009 | Fast detection of node mergers using logic implications. Yung-Chih Chen, Chun-Yao Wang |
| 2009 | Fast trade-off evaluation for digital signal processing systems during wordlength optimization. Linsheng Zhang, Yan Zhang, Wenbiao Zhou |
| 2009 | Final-value ODEs: Stable numerical integration and its application to parallel circuit analysis. Wei Dong, Peng Li |
| 2009 | First steps towards SAT-based formal analog verification. Saurabh K. Tiwary, Anubhav Gupta, Joel R. Phillips, Claudio Pinello, Radu Zlatanovici |
| 2009 | From 2D to 3D NoCs: A case study on worst-case communication performance. Yue Qian, Zhonghai Lu, Wenhua Dou |
| 2009 | GHM: A generalized Hamiltonian method for passivity test of impedance/admittance descriptor systems. Zheng Zhang, Chi-Un Lei, Ngai Wong |
| 2009 | GREMA: Graph reduction based efficient mask assignment for double patterning technology. Yue Xu, Chris Chu |
| 2009 | GRPlacer: Improving routability and wire-length of global routing with circuit replacement. Ke-Ren Dai, Chien-Hung Lu, Yih-Lang Li |
| 2009 | Gene-regulatory memories: Electrical-equivalent modeling, simulation and parameter identification. Yong Zhang, Peng Li |
| 2009 | Generation of optimal obstacle-avoiding rectilinear Steiner minimum tree. Liang Li, Zaichen Qian, Evangeline F. Y. Young |
| 2009 | Genetic design automation. Chris J. Myers, Nathan A. Barker, Hiroyuki Kuwahara, Kevin R. Jones, Curtis Madsen, Nam-Phuong D. Nguyen |
| 2009 | Global routing revisited. Michael D. Moffitt |
| 2009 | How to consider shorts and guarantee yield rate improvement for redundant wire insertion. Fong-Yuan Chang, Ren-Song Tsay, Wai-Kei Mak |
| 2009 | IPR: In-Place Reconfiguration for FPGA fault tolerance. Zhe Feng, Yu Hu, Lei He, Rupak Majumdar |
| 2009 | Improved heuristics for finite word-length polynomial datapath optimization. Bijan Alizadeh, Masahiro Fujita |
| 2009 | Interpolant generation without constructing resolution graph. Chih-Jen Hsu, Shao-Lun Huang, Chi-An Wu, Chung-Yang Huang |
| 2009 | Interpolating functions from large Boolean relations. Jie-Hong Roland Jiang, Hsuan-Po Lin, Wei-Lun Hung |
| 2009 | Intrinsic NBTI-variability aware statistical pipeline performance assessment and tuning. Balaji Vaidyanathan, Anthony S. Oates, Yuan Xie |
| 2009 | Introduction to GPU programming for EDA. John F. Croix, Sunil P. Khatri |
| 2009 | Iterative layering: Optimizing arithmetic circuits by structuring the information flow. Ajay Kumar Verma, Philip Brisk, Paolo Ienne |
| 2009 | Joint design-time and post-silicon optimization for digitally tuned analog circuits. Wei Yao, Yiyu Shi, Lei He, Sudhakar Pamarti |
| 2009 | Layout-dependent STI stress analysis and stress-aware RF/analog circuit design optimization. Jiying Xue, Zuochang Ye, Yangdong Deng, Hongrui Wang, Liu Yang, Zhiping Yu |
| 2009 | Layout-driven test-architecture design and optimization for 3D SoCs under pre-bond test-pin-count constraint. Li Jiang, Qiang Xu, Krishnendu Chakrabarty, T. M. Mak |
| 2009 | Leveraging efficient parallel pattern search for clock mesh optimization. Xiaoji Ye, Srinath Narasimhan, Peng Li |
| 2009 | MOLES: Malicious off-chip leakage enabled by side-channels. Lang Lin, Wayne P. Burleson, Christof Paar |
| 2009 | Maximizing performance of thermally constrained multi-core processors by dynamic voltage and frequency control. Vinay Hanumaiah, Sarma B. K. Vrudhula, Karam S. Chatha |
| 2009 | Memory organization and data layout for instruction set extensions with architecturally visible storage. Panagiotis Athanasopoulos, Philip Brisk, Yusuf Leblebici, Paolo Ienne |
| 2009 | Minimizing expected energy consumption through optimal integration of DVS and DPM. Baoxian Zhao, Hakan Aydin |
| 2009 | Mitigation of intra-array SRAM variability using adaptive voltage architecture. Ashish Kumar Singh, Ku He, Constantine Caramanis, Michael Orshansky |
| 2009 | Modeling of layout-dependent stress effect in CMOS design. Chi-Chao Wang, Wei Zhao, Frank Liu, Min Chen, Yu Cao |
| 2009 | Multi-functional interconnect co-optimization for fast and reliable 3D stacked ICs. Young-Joon Lee, Rohan Goel, Sung Kyu Lim |
| 2009 | Multi-level clustering for clock skew optimization. Jonas Casanova, Jordi Cortadella |
| 2009 | Nanoelectromechanical (NEM) relays integrated with CMOS SRAM for improved stability and low leakage. Soogine Chong, Kerem Akarvardar, Roozbeh Parsa, Jun-Bo Yoon, Roger T. Howe, Subhasish Mitra, H.-S. Philip Wong |
| 2009 | Nonvolatile memristor memory: Device characteristics and design implications. Yenpo Ho, Garng M. Huang, Peng Li |
| 2009 | Obstacle-avoiding rectilinear Steiner tree construction based on Steiner point selection. Chih-Hung Liu, Shih-Yi Yuan, Sy-Yen Kuo, Jung-Hung Weng |
| 2009 | On soft error rate analysis of scaled CMOS designs - A statistical perspective. Huan-Kai Peng, Charles H.-P. Wen, Jayanta Bhadra |
| 2009 | Operating system scheduling for efficient online self-test in robust systems. Yanjing Li, Onur Mutlu, Subhasish Mitra |
| 2009 | Optimal layer assignment for escape routing of buses. Tan Yan, Hui Kong, Martin D. F. Wong |
| 2009 | PCRAMsim: System-level performance, energy, and area modeling for Phase-Change RAM. Xiangyu Dong, Norman P. Jouppi, Yuan Xie |
| 2009 | POWER7 - Verification challenge of a multi-core processor. Klaus-Dieter Schubert |
| 2009 | PSTA-based branch and bound approach to the silicon speedpath isolation problem. Sari Onaissi, Khaled R. Heloue, Farid N. Najm |
| 2009 | Pad assignment for die-stacking System-in-Package design. Yu-Chen Lin, Wai-Kei Mak, Chris Chu, Ting-Chi Wang |
| 2009 | Parallel multi-level analytical global placement on graphics processing units. Jason Cong, Yi Zou |
| 2009 | Post-fabrication measurement-driven oxide breakdown reliability prediction and management. Cheng Zhuo, David T. Blaauw, Dennis Sylvester |
| 2009 | Power-switch routing for coarse-grain MTCMOS technologies. Tsun-Ming Tseng, Mango Chia-Tso Chao, Chien Pang Lu, Chen Hsing Lo |
| 2009 | Pre-ATPG path selection for near optimal post-ATPG process space coverage. Jiniun Xionq, Yiyu Shi, Vladimir Zolotov, Chandu Visweswariah |
| 2009 | Pre-bond testable low-power clock tree design for 3D stacked ICs. Xin Zhao, Dean L. Lewis, Hsien-Hsin S. Lee, Sung Kyu Lim |
| 2009 | QLMOR: A new projection-based approach for nonlinear model order reduction. Chenjie Gu |
| 2009 | Quantifying robustness metrics in parameterized static timing analysis. Khaled R. Heloue, Chandramouli V. Kashyap, Farid N. Najm |
| 2009 | REMiS: Run-time energy minimization scheme in a reconfigurable processor with dynamic power-gated instruction set. Muhammad Shafique, Lars Bauer, Jörg Henkel |
| 2009 | Resilience in computer systems and networks. Kishor S. Trivedi, Dong Seong Kim, Rahul Ghosh |
| 2009 | Resilient circuits - Enabling energy-efficient performance and reliability. James W. Tschanz, Keith A. Bowman, Chris Wilkerson, Shih-Lien Lu, Tanay Karnik |
| 2009 | Retiming and time borrowing: Optimizing high-performance pulsed-latch-based circuits. Seonggwan Lee, Seungwhun Paik, Youngsoo Shin |
| 2009 | SAT-based protein design. Noah Ollikainen, Ellen Sentovich, Carlos Coelho, Andreas Kuehlmann, Tanja Kortemme |
| 2009 | Scan power reduction in linear test data compression scheme. Mingjing Chen, Alex Orailoglu |
| 2009 | Scheduling with soft constraints. Jason Cong, Bin Liu, Zhiru Zhang |
| 2009 | Security against hardware Trojan through a novel application of design obfuscation. Rajat Subhra Chakraborty, Swarup Bhunia |
| 2009 | Simultaneous layout migration and decomposition for double patterning technology. Chin-Hsiung Hsu, Yao-Wen Chang, Sani R. Nassif |
| 2009 | Synthesizing complementary circuits automatically. Shengyu Shen, Jianmin Zhang, Ying Qin, Sikun Li |
| 2009 | Synthesizing sequential register-based computation with biochemistry. Adam Shea, Marc D. Riedel, Brian Fett, Keshab K. Parhi |
| 2009 | TAPE: Thermal-aware agent-based power econom multi/many-core architectures. Thomas Ebi, Mohammad Abdullah Al Faruque, Jörg Henkel |
| 2009 | Taming irregular EDA applications on GPUs. Yangdong Deng, Bo D. Wang, Shuai Mu |
| 2009 | Task management in MPSoCs: An ASIP approach. Jerónimo Castrillón, Diandian Zhang, Torsten Kempf, Bart Vanthournout, Rainer Leupers, Gerd Ascheid |
| 2009 | Temporal and spatial idleness exploitation for optimal-grained leakage control. Hao Xu, Ranga Vemuri, Wen-Ben Jone |
| 2009 | The epsilon-approximation to discrete VT assignment for leakage power minimization. Yujia Feng, Shiyan Hu |
| 2009 | The synthesis of combinational logic to generate probabilities. Weikang Qian, Marc D. Riedel, Kia Bazargan, David J. Lilja |
| 2009 | Thermal modeling for 3D-ICs with integrated microchannel cooling. Hitoshi Mizunuma, Chia-Lin Yang, Yi-Chang Lu |
| 2009 | Timing Arc based logic analysis for false noise reduction. Murthy Palla, Jens Bargfrede, Stephan Eggersglüß, Walter Anheier, Rolf Drechsler |
| 2009 | Timing model extraction for sequential circuits considering process variations. Bing Li, Ning Chen, Ulf Schlichtmann |
| 2009 | Timing yield-aware color reassignment and detailed placement perturbation for double patterning lithography. Mohit Gupta, Kwangok Jeong, Andrew B. Kahng |
| 2009 | Value assignment of adjustable delay buffers for clock skew minimization in multi-voltage mode designs. Yu-Shih Su, Wing-Kai Hon, Cheng-Chih Yang, Shih-Chieh Chang, Yeong-Jar Chang |
| 2009 | Variability analysis of FinFET-based devices and circuits considering electrical confinement and width quantization. Seid Hadi Rasouli, Kazuhiko Endo, Kaustav Banerjee |
| 2009 | Virtual probe: A statistically optimal framework for minimum-cost silicon characterization of nanoscale integrated circuits. Xin Li, Rob A. Rutenbar, R. D. (Shawn) Blanton |
| 2009 | Voltage binning under process variation. Vladimir Zolotov, Chandu Visweswariah, Jinjun Xiong |
| 2009 | Voltage-drop aware analytical placement by global power spreading for mixed-size circuit designs. Yi-Lin Chuang, Po-Wei Lee, Yao-Wen Chang |
| 2009 | Yield estimation of SRAM circuits using "Virtual SRAM Fab". Aditya Bansal, Rama N. Singh, Rouwaida Kanj, Saibal Mukhopadhyay, Jin-Fuw Lee, Emrah Acar, Amith Singhee, Keunwoo Kim, Ching-Te Chuang, Sani R. Nassif, Fook-Luen Heng, Koushik K. Das |